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2011-01-03If the crtc is not enabled, then it can't be onChris Wilson1-0/+3
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2011-01-03dri2: Fix interlace computationAdam Jackson1-3/+2
scrn->currentMode is a hack for xf86vidmode and in general is wrong for RANDRful drivers. Use the mode on the associated CRTC instead. Signed-off-by: Adam Jackson <ajax@redhat.com> [ickle: crtc->mode is a ModeRec not Ptr] Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2011-01-03xv: Fix interlace computationAdam Jackson1-1/+1
scrn->currentMode is a hack for xf86vidmode and in general is wrong for RANDRful drivers. Use the mode on the associated CRTC instead. Signed-off-by: Adam Jackson <ajax@redhat.com> [ickle: crtc->mode is a ModeRec] Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2011-01-03dri: Only issue a warning for an "impossible" flip return 5 timesChris Wilson1-4/+13
As it appears that some kernels do indeed return the "wrong" value, issuing a warning 60 times a second is a cruel and unusual punishment. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=32680 Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2011-01-02dri: Don't wait upon a NULL current modeChris Wilson1-2/+3
There is a race condition between the dri swapbuffers code and hotplugging whereby we might attempt to execute a wait upon a non-existent output. This causes a NULL dereference and a loud crash. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=32770 Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2011-01-02dri: Fix the use of the uninitialised bo for flinkChris Wilson1-2/+1
Reported-by: Jeff Chua <jeff.chua.linux@gmail.com> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-12-31dri: Protect against using dri with an non-gem pixmapChris Wilson1-1/+1
Reported-by: Jeff Chua <jeff.chua.linux@gmail.com> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-12-30Don't replace the scanout bo through PutImageChris Wilson3-9/+23
As the bo may be pinned for either use by the scanout or through sharing with another application, under those circumstances we cannot replace the bo itself but must force the blit for PutImage. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=31367 Reported-and-tested-by: Bjørn Mork <bjorn@mork.no> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-12-24dri: Differentiate identical "get vblank failed" messages with line noChris Wilson1-4/+12
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-12-23i830: amalgamate consecutive composites into a single primitiveChris Wilson3-5/+19
Improve aa10text on i845 from 218kglyphs/s to 234kglyphs/s Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-12-22Remove the deprecated function 'XNFprintf'Chris Wilson1-7/+3
As we know the maximum length of the string, we can replace our single usage of XNFprintf with snprintf. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-12-20Undo: Disable BLT for i830 and 845GChris Wilson1-1/+3
Reported-by: György Balló <ballogy@freestart.hu> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=32482 Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-12-20G35 is gen4 and not gen3Chris Wilson1-1/+1
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=32478 Reported-and-tested-by: Michal Marek <mmarek@suse.cz> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-12-16Check consistency of pageflip completion vblank count.Mario Kleiner1-2/+16
Implements a consistency check on returned vblank count values of pageflip completion. Impossible values are detected, a x-warning is logged and returned (msc,ust) values are marked invalid, so clients could perform error handling. Such a warning would indicate bugs in the pageflip completion routine of future kms drivers or the ddx and thereby aid driver debugging. Signed-off-by: Mario Kleiner <mario.kleiner@tuebingen.mpg.de> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-12-16Fix reporting of pageflip completion events on multi-head.Mario Kleiner3-8/+54
When a drawable is page-flipped on multiple crtc's (fullscreen drawable on mirror-mode or multi-head x-screen), only one pageflip event is finally delivered, after the last participating crtc signals flip completion, this to avoid visual corruption. Old code returned vblank count and timestamps of flip completion of this last crtc, instead of the values of the "master crtc", the one that was used for initially scheduling/triggering the pagflip via vblank events. (master = I830DRI2DrawablePipe(drawable)) This patch makes sure that the pageflip completion values of the "master" crtc are returned, otherwise client applications will get confused by the random (msc, ust) values returned by whichever crtc was the last to complete its flip. Without this, the returned values change randomly and jump forward and backward in time and count. Signed-off-by: Mario Kleiner <mario.kleiner@tuebingen.mpg.de> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-12-07Revert "i965: The RenderCache flush after every glyph is required for compiz"Chris Wilson1-1/+1
This reverts commit 03e8351179b1c25d219842ef3e01ee8e176f594f. * sigh. This was only meant to be a temporary debugging hack, not for public consumption (or embarrassment). Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-12-07i965: Mark sure we mark reused render targets as dirtyChris Wilson1-19/+16
... or else we may forget to flush them again. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-12-07i965: The RenderCache flush after every glyph is required for compizChris Wilson1-1/+1
... now who can explain why. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-12-07i965: Invalidate pixmap binding location on reuse.Chris Wilson1-0/+1
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-12-07Always flush the batch before blocking for new X requestsChris Wilson1-1/+2
This should prevent any lag when waiting upon user input, for example whilst logging in with gdm. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-12-06snb: Only emit CC and DepthStencil bos once per batchChris Wilson1-31/+37
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-12-06snb: Restore drawrect, we need the implicit flushChris Wilson1-1/+2
Something is wrong, we should be tracking when to invalidate the caches as appropriate, yet I can not finding the missing flush to replace the implicit one of DRAW_RECTANGLE. Fixes cacomposite. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-12-06snb: Cache pixmap binding locationsChris Wilson2-0/+19
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-12-06snb: Cache state between composite opsChris Wilson2-16/+81
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-12-06snb: Emit more invariants only onceChris Wilson1-75/+65
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-12-05uxa: Prevent reading past the last byte on upload/downloadChris Wilson1-9/+10
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=29752 Reported-by: Sergey Samokhin <prikrutil@gmail.com> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-12-05Don't use hardware acceleration on Sandybridge rev 07 hardware or earlier.Matthias Hopf1-0/+11
This is known to lock up the GPU even with the workaround in place. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=31773 Signed-off-by: Matthias Hopf <mhopf@suse.de> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-12-05display: Flush any pending batches before changing modes.Chris Wilson1-0/+4
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-12-05i965: Also flush the vertex buffer when restarting the array.Chris Wilson1-0/+1
As a corollary to filling one vertex array and beginning a new one is remembering to emit the old one before overwriting... Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-12-05i965: Check for potential vertex array overflow every timeChris Wilson1-12/+12
There was a reason why we need to check at the start of every composite operation to see if we have enough space in the array to fit the vertices, which I promptly forgot when moving the code around to make it look pretty. * sigh. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-12-03Wait on the current buffer to complete when running synchronously.Chris Wilson4-34/+3
And remove the vestigal wait upon changing crtc as this is more properly done in the kernel. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-12-03i965: Amalgamate surface binding tablesChris Wilson7-286/+265
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-12-03i965: Upload an entire vbo in a single pwrite, rather than per-rectangleChris Wilson4-146/+129
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-12-03i965: Use reciprocal scale factors to avoid the divide per-vertex-elementChris Wilson1-16/+16
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-11-23Disable BLT for i830 and 845GChris Wilson3-7/+20
This pair of chipsets seem broken beyond repair, specifically the erratum that causes the wrong PTE entry to be invalidated, so disable our incorrect attempts to use the BLT on those devices. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-11-17Mark outputs as DPMSModeOn and restore backlight at mode setKeith Packard1-1/+20
The kernel always turns monitors on when doing mode setting, and so no further DPMS action is required. Note this in the mode setting code by marking the updated DPMS mode and restoring any saved backlight level. Signed-off-by: Keith Packard <keithp@keithp.com> Reviewed-by: Eric Anholt <eric@anholt.net>
2010-11-14uxa: Relax fencing some more for gen3Chris Wilson1-7/+11
Allow fenced allocations even for small pixmaps if the kernel supports relaxing fencing (where only the used pages are allocated). Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-11-09i915: Disable maximum state addressesChris Wilson1-5/+5
As the kernel controls the relocation of state buffers, we should not hard code the maximum permissible value for them. Fixes an eventual hang with full-gtt. Reported-by: Peter Clifton <pcjc2@cam.ac.uk> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-11-05Wait for any pending rendering before switching modes.Chris Wilson2-0/+5
A perennial problem we have is the accursed WAIT_FOR_EVENT hangs, which occur when we switch the framebuffer before the WAIT_FOR_EVENT completes and upsets the GPU. We have tried more subtle approaches to detected these and fix them up in the kernel, to no avail. What we need to do is to delay the framebuffer flip until the WAIT completes, which is quite tricky in the kernel without new ioctls and round-trips. Instead, apply the big hammer from userspace and synchronise all rendering before changing the framebuffer. I expect this not to cause noticeable latency on switching modes (far less than the actual modeswitch) and should stop these hangs once and for all. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=31401 (...) Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-11-03Downgrade tiling allocation failure to a warningChris Wilson1-1/+1
We emitted this message as an error even though we fallback and attempt to allocate a non-tiled framebuffer before failing (with an appropriate error message). Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-11-03Fallback to shadow for Sandybridge if we don't have access to the BLTChris Wilson1-0/+20
If we attempt to emit BLT batches without kernel support, we just end up with EINVAL and no rendering. Prevent this, and avoid uncached rendering, by restoring the shadow fallback paths if there is no BLT support. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-11-02Remove the intermittent GEM_THROTTLE call.Eric Anholt1-3/+0
This is a holdover from early GEM work when we weren't syncing on the DRI client side. It would keep clients from getting too far ahead and killing their interactivity, by bringing everyone to a halt when anyone was too far ahead. Now, GL clients throttle themselves to avoid the problem, and it turns out that in the case that they don't (long rendering to buffers with no swap), this actually reduces X Server interactivity: instead of lagging of X rendering behind input, you get no response for seconds at a time, then a burst of rendering, then nothing again. Reported by ajax. Tested with moving a window while running cairo-perf-trace on the GL backend (improvement) and X backend (no significant change in responsiveness).
2010-11-02render: use headerless render target writeXiang, Haihao2-10/+6
It is weird that some rendercheck cases only work fine with headerless write. Need to update intel-gen4asm to support headerless write Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
2010-11-02render: acceleration for composite on SandybridgeXiang, Haihao1-16/+670
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
2010-11-02render: fragments for composite on SandybridgeXiang, Haihao19-0/+246
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
2010-11-02render: fix send instruction used in sampling fragmentsXiang, Haihao9-9/+18
To prepare for composite on Sandybridge Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
2010-11-02render: set the surface state base addressXiang, Haihao1-51/+24
It is the same as commit 73d4c7d7 Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
2010-11-01Flush BLT batches before starting an atomic RENDER batchChris Wilson1-1/+4
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-11-01Support BLT acceleration on gen6Zou Nan hai2-34/+24
Signed-off-by: Zou Nan hai <nanhai.zou@intel.com> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-11-01add BLT ring supportZou Nan hai4-22/+45
gen6+ platform has a BLT engine with seperate command streamer to support BLT commands. Signed-off-by: Zou Nan hai <nanhai.zou@intel.com> [ickle: merge trivial conflict] Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
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