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AgeCommit message (Expand)AuthorFilesLines
2011-01-03If the crtc is not enabled, then it can't be onChris Wilson1-0/+3
2011-01-03dri2: Fix interlace computationAdam Jackson1-3/+2
2011-01-03xv: Fix interlace computationAdam Jackson1-1/+1
2011-01-03dri: Only issue a warning for an "impossible" flip return 5 timesChris Wilson1-4/+13
2011-01-02dri: Don't wait upon a NULL current modeChris Wilson1-2/+3
2011-01-02dri: Fix the use of the uninitialised bo for flinkChris Wilson1-2/+1
2010-12-31dri: Protect against using dri with an non-gem pixmapChris Wilson1-1/+1
2010-12-30Don't replace the scanout bo through PutImageChris Wilson3-9/+23
2010-12-24dri: Differentiate identical "get vblank failed" messages with line noChris Wilson1-4/+12
2010-12-23i830: amalgamate consecutive composites into a single primitiveChris Wilson3-5/+19
2010-12-22Remove the deprecated function 'XNFprintf'Chris Wilson1-7/+3
2010-12-20Undo: Disable BLT for i830 and 845GChris Wilson1-1/+3
2010-12-20G35 is gen4 and not gen3Chris Wilson1-1/+1
2010-12-16Check consistency of pageflip completion vblank count.Mario Kleiner1-2/+16
2010-12-16Fix reporting of pageflip completion events on multi-head.Mario Kleiner3-8/+54
2010-12-07Revert "i965: The RenderCache flush after every glyph is required for compiz"Chris Wilson1-1/+1
2010-12-07i965: Mark sure we mark reused render targets as dirtyChris Wilson1-19/+16
2010-12-07i965: The RenderCache flush after every glyph is required for compizChris Wilson1-1/+1
2010-12-07i965: Invalidate pixmap binding location on reuse.Chris Wilson1-0/+1
2010-12-07Always flush the batch before blocking for new X requestsChris Wilson1-1/+2
2010-12-06snb: Only emit CC and DepthStencil bos once per batchChris Wilson1-31/+37
2010-12-06snb: Restore drawrect, we need the implicit flushChris Wilson1-1/+2
2010-12-06snb: Cache pixmap binding locationsChris Wilson2-0/+19
2010-12-06snb: Cache state between composite opsChris Wilson2-16/+81
2010-12-06snb: Emit more invariants only onceChris Wilson1-75/+65
2010-12-05uxa: Prevent reading past the last byte on upload/downloadChris Wilson1-9/+10
2010-12-05Don't use hardware acceleration on Sandybridge rev 07 hardware or earlier.Matthias Hopf1-0/+11
2010-12-05display: Flush any pending batches before changing modes.Chris Wilson1-0/+4
2010-12-05i965: Also flush the vertex buffer when restarting the array.Chris Wilson1-0/+1
2010-12-05i965: Check for potential vertex array overflow every timeChris Wilson1-12/+12
2010-12-03Wait on the current buffer to complete when running synchronously.Chris Wilson4-34/+3
2010-12-03i965: Amalgamate surface binding tablesChris Wilson7-286/+265
2010-12-03i965: Upload an entire vbo in a single pwrite, rather than per-rectangleChris Wilson4-146/+129
2010-12-03i965: Use reciprocal scale factors to avoid the divide per-vertex-elementChris Wilson1-16/+16
2010-11-23Disable BLT for i830 and 845GChris Wilson3-7/+20
2010-11-17Mark outputs as DPMSModeOn and restore backlight at mode setKeith Packard1-1/+20
2010-11-14uxa: Relax fencing some more for gen3Chris Wilson1-7/+11
2010-11-09i915: Disable maximum state addressesChris Wilson1-5/+5
2010-11-05Wait for any pending rendering before switching modes.Chris Wilson2-0/+5
2010-11-03Downgrade tiling allocation failure to a warningChris Wilson1-1/+1
2010-11-03Fallback to shadow for Sandybridge if we don't have access to the BLTChris Wilson1-0/+20
2010-11-02Remove the intermittent GEM_THROTTLE call.Eric Anholt1-3/+0
2010-11-02render: use headerless render target writeXiang, Haihao2-10/+6
2010-11-02render: acceleration for composite on SandybridgeXiang, Haihao1-16/+670
2010-11-02render: fragments for composite on SandybridgeXiang, Haihao19-0/+246
2010-11-02render: fix send instruction used in sampling fragmentsXiang, Haihao9-9/+18
2010-11-02render: set the surface state base addressXiang, Haihao1-51/+24
2010-11-01Flush BLT batches before starting an atomic RENDER batchChris Wilson1-1/+4
2010-11-01Support BLT acceleration on gen6Zou Nan hai2-34/+24
2010-11-01add BLT ring supportZou Nan hai4-22/+45
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