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authorAnas Nashif <anas.nashif@intel.com>2012-11-06 21:16:29 -0800
committerAnas Nashif <anas.nashif@intel.com>2012-11-06 21:16:29 -0800
commit1501461b978a770b6fc8883901d6c3d177661667 (patch)
tree476568764b15008dce7c60e818480d3e5432e176 /src/render_program/Makefile.am
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Imported Upstream version 2.20.10upstream/2.20.10
Diffstat (limited to 'src/render_program/Makefile.am')
-rw-r--r--src/render_program/Makefile.am217
1 files changed, 217 insertions, 0 deletions
diff --git a/src/render_program/Makefile.am b/src/render_program/Makefile.am
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+INTEL_G4A = \
+ exa_sf.g4a \
+ exa_sf_mask.g4a \
+ exa_wm_src_affine.g4a \
+ exa_wm_src_projective.g4a \
+ exa_wm_src_sample_argb.g4a \
+ exa_wm_src_sample_a.g4a \
+ exa_wm_src_sample_planar.g4a \
+ exa_wm_mask_affine.g4a \
+ exa_wm_mask_projective.g4a \
+ exa_wm_mask_sample_argb.g4a \
+ exa_wm_mask_sample_a.g4a \
+ exa_wm_noca.g4a \
+ exa_wm_ca.g4a \
+ exa_wm_ca_srcalpha.g4a \
+ exa_wm_write.g4a \
+ exa_wm_yuv_rgb.g4a \
+ exa_wm_xy.g4a \
+ $(NULL)
+
+INTEL_G4I = \
+ exa_wm.g4i \
+ exa_wm_affine.g4i \
+ exa_wm_projective.g4i \
+ exa_wm_sample_planar.g4i \
+ exa_wm_src_sample_argb.g4i \
+ $(NULL)
+
+INTEL_G4B = \
+ exa_sf.g4b \
+ exa_sf_mask.g4b \
+ exa_wm_src_affine.g4b \
+ exa_wm_src_projective.g4b \
+ exa_wm_src_sample_argb.g4b \
+ exa_wm_src_sample_a.g4b \
+ exa_wm_src_sample_planar.g4b \
+ exa_wm_mask_affine.g4b \
+ exa_wm_mask_projective.g4b \
+ exa_wm_mask_sample_argb.g4b \
+ exa_wm_mask_sample_a.g4b \
+ exa_wm_noca.g4b \
+ exa_wm_ca.g4b \
+ exa_wm_ca_srcalpha.g4b \
+ exa_wm_write.g4b \
+ exa_wm_yuv_rgb.g4b \
+ exa_wm_xy.g4b \
+ $(NULL)
+
+
+INTEL_G4B_GEN5 = \
+ exa_sf.g4b.gen5 \
+ exa_sf_mask.g4b.gen5 \
+ exa_wm_src_affine.g4b.gen5 \
+ exa_wm_src_projective.g4b.gen5 \
+ exa_wm_src_sample_argb.g4b.gen5 \
+ exa_wm_src_sample_a.g4b.gen5 \
+ exa_wm_src_sample_planar.g4b.gen5 \
+ exa_wm_mask_affine.g4b.gen5 \
+ exa_wm_mask_projective.g4b.gen5 \
+ exa_wm_mask_sample_argb.g4b.gen5 \
+ exa_wm_mask_sample_a.g4b.gen5 \
+ exa_wm_noca.g4b.gen5 \
+ exa_wm_ca.g4b.gen5 \
+ exa_wm_ca_srcalpha.g4b.gen5 \
+ exa_wm_write.g4b.gen5 \
+ exa_wm_yuv_rgb.g4b.gen5 \
+ exa_wm_xy.g4b.gen5 \
+ $(NULL)
+
+INTEL_G5A = \
+ exa_sf.g5a \
+ exa_sf_mask.g5a \
+ exa_wm_src_affine.g5a \
+ exa_wm_src_projective.g5a \
+ exa_wm_src_sample_argb.g5a \
+ exa_wm_src_sample_a.g5a \
+ exa_wm_src_sample_planar.g5a \
+ exa_wm_mask_affine.g5a \
+ exa_wm_mask_projective.g5a \
+ exa_wm_mask_sample_argb.g5a \
+ exa_wm_mask_sample_a.g5a \
+ exa_wm_noca.g5a \
+ exa_wm_ca.g5a \
+ exa_wm_ca_srcalpha.g5a \
+ exa_wm_write.g5a \
+ exa_wm_yuv_rgb.g5a \
+ exa_wm_xy.g5a \
+ $(NULL)
+
+INTEL_G5B = \
+ exa_sf.g5b \
+ exa_sf_mask.g5b \
+ exa_wm_src_affine.g5b \
+ exa_wm_src_projective.g5b \
+ exa_wm_src_sample_argb.g5b \
+ exa_wm_src_sample_a.g5b \
+ exa_wm_src_sample_planar.g5b \
+ exa_wm_mask_affine.g5b \
+ exa_wm_mask_projective.g5b \
+ exa_wm_mask_sample_argb.g5b \
+ exa_wm_mask_sample_a.g5b \
+ exa_wm_noca.g5b \
+ exa_wm_ca.g5b \
+ exa_wm_ca_srcalpha.g5b \
+ exa_wm_write.g5b \
+ exa_wm_yuv_rgb.g5b \
+ exa_wm_xy.g5b \
+ $(NULL)
+
+INTEL_G6I = \
+ exa_wm_affine.g6i \
+ exa_wm_write.g6i \
+ $(NULL)
+
+INTEL_G6A = \
+ exa_wm_src_affine.g6a \
+ exa_wm_src_projective.g6a \
+ exa_wm_src_sample_argb.g6a \
+ exa_wm_src_sample_planar.g6a \
+ exa_wm_src_sample_a.g6a \
+ exa_wm_mask_affine.g6a \
+ exa_wm_mask_projective.g6a \
+ exa_wm_mask_sample_argb.g6a \
+ exa_wm_mask_sample_a.g6a \
+ exa_wm_ca.g6a \
+ exa_wm_ca_srcalpha.g6a \
+ exa_wm_noca.g6a \
+ exa_wm_write.g6a \
+ exa_wm_yuv_rgb.g6a \
+ $(NULL)
+
+INTEL_G6B = \
+ exa_wm_src_affine.g6b \
+ exa_wm_src_projective.g6b \
+ exa_wm_src_sample_argb.g6b \
+ exa_wm_src_sample_planar.g6b \
+ exa_wm_src_sample_a.g6b \
+ exa_wm_mask_affine.g6b \
+ exa_wm_mask_projective.g6b \
+ exa_wm_mask_sample_argb.g6b \
+ exa_wm_mask_sample_a.g6b \
+ exa_wm_ca.g6b \
+ exa_wm_ca_srcalpha.g6b \
+ exa_wm_noca.g6b \
+ exa_wm_write.g6b \
+ exa_wm_yuv_rgb.g6b \
+ $(NULL)
+
+INTEL_G7A = \
+ exa_wm_mask_affine.g7a \
+ exa_wm_mask_projective.g7a \
+ exa_wm_mask_sample_a.g7a \
+ exa_wm_mask_sample_argb.g7a \
+ exa_wm_src_affine.g7a \
+ exa_wm_src_projective.g7a \
+ exa_wm_src_sample_a.g7a \
+ exa_wm_src_sample_argb.g7a \
+ exa_wm_src_sample_planar.g7a \
+ exa_wm_write.g7a \
+ exa_wm_yuv_rgb.g7a \
+ $(NULL)
+
+INTEL_G7B = \
+ exa_wm_mask_affine.g7b \
+ exa_wm_mask_projective.g7b \
+ exa_wm_mask_sample_a.g7b \
+ exa_wm_mask_sample_argb.g7b \
+ exa_wm_src_affine.g7b \
+ exa_wm_src_projective.g7b \
+ exa_wm_src_sample_a.g7b \
+ exa_wm_src_sample_argb.g7b \
+ exa_wm_src_sample_planar.g7b \
+ exa_wm_write.g7b \
+ exa_wm_yuv_rgb.g7b \
+ $(NULL)
+
+EXTRA_DIST = \
+ $(INTEL_G4A) \
+ $(INTEL_G4I) \
+ $(INTEL_G4B) \
+ $(INTEL_G4B_GEN5)\
+ $(INTEL_G5A) \
+ $(INTEL_G5B) \
+ $(INTEL_G6A) \
+ $(INTEL_G6B) \
+ $(INTEL_G6I) \
+ $(INTEL_G7A) \
+ $(INTEL_G7B)
+
+if HAVE_GEN4ASM
+
+SUFFIXES = .g4a .g4b .g5a .g5b .g6a .g6b .g7a .g7b
+.g4a.g4b:
+ m4 -I$(srcdir) -s $< > $*.g4m && @INTEL_GEN4ASM@ -o $@ $*.g4m && @INTEL_GEN4ASM@ -g 5 -o $@.gen5 $*.g4m && rm $*.g4m
+
+.g5a.g5b:
+ m4 -I$(srcdir) -s $< > $*.g5m && @INTEL_GEN4ASM@ -g 5 -o $@ $*.g5m && rm $*.g5m
+
+.g6a.g6b:
+ m4 -I$(srcdir) -s $< > $*.g6m && @INTEL_GEN4ASM@ -g 6 -o $@ $*.g6m && rm $*.g6m
+
+.g7a.g7b:
+ m4 -I$(srcdir) -s $< > $*.g7m && @INTEL_GEN4ASM@ -g 7 -o $@ $*.g7m && rm $*.g7m
+
+$(INTEL_G4B): $(INTEL_G4I)
+$(INTEL_G5B): $(INTEL_G4I)
+$(INTEL_G6B): $(INTEL_G4I) $(INTEL_G6I)
+$(INTEL_G7B): $(INTEL_G4I) $(INTEL_G6I)
+
+BUILT_SOURCES= $(INTEL_G4B) $(INTEL_G5B) $(INTEL_G6B) $(INTEL_G7B)
+
+clean-local:
+ -rm -f $(INTEL_G4B) $(INTEL_G4B_GEN5)
+ -rm -f $(INTEL_G5B)
+ -rm -f $(INTEL_G6B)
+ -rm -f $(INTEL_G7B)
+endif