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Diffstat (limited to 'hw/microblaze/petalogix_s3adsp1800_mmu.c')
-rw-r--r--hw/microblaze/petalogix_s3adsp1800_mmu.c45
1 files changed, 33 insertions, 12 deletions
diff --git a/hw/microblaze/petalogix_s3adsp1800_mmu.c b/hw/microblaze/petalogix_s3adsp1800_mmu.c
index a46149443..6c45e206e 100644
--- a/hw/microblaze/petalogix_s3adsp1800_mmu.c
+++ b/hw/microblaze/petalogix_s3adsp1800_mmu.c
@@ -30,12 +30,10 @@
#include "sysemu/sysemu.h"
#include "hw/devices.h"
#include "hw/boards.h"
-#include "hw/xilinx.h"
#include "sysemu/blockdev.h"
#include "exec/address-spaces.h"
#include "boot.h"
-#include "pic_cpu.h"
#define LMB_BRAM_SIZE (128 * 1024)
#define FLASH_SIZE (16 * 1024 * 1024)
@@ -49,6 +47,10 @@
#define UARTLITE_BASEADDR 0x84000000
#define ETHLITE_BASEADDR 0x81000000
+#define TIMER_IRQ 0
+#define ETHLITE_IRQ 1
+#define UARTLITE_IRQ 3
+
static void machine_cpu_reset(MicroBlazeCPU *cpu)
{
CPUMBState *env = &cpu->env;
@@ -63,13 +65,12 @@ petalogix_s3adsp1800_init(QEMUMachineInitArgs *args)
const char *cpu_model = args->cpu_model;
DeviceState *dev;
MicroBlazeCPU *cpu;
- CPUMBState *env;
DriveInfo *dinfo;
int i;
hwaddr ddr_base = MEMORY_BASEADDR;
MemoryRegion *phys_lmb_bram = g_new(MemoryRegion, 1);
MemoryRegion *phys_ram = g_new(MemoryRegion, 1);
- qemu_irq irq[32], *cpu_irq;
+ qemu_irq irq[32];
MemoryRegion *sysmem = get_system_memory();
/* init CPUs */
@@ -77,7 +78,6 @@ petalogix_s3adsp1800_init(QEMUMachineInitArgs *args)
cpu_model = "microblaze";
}
cpu = cpu_mb_init(cpu_model);
- env = &cpu->env;
/* Attach emulated BRAM through the LMB. */
memory_region_init_ram(phys_lmb_bram, NULL,
@@ -96,19 +96,41 @@ petalogix_s3adsp1800_init(QEMUMachineInitArgs *args)
FLASH_SIZE >> 16,
1, 0x89, 0x18, 0x0000, 0x0, 1);
- cpu_irq = microblaze_pic_init_cpu(env);
- dev = xilinx_intc_create(INTC_BASEADDR, cpu_irq[0], 0xA);
+ dev = qdev_create(NULL, "xlnx.xps-intc");
+ qdev_prop_set_uint32(dev, "kind-of-intr",
+ 1 << ETHLITE_IRQ | 1 << UARTLITE_IRQ);
+ qdev_init_nofail(dev);
+ sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, INTC_BASEADDR);
+ sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0,
+ qdev_get_gpio_in(DEVICE(cpu), MB_CPU_IRQ));
for (i = 0; i < 32; i++) {
irq[i] = qdev_get_gpio_in(dev, i);
}
- sysbus_create_simple("xlnx.xps-uartlite", UARTLITE_BASEADDR, irq[3]);
+ sysbus_create_simple("xlnx.xps-uartlite", UARTLITE_BASEADDR,
+ irq[UARTLITE_IRQ]);
+
/* 2 timers at irq 2 @ 62 Mhz. */
- xilinx_timer_create(TIMER_BASEADDR, irq[0], 0, 62 * 1000000);
- xilinx_ethlite_create(&nd_table[0], ETHLITE_BASEADDR, irq[1], 0, 0);
+ dev = qdev_create(NULL, "xlnx.xps-timer");
+ qdev_prop_set_uint32(dev, "one-timer-only", 0);
+ qdev_prop_set_uint32(dev, "clock-frequency", 62 * 1000000);
+ qdev_init_nofail(dev);
+ sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, TIMER_BASEADDR);
+ sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, irq[TIMER_IRQ]);
+
+ qemu_check_nic_model(&nd_table[0], "xlnx.xps-ethernetlite");
+ dev = qdev_create(NULL, "xlnx.xps-ethernetlite");
+ qdev_set_nic_properties(dev, &nd_table[0]);
+ qdev_prop_set_uint32(dev, "tx-ping-pong", 0);
+ qdev_prop_set_uint32(dev, "rx-ping-pong", 0);
+ qdev_init_nofail(dev);
+ sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, ETHLITE_BASEADDR);
+ sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, irq[ETHLITE_IRQ]);
microblaze_load_kernel(cpu, ddr_base, ram_size,
- BINARY_DEVICE_TREE_FILE, machine_cpu_reset);
+ args->initrd_filename,
+ BINARY_DEVICE_TREE_FILE,
+ machine_cpu_reset);
}
static QEMUMachine petalogix_s3adsp1800_machine = {
@@ -116,7 +138,6 @@ static QEMUMachine petalogix_s3adsp1800_machine = {
.desc = "PetaLogix linux refdesign for xilinx Spartan 3ADSP1800",
.init = petalogix_s3adsp1800_init,
.is_default = 1,
- DEFAULT_MACHINE_OPTIONS,
};
static void petalogix_s3adsp1800_machine_init(void)