1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
354
355
356
357
358
359
360
361
362
363
364
365
366
367
368
369
370
371
372
373
374
|
/*********************************************************************/
/* Copyright 2009, 2010 The University of Texas at Austin. */
/* All rights reserved. */
/* */
/* Redistribution and use in source and binary forms, with or */
/* without modification, are permitted provided that the following */
/* conditions are met: */
/* */
/* 1. Redistributions of source code must retain the above */
/* copyright notice, this list of conditions and the following */
/* disclaimer. */
/* */
/* 2. Redistributions in binary form must reproduce the above */
/* copyright notice, this list of conditions and the following */
/* disclaimer in the documentation and/or other materials */
/* provided with the distribution. */
/* */
/* THIS SOFTWARE IS PROVIDED BY THE UNIVERSITY OF TEXAS AT */
/* AUSTIN ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, */
/* INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF */
/* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE */
/* DISCLAIMED. IN NO EVENT SHALL THE UNIVERSITY OF TEXAS AT */
/* AUSTIN OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, */
/* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES */
/* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE */
/* GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR */
/* BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF */
/* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT */
/* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT */
/* OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE */
/* POSSIBILITY OF SUCH DAMAGE. */
/* */
/* The views and conclusions contained in the software and */
/* documentation are those of the authors and should not be */
/* interpreted as representing official policies, either expressed */
/* or implied, of The University of Texas at Austin. */
/*********************************************************************/
#define ASSEMBLER
#include "common.h"
#if defined(OPTERON) || defined(BARCELONA)
#define PREFETCH prefetch
#define PREFETCHW prefetchw
#else
#define PREFETCH prefetcht0
#define PREFETCHW prefetcht0
#endif
#define PREFETCHSIZE (5 + 4 * 10)
#define STACK 16
#define ARGS 16
#define J 0 + STACK(%esp)
#define KK 4 + STACK(%esp)
#define KKK 8 + STACK(%esp)
#define M 4 + STACK + ARGS(%esp)
#define N 8 + STACK + ARGS(%esp)
#define K 12 + STACK + ARGS(%esp)
#define ALPHA_R 16 + STACK + ARGS(%esp)
#define ALPHA_I 32 + STACK + ARGS(%esp)
#define A 48 + STACK + ARGS(%esp)
#define ARG_B 52 + STACK + ARGS(%esp)
#define C 56 + STACK + ARGS(%esp)
#define ARG_LDC 60 + STACK + ARGS(%esp)
#define OFFSET 64 + STACK + ARGS(%esp)
#define I %esi
#define B %ebx
#define CO %edi
#define AO %edx
#define BO %ecx
#define LDC %ebp
#if defined(NN) || defined(NT) || defined(TN) || defined(TT)
#define ADD1 faddp
#define ADD2 fsubrp
#define ADD3 faddp
#define ADD4 faddp
#elif defined(RN) || defined(RT) || defined(CN) || defined(CT)
#define ADD1 faddp
#define ADD2 faddp
#define ADD3 fsubrp
#define ADD4 faddp
#elif defined(NR) || defined(NC) || defined(TR) || defined(TC)
#define ADD1 faddp
#define ADD2 faddp
#define ADD3 faddp
#define ADD4 fsubrp
#else
#define ADD1 faddp
#define ADD2 fsubrp
#define ADD3 fsubrp
#define ADD4 fsubrp
#endif
#define PREFETCH_OFFSET 48
PROLOGUE
subl $ARGS, %esp # Generate Stack Frame
pushl %ebp
pushl %edi
pushl %esi
pushl %ebx
PROFCODE
#if defined(TRMMKERNEL) && !defined(LEFT)
movl OFFSET, %eax
negl %eax
movl %eax, KK
#endif
movl ARG_LDC, LDC
movl ARG_B, B
addl $8 * SIZE, A
addl $8 * SIZE, B
sall $ZBASE_SHIFT, LDC
cmpl $0, M
jle .L999
movl N, %eax
movl %eax, J
testl %eax, %eax
jle .L999
ALIGN_4
.L01:
#if defined(TRMMKERNEL) && defined(LEFT)
movl OFFSET, %eax
movl %eax, KK
#endif
movl A, AO
movl C, CO
addl LDC, C
movl M, I
ALIGN_4
.L11:
#if !defined(TRMMKERNEL) || \
(defined(TRMMKERNEL) && defined(LEFT) && defined(TRANSA)) || \
(defined(TRMMKERNEL) && !defined(LEFT) && !defined(TRANSA))
movl B, BO
#else
movl KK, %eax
sall $ZBASE_SHIFT, %eax
leal (AO, %eax, 1), AO
leal (B, %eax, 1), BO
#endif
fldz
fldz
fldz
fldz
#if defined(HAVE_3DNOW)
prefetchw 2 * SIZE(CO)
#elif defined(HAVE_SSE)
prefetchnta 2 * SIZE(CO)
#endif
#ifndef TRMMKERNEL
movl K, %eax
#elif (defined(LEFT) && !defined(TRANSA)) || (!defined(LEFT) && defined(TRANSA))
movl K, %eax
subl KK, %eax
movl %eax, KKK
#else
movl KK, %eax
#ifdef LEFT
addl $1, %eax
#else
addl $1, %eax
#endif
movl %eax, KKK
#endif
sarl $2, %eax
je .L15
ALIGN_4
.L12:
PREFETCH (PREFETCHSIZE + 0) * SIZE(AO)
FLD -8 * SIZE(AO)
FLD -8 * SIZE(BO)
fld %st(1)
fmul %st(1), %st
ADD1 %st, %st(3)
FLD -7 * SIZE(BO)
fmul %st, %st(2)
FLD -7 * SIZE(AO)
fmul %st, %st(2)
fmulp %st, %st(1)
ADD2 %st, %st(6)
ADD3 %st, %st(3)
ADD4 %st, %st(3)
FLD -6 * SIZE(AO)
FLD -6 * SIZE(BO)
fld %st(1)
fmul %st(1), %st
ADD1 %st, %st(3)
FLD -5 * SIZE(BO)
fmul %st, %st(2)
FLD -5 * SIZE(AO)
fmul %st, %st(2)
fmulp %st, %st(1)
ADD2 %st, %st(6)
ADD3 %st, %st(3)
ADD4 %st, %st(3)
PREFETCH (PREFETCHSIZE + 4) * SIZE(AO)
FLD -4 * SIZE(AO)
FLD -4 * SIZE(BO)
fld %st(1)
fmul %st(1), %st
ADD1 %st, %st(3)
FLD -3 * SIZE(BO)
fmul %st, %st(2)
FLD -3 * SIZE(AO)
fmul %st, %st(2)
fmulp %st, %st(1)
ADD2 %st, %st(6)
ADD3 %st, %st(3)
ADD4 %st, %st(3)
FLD -2 * SIZE(AO)
FLD -2 * SIZE(BO)
fld %st(1)
fmul %st(1), %st
ADD1 %st, %st(3)
FLD -1 * SIZE(BO)
fmul %st, %st(2)
FLD -1 * SIZE(AO)
fmul %st, %st(2)
fmulp %st, %st(1)
ADD2 %st, %st(6)
ADD3 %st, %st(3)
ADD4 %st, %st(3)
addl $8 * SIZE,AO
addl $8 * SIZE,BO
decl %eax
jne .L12
ALIGN_4
.L15:
#ifndef TRMMKERNEL
movl K, %eax
#else
movl KKK, %eax
#endif
and $3, %eax
je .L18
ALIGN_4
.L16:
FLD -8 * SIZE(AO)
FLD -8 * SIZE(BO)
fld %st(1)
fmul %st(1), %st
ADD1 %st, %st(3)
FLD -7 * SIZE(BO)
fmul %st, %st(2)
FLD -7 * SIZE(AO)
fmul %st, %st(2)
fmulp %st, %st(1)
ADD2 %st, %st(6)
ADD3 %st, %st(3)
ADD4 %st, %st(3)
addl $2 * SIZE,AO
addl $2 * SIZE,BO
decl %eax
jne .L16
ALIGN_4
.L18:
faddp %st, %st(3)
faddp %st, %st(1)
#ifndef TRMMKERNEL
FLD ALPHA_R
fld %st
fmul %st(2), %st
fxch %st(1)
fmul %st(3), %st
FLD ALPHA_I
fmul %st, %st(3)
fmulp %st, %st(4)
fsubp %st, %st(2)
faddp %st, %st(2)
FLD 0 * SIZE(CO)
faddp %st, %st(1)
FST 0 * SIZE(CO)
FLD 1 * SIZE(CO)
faddp %st, %st(1)
FST 1 * SIZE(CO)
#else
FST 1 * SIZE(CO)
FST 0 * SIZE(CO)
#endif
#if (defined(TRMMKERNEL) && defined(LEFT) && defined(TRANSA)) || \
(defined(TRMMKERNEL) && !defined(LEFT) && !defined(TRANSA))
movl K, %eax
subl KKK, %eax
sall $ZBASE_SHIFT, %eax
leal (AO, %eax, 1), AO
leal (BO, %eax, 1), BO
#endif
#if defined(TRMMKERNEL) && defined(LEFT)
addl $1, KK
#endif
addl $2 * SIZE, CO
decl I
jne .L11
#if defined(TRMMKERNEL) && !defined(LEFT)
addl $1, KK
#endif
movl BO, B
decl J
jne .L01
ALIGN_4
.L999:
popl %ebx
popl %esi
popl %edi
popl %ebp
addl $ARGS, %esp
ret
EPILOGUE
|