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author | H. Peter Anvin <hpa@zytor.com> | 2009-05-08 18:01:21 -0700 |
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committer | H. Peter Anvin <hpa@zytor.com> | 2009-05-08 18:01:21 -0700 |
commit | 40b81a40c73f463de5153be064f52a5ba2139134 (patch) | |
tree | 87a00a5822008168b1f0dc1ba08f06cce03d621d /nasm.h | |
parent | 03b9f941336d901e32054efc8cda20a3cc3916d3 (diff) | |
download | nasm-40b81a40c73f463de5153be064f52a5ba2139134.tar.gz nasm-40b81a40c73f463de5153be064f52a5ba2139134.tar.bz2 nasm-40b81a40c73f463de5153be064f52a5ba2139134.zip |
Add symbolic constants for REX_V "classes" (VEX, XOP, ...)
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
Diffstat (limited to 'nasm.h')
-rw-r--r-- | nasm.h | 8 |
1 files changed, 8 insertions, 0 deletions
@@ -602,6 +602,14 @@ enum ccode { /* condition code names */ #define REX_V 0x0400 /* Instruction uses VEX/XOP instead of REX */ /* + * REX_V "classes" (prefixes which behave like VEX) + */ +enum vex_class { + RV_VEX = 0, /* C4/C5 */ + RV_XOP = 1 /* 8F */ +}; + +/* * Note that because segment registers may be used as instruction * prefixes, we must ensure the enumerations for prefixes and * register names do not overlap. |