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| author | H. Peter Anvin <hpa@zytor.com> | 2008-10-07 10:05:10 -0700 |
|---|---|---|
| committer | H. Peter Anvin <hpa@zytor.com> | 2008-10-07 10:05:10 -0700 |
| commit | 588df78b0dcba0416fa172c6a8b16f712fa3befc (patch) | |
| tree | 7c0182754f5a39f3994fa49239883b8c48372f15 /insns.pl | |
| parent | f70fce6cc9a1a55822a2b0fac858c1fd9f6c1731 (diff) | |
| download | nasm-588df78b0dcba0416fa172c6a8b16f712fa3befc.tar.gz nasm-588df78b0dcba0416fa172c6a8b16f712fa3befc.tar.bz2 nasm-588df78b0dcba0416fa172c6a8b16f712fa3befc.zip | |
New opcode for 32->64 bit sign-extended immediate with warning
Add a new opcode for 32->64 bit sign-extended immediate, with warning
on the number not matching.
This unfortunately calls for an audit of all the \4[0123] opcodes, if
they should be replaced by \25[4567]. This only replaces one
instruction (MOV reg64,imm32); other instructions need to be
considered.
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
Diffstat (limited to 'insns.pl')
| -rwxr-xr-x | insns.pl | 4 |
1 files changed, 3 insertions, 1 deletions
@@ -658,7 +658,7 @@ sub byte_code_compile($) { # This allows us to match the AMD documentation and still # do the right thing. unshift(@codes, 0160+$oppos{'d'}+($oc0 ? 4 : 0)); - } elsif ($op =~ /^(ib\,s|ib|ib\,w|iw|iwd|id|iwdq|rel|rel8|rel16|rel32|iq|seg|ibw|ibd|ibd,s)$/) { + } elsif ($op =~ /^(ib\,s|ib|ibx|ib\,w|iw|iwd|id|idx|iwdq|rel|rel8|rel16|rel32|iq|seg|ibw|ibd|ibd,s)$/) { if (!defined($oppos{'i'})) { die "$fname: $line: $op without 'i' operand\n"; } @@ -676,6 +676,8 @@ sub byte_code_compile($) { push(@codes, 034+$oppos{'i'}); } elsif ($op eq 'id') { # imm32 push(@codes, 040+$oppos{'i'}); + } elsif ($op eq 'idx') { # imm32 extended to 64 bits + push(@codes, 0254+$oppos{'i'}); } elsif ($op eq 'iwdq') { # imm16/32/64, depending on opsize push(@codes, 044+$oppos{'i'}); } elsif ($op eq 'rel8') { |