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| author | Jin Kyu Song <jin.kyu.song@intel.com> | 2013-09-13 14:12:55 -0700 |
|---|---|---|
| committer | Cyrill Gorcunov <gorcunov@gmail.com> | 2013-09-14 01:27:02 +0400 |
| commit | d4b2b5f17ce7b9fde637eec86bdf035b7b8abb22 (patch) | |
| tree | 93a0e1b8f9a612fec2a462cf70650f92334b3198 /insns.h | |
| parent | c257bb6ae0d8f88e69a7ef30069aa0f1839de468 (diff) | |
| download | nasm-d4b2b5f17ce7b9fde637eec86bdf035b7b8abb22.tar.gz nasm-d4b2b5f17ce7b9fde637eec86bdf035b7b8abb22.tar.bz2 nasm-d4b2b5f17ce7b9fde637eec86bdf035b7b8abb22.zip | |
AVX-512: Add AVX-512CD instructions
Added Conflict Detection (AVX-512CD) instructions.
These instructions are supported
if CPUID.(EAX=07H, ECX=0):EBX.AVX512CD[bit 28] = 1.
Signed-off-by: Jin Kyu Song <jin.kyu.song@intel.com>
Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
Diffstat (limited to 'insns.h')
| -rw-r--r-- | insns.h | 1 |
1 files changed, 1 insertions, 0 deletions
@@ -128,6 +128,7 @@ extern const uint8_t nasm_bytecodes[]; #define IF_TBM 0x1300000000UL /* HACK NEED TO REORGANIZE THESE BITS */ #define IF_RTM 0x1400000000UL /* HACK NEED TO REORGANIZE THESE BITS */ #define IF_INVPCID 0x1500000000UL /* HACK NEED TO REORGANIZE THESE BITS */ +#define IF_AVX512CD 0x1600000000UL /* AVX-512 Conflict Detection insns */ #define IF_INSMASK 0xFF00000000UL /* the mask for instruction set types */ #define IF_PMASK 0xFF000000UL /* the mask for processor types */ #define IF_PLEVEL 0x0F000000UL /* the mask for processor instr. level */ |