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| author | Jin Kyu Song <jin.kyu.song@intel.com> | 2013-09-13 14:12:57 -0700 |
|---|---|---|
| committer | Cyrill Gorcunov <gorcunov@gmail.com> | 2013-09-14 01:27:10 +0400 |
| commit | eb595942b2c9421548d110e511d12823f38cffbf (patch) | |
| tree | 61c470c56634bcfe31b4519eb9870d20c9c8d157 /insns.dat | |
| parent | dd1c0c13c80aa9b034dc3755e2ccc451c63ec6a4 (diff) | |
| download | nasm-eb595942b2c9421548d110e511d12823f38cffbf.tar.gz nasm-eb595942b2c9421548d110e511d12823f38cffbf.tar.bz2 nasm-eb595942b2c9421548d110e511d12823f38cffbf.zip | |
AVX-512: Added AVX-512PF instructions
Added Prefetch (AVX-512PF) instructions.
These instructions are supported
if CPUID.(EAX=07H, ECX=0):EBX.AVX512PF[bit 26] = 1.
CPUID feature flag for PREFETCHWT1 is TBD
but PREFETCHWT1 is included in this commit.
Signed-off-by: Jin Kyu Song <jin.kyu.song@intel.com>
Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
Diffstat (limited to 'insns.dat')
| -rw-r--r-- | insns.dat | 18 |
1 files changed, 18 insertions, 0 deletions
@@ -4074,6 +4074,24 @@ VRSQRT28PD zmmreg|mask|z,zmmrm512|b64|sae [rm:fv: evex.512.66.0f38 VRSQRT28PS zmmreg|mask|z,zmmrm512|b32|sae [rm:fv: evex.512.66.0f38.w0 cc /r ] AVX512ER,FUTURE VRSQRT28SD xmmreg|mask|z,xmmreg,xmmrm64|sae [rvm:t1s: evex.nds.lig.66.0f38.w1 cd /r ] AVX512ER,FUTURE VRSQRT28SS xmmreg|mask|z,xmmreg,xmmrm32|sae [rvm:t1s: evex.nds.lig.66.0f38.w0 cd /r ] AVX512ER,FUTURE +; AVX-512PF (Prefetch) instructions +VGATHERPF0DPD ymem64|mask [m:t1s: vsiby evex.512.66.0f38.w1 c6 /1 ] AVX512PF,FUTURE +VGATHERPF0DPS zmem32|mask [m:t1s: vsibz evex.512.66.0f38.w0 c6 /1 ] AVX512PF,FUTURE +VGATHERPF0QPD zmem64|mask [m:t1s: vsibz evex.512.66.0f38.w1 c7 /1 ] AVX512PF,FUTURE +VGATHERPF0QPS zmem32|mask [m:t1s: vsibz evex.512.66.0f38.w0 c7 /1 ] AVX512PF,FUTURE +VGATHERPF1DPD ymem64|mask [m:t1s: vsiby evex.512.66.0f38.w1 c6 /2 ] AVX512PF,FUTURE +VGATHERPF1DPS zmem32|mask [m:t1s: vsibz evex.512.66.0f38.w0 c6 /2 ] AVX512PF,FUTURE +VGATHERPF1QPD zmem64|mask [m:t1s: vsibz evex.512.66.0f38.w1 c7 /2 ] AVX512PF,FUTURE +VGATHERPF1QPS zmem32|mask [m:t1s: vsibz evex.512.66.0f38.w0 c7 /2 ] AVX512PF,FUTURE +VSCATTERPF0DPD ymem64|mask [m:t1s: vsiby evex.512.66.0f38.w1 c6 /5 ] AVX512PF,FUTURE +VSCATTERPF0DPS zmem32|mask [m:t1s: vsibz evex.512.66.0f38.w0 c6 /5 ] AVX512PF,FUTURE +VSCATTERPF0QPD zmem64|mask [m:t1s: vsibz evex.512.66.0f38.w1 c7 /5 ] AVX512PF,FUTURE +VSCATTERPF0QPS zmem32|mask [m:t1s: vsibz evex.512.66.0f38.w0 c7 /5 ] AVX512PF,FUTURE +VSCATTERPF1DPD ymem64|mask [m:t1s: vsiby evex.512.66.0f38.w1 c6 /6 ] AVX512PF,FUTURE +VSCATTERPF1DPS zmem32|mask [m:t1s: vsibz evex.512.66.0f38.w0 c6 /6 ] AVX512PF,FUTURE +VSCATTERPF1QPD zmem64|mask [m:t1s: vsibz evex.512.66.0f38.w1 c7 /6 ] AVX512PF,FUTURE +VSCATTERPF1QPS zmem32|mask [m:t1s: vsibz evex.512.66.0f38.w0 c7 /6 ] AVX512PF,FUTURE +PREFETCHWT1 mem8 [m: 0f 0d /2 ] FUTURE ;# Systematic names for the hinting nop instructions |