diff options
| author | H. Peter Anvin <hpa@linux.intel.com> | 2009-03-16 11:49:27 -0700 |
|---|---|---|
| committer | H. Peter Anvin <hpa@linux.intel.com> | 2009-03-16 11:49:27 -0700 |
| commit | b8abbbe826d3ad7500c94cb730991667ec964685 (patch) | |
| tree | 5e97edf325ff856080f915793f796f5334093c90 /insns.dat | |
| parent | e095cb8009f3b49b77df4909c69a1635f0398d11 (diff) | |
| download | nasm-b8abbbe826d3ad7500c94cb730991667ec964685.tar.gz nasm-b8abbbe826d3ad7500c94cb730991667ec964685.tar.bz2 nasm-b8abbbe826d3ad7500c94cb730991667ec964685.zip | |
insns.dat: fix VFNM instructions incorrectly spelled as VFMN
The scalar versions of the VFNM instructions had been incorrectly
spelled VFMN.
Diffstat (limited to 'insns.dat')
| -rw-r--r-- | insns.dat | 96 |
1 files changed, 48 insertions, 48 deletions
@@ -3460,54 +3460,54 @@ VFMADD321SS xmmreg,xmmreg,xmmrm [rvm: vex.dds.128.66.0f38.w0 9b /r] FMA,FUTURE VFMADD321SS xmmreg,xmmrm [r+vm: vex.dds.128.66.0f38.w0 9b /r] FMA,FUTURE,SD VFMADD321SD xmmreg,xmmreg,xmmrm [rvm: vex.dds.128.66.0f38.w1 9b /r] FMA,FUTURE,SQ VFMADD321SD xmmreg,xmmrm [r+vm: vex.dds.128.66.0f38.w1 9b /r] FMA,FUTURE,SQ -VFMNADD132SS xmmreg,xmmreg,xmmrm [rvm: vex.dds.128.66.0f38.w0 9c /r] FMA,FUTURE,SD -VFMNADD132SS xmmreg,xmmrm [r+vm: vex.dds.128.66.0f38.w0 9c /r] FMA,FUTURE,SD -VFMNADD132SD xmmreg,xmmreg,xmmrm [rvm: vex.dds.128.66.0f38.w1 9c /r] FMA,FUTURE,SQ -VFMNADD132SD xmmreg,xmmrm [r+vm: vex.dds.128.66.0f38.w1 9c /r] FMA,FUTURE,SQ -VFMNADD312SS xmmreg,xmmreg,xmmrm [rvm: vex.dds.128.66.0f38.w0 9c /r] FMA,FUTURE,SD -VFMNADD312SS xmmreg,xmmrm [r+vm: vex.dds.128.66.0f38.w0 9c /r] FMA,FUTURE,SD -VFMNADD312SD xmmreg,xmmreg,xmmrm [rvm: vex.dds.128.66.0f38.w1 9c /r] FMA,FUTURE,SQ -VFMNADD312SD xmmreg,xmmrm [r+vm: vex.dds.128.66.0f38.w1 9c /r] FMA,FUTURE,SQ -VFMNADD213SS xmmreg,xmmreg,xmmrm [rvm: vex.dds.128.66.0f38.w0 9d /r] FMA,FUTURE,SD -VFMNADD213SS xmmreg,xmmrm [r+vm: vex.dds.128.66.0f38.w0 9d /r] FMA,FUTURE,SD -VFMNADD213SD xmmreg,xmmreg,xmmrm [rvm: vex.dds.128.66.0f38.w1 9d /r] FMA,FUTURE,SQ -VFMNADD213SD xmmreg,xmmrm [r+vm: vex.dds.128.66.0f38.w1 9d /r] FMA,FUTURE,SQ -VFMNADD123SS xmmreg,xmmreg,xmmrm [rvm: vex.dds.128.66.0f38.w0 9d /r] FMA,FUTURE,SD -VFMNADD123SS xmmreg,xmmrm [r+vm: vex.dds.128.66.0f38.w0 9d /r] FMA,FUTURE,SD -VFMNADD123SD xmmreg,xmmreg,xmmrm [rvm: vex.dds.128.66.0f38.w1 9d /r] FMA,FUTURE,SQ -VFMNADD123SD xmmreg,xmmrm [r+vm: vex.dds.128.66.0f38.w1 9d /r] FMA,FUTURE,SQ -VFMNADD231SS xmmreg,xmmreg,xmmrm [rvm: vex.dds.128.66.0f38.w0 9e /r] FMA,FUTURE,SD -VFMNADD231SS xmmreg,xmmrm [r+vm: vex.dds.128.66.0f38.w0 9e /r] FMA,FUTURE,SD -VFMNADD231SD xmmreg,xmmreg,xmmrm [rvm: vex.dds.128.66.0f38.w1 9e /r] FMA,FUTURE,SQ -VFMNADD231SD xmmreg,xmmrm [r+vm: vex.dds.128.66.0f38.w1 9e /r] FMA,FUTURE,SQ -VFMNADD321SS xmmreg,xmmreg,xmmrm [rvm: vex.dds.128.66.0f38.w0 9e /r] FMA,FUTURE,SD -VFMNADD321SS xmmreg,xmmrm [r+vm: vex.dds.128.66.0f38.w0 9e /r] FMA,FUTURE,SD -VFMNADD321SD xmmreg,xmmreg,xmmrm [rvm: vex.dds.128.66.0f38.w1 9e /r] FMA,FUTURE,SQ -VFMNADD321SD xmmreg,xmmrm [r+vm: vex.dds.128.66.0f38.w1 9e /r] FMA,FUTURE,SQ -VFMNSUB132SS xmmreg,xmmreg,xmmrm [rvm: vex.dds.128.66.0f38.w0 9f /r] FMA,FUTURE,SD -VFMNSUB132SS xmmreg,xmmrm [r+vm: vex.dds.128.66.0f38.w0 9f /r] FMA,FUTURE,SD -VFMNSUB132SD xmmreg,xmmreg,xmmrm [rvm: vex.dds.128.66.0f38.w1 9f /r] FMA,FUTURE,SQ -VFMNSUB132SD xmmreg,xmmrm [r+vm: vex.dds.128.66.0f38.w1 9f /r] FMA,FUTURE,SQ -VFMNSUB312SS xmmreg,xmmreg,xmmrm [rvm: vex.dds.128.66.0f38.w0 9f /r] FMA,FUTURE,SD -VFMNSUB312SS xmmreg,xmmrm [r+vm: vex.dds.128.66.0f38.w0 9f /r] FMA,FUTURE,SD -VFMNSUB312SD xmmreg,xmmreg,xmmrm [rvm: vex.dds.128.66.0f38.w1 9f /r] FMA,FUTURE,SQ -VFMNSUB312SD xmmreg,xmmrm [r+vm: vex.dds.128.66.0f38.w1 9f /r] FMA,FUTURE,SQ -VFMNSUB213SS xmmreg,xmmreg,xmmrm [rvm: vex.dds.128.66.0f38.w0 a0 /r] FMA,FUTURE,SD -VFMNSUB213SS xmmreg,xmmrm [r+vm: vex.dds.128.66.0f38.w0 a0 /r] FMA,FUTURE,SD -VFMNSUB213SD xmmreg,xmmreg,xmmrm [rvm: vex.dds.128.66.0f38.w1 a0 /r] FMA,FUTURE,SQ -VFMNSUB213SD xmmreg,xmmrm [r+vm: vex.dds.128.66.0f38.w1 a0 /r] FMA,FUTURE,SQ -VFMNSUB123SS xmmreg,xmmreg,xmmrm [rvm: vex.dds.128.66.0f38.w0 a0 /r] FMA,FUTURE,SD -VFMNSUB123SS xmmreg,xmmrm [r+vm: vex.dds.128.66.0f38.w0 a0 /r] FMA,FUTURE,SD -VFMNSUB123SD xmmreg,xmmreg,xmmrm [rvm: vex.dds.128.66.0f38.w1 a0 /r] FMA,FUTURE,SQ -VFMNSUB123SD xmmreg,xmmrm [r+vm: vex.dds.128.66.0f38.w1 a0 /r] FMA,FUTURE,SQ -VFMNSUB231SS xmmreg,xmmreg,xmmrm [rvm: vex.dds.128.66.0f38.w0 a1 /r] FMA,FUTURE,SD -VFMNSUB231SS xmmreg,xmmrm [r+vm: vex.dds.128.66.0f38.w0 a1 /r] FMA,FUTURE,SD -VFMNSUB231SD xmmreg,xmmreg,xmmrm [rvm: vex.dds.128.66.0f38.w1 a1 /r] FMA,FUTURE,SQ -VFMNSUB231SD xmmreg,xmmrm [r+vm: vex.dds.128.66.0f38.w1 a1 /r] FMA,FUTURE,SQ -VFMNSUB321SS xmmreg,xmmreg,xmmrm [rvm: vex.dds.128.66.0f38.w0 a1 /r] FMA,FUTURE,SD -VFMNSUB321SS xmmreg,xmmrm [r+vm: vex.dds.128.66.0f38.w0 a1 /r] FMA,FUTURE,SD -VFMNSUB321SD xmmreg,xmmreg,xmmrm [rvm: vex.dds.128.66.0f38.w1 a1 /r] FMA,FUTURE,SQ -VFMNSUB321SD xmmreg,xmmrm [r+vm: vex.dds.128.66.0f38.w1 a1 /r] FMA,FUTURE,SQ +VFNMADD132SS xmmreg,xmmreg,xmmrm [rvm: vex.dds.128.66.0f38.w0 9c /r] FMA,FUTURE,SD +VFNMADD132SS xmmreg,xmmrm [r+vm: vex.dds.128.66.0f38.w0 9c /r] FMA,FUTURE,SD +VFNMADD132SD xmmreg,xmmreg,xmmrm [rvm: vex.dds.128.66.0f38.w1 9c /r] FMA,FUTURE,SQ +VFNMADD132SD xmmreg,xmmrm [r+vm: vex.dds.128.66.0f38.w1 9c /r] FMA,FUTURE,SQ +VFNMADD312SS xmmreg,xmmreg,xmmrm [rvm: vex.dds.128.66.0f38.w0 9c /r] FMA,FUTURE,SD +VFNMADD312SS xmmreg,xmmrm [r+vm: vex.dds.128.66.0f38.w0 9c /r] FMA,FUTURE,SD +VFNMADD312SD xmmreg,xmmreg,xmmrm [rvm: vex.dds.128.66.0f38.w1 9c /r] FMA,FUTURE,SQ +VFNMADD312SD xmmreg,xmmrm [r+vm: vex.dds.128.66.0f38.w1 9c /r] FMA,FUTURE,SQ +VFNMADD213SS xmmreg,xmmreg,xmmrm [rvm: vex.dds.128.66.0f38.w0 9d /r] FMA,FUTURE,SD +VFNMADD213SS xmmreg,xmmrm [r+vm: vex.dds.128.66.0f38.w0 9d /r] FMA,FUTURE,SD +VFNMADD213SD xmmreg,xmmreg,xmmrm [rvm: vex.dds.128.66.0f38.w1 9d /r] FMA,FUTURE,SQ +VFNMADD213SD xmmreg,xmmrm [r+vm: vex.dds.128.66.0f38.w1 9d /r] FMA,FUTURE,SQ +VFNMADD123SS xmmreg,xmmreg,xmmrm [rvm: vex.dds.128.66.0f38.w0 9d /r] FMA,FUTURE,SD +VFNMADD123SS xmmreg,xmmrm [r+vm: vex.dds.128.66.0f38.w0 9d /r] FMA,FUTURE,SD +VFNMADD123SD xmmreg,xmmreg,xmmrm [rvm: vex.dds.128.66.0f38.w1 9d /r] FMA,FUTURE,SQ +VFNMADD123SD xmmreg,xmmrm [r+vm: vex.dds.128.66.0f38.w1 9d /r] FMA,FUTURE,SQ +VFNMADD231SS xmmreg,xmmreg,xmmrm [rvm: vex.dds.128.66.0f38.w0 9e /r] FMA,FUTURE,SD +VFNMADD231SS xmmreg,xmmrm [r+vm: vex.dds.128.66.0f38.w0 9e /r] FMA,FUTURE,SD +VFNMADD231SD xmmreg,xmmreg,xmmrm [rvm: vex.dds.128.66.0f38.w1 9e /r] FMA,FUTURE,SQ +VFNMADD231SD xmmreg,xmmrm [r+vm: vex.dds.128.66.0f38.w1 9e /r] FMA,FUTURE,SQ +VFNMADD321SS xmmreg,xmmreg,xmmrm [rvm: vex.dds.128.66.0f38.w0 9e /r] FMA,FUTURE,SD +VFNMADD321SS xmmreg,xmmrm [r+vm: vex.dds.128.66.0f38.w0 9e /r] FMA,FUTURE,SD +VFNMADD321SD xmmreg,xmmreg,xmmrm [rvm: vex.dds.128.66.0f38.w1 9e /r] FMA,FUTURE,SQ +VFNMADD321SD xmmreg,xmmrm [r+vm: vex.dds.128.66.0f38.w1 9e /r] FMA,FUTURE,SQ +VFNMSUB132SS xmmreg,xmmreg,xmmrm [rvm: vex.dds.128.66.0f38.w0 9f /r] FMA,FUTURE,SD +VFNMSUB132SS xmmreg,xmmrm [r+vm: vex.dds.128.66.0f38.w0 9f /r] FMA,FUTURE,SD +VFNMSUB132SD xmmreg,xmmreg,xmmrm [rvm: vex.dds.128.66.0f38.w1 9f /r] FMA,FUTURE,SQ +VFNMSUB132SD xmmreg,xmmrm [r+vm: vex.dds.128.66.0f38.w1 9f /r] FMA,FUTURE,SQ +VFNMSUB312SS xmmreg,xmmreg,xmmrm [rvm: vex.dds.128.66.0f38.w0 9f /r] FMA,FUTURE,SD +VFNMSUB312SS xmmreg,xmmrm [r+vm: vex.dds.128.66.0f38.w0 9f /r] FMA,FUTURE,SD +VFNMSUB312SD xmmreg,xmmreg,xmmrm [rvm: vex.dds.128.66.0f38.w1 9f /r] FMA,FUTURE,SQ +VFNMSUB312SD xmmreg,xmmrm [r+vm: vex.dds.128.66.0f38.w1 9f /r] FMA,FUTURE,SQ +VFNMSUB213SS xmmreg,xmmreg,xmmrm [rvm: vex.dds.128.66.0f38.w0 a0 /r] FMA,FUTURE,SD +VFNMSUB213SS xmmreg,xmmrm [r+vm: vex.dds.128.66.0f38.w0 a0 /r] FMA,FUTURE,SD +VFNMSUB213SD xmmreg,xmmreg,xmmrm [rvm: vex.dds.128.66.0f38.w1 a0 /r] FMA,FUTURE,SQ +VFNMSUB213SD xmmreg,xmmrm [r+vm: vex.dds.128.66.0f38.w1 a0 /r] FMA,FUTURE,SQ +VFNMSUB123SS xmmreg,xmmreg,xmmrm [rvm: vex.dds.128.66.0f38.w0 a0 /r] FMA,FUTURE,SD +VFNMSUB123SS xmmreg,xmmrm [r+vm: vex.dds.128.66.0f38.w0 a0 /r] FMA,FUTURE,SD +VFNMSUB123SD xmmreg,xmmreg,xmmrm [rvm: vex.dds.128.66.0f38.w1 a0 /r] FMA,FUTURE,SQ +VFNMSUB123SD xmmreg,xmmrm [r+vm: vex.dds.128.66.0f38.w1 a0 /r] FMA,FUTURE,SQ +VFNMSUB231SS xmmreg,xmmreg,xmmrm [rvm: vex.dds.128.66.0f38.w0 a1 /r] FMA,FUTURE,SD +VFNMSUB231SS xmmreg,xmmrm [r+vm: vex.dds.128.66.0f38.w0 a1 /r] FMA,FUTURE,SD +VFNMSUB231SD xmmreg,xmmreg,xmmrm [rvm: vex.dds.128.66.0f38.w1 a1 /r] FMA,FUTURE,SQ +VFNMSUB231SD xmmreg,xmmrm [r+vm: vex.dds.128.66.0f38.w1 a1 /r] FMA,FUTURE,SQ +VFNMSUB321SS xmmreg,xmmreg,xmmrm [rvm: vex.dds.128.66.0f38.w0 a1 /r] FMA,FUTURE,SD +VFNMSUB321SS xmmreg,xmmrm [r+vm: vex.dds.128.66.0f38.w0 a1 /r] FMA,FUTURE,SD +VFNMSUB321SD xmmreg,xmmreg,xmmrm [rvm: vex.dds.128.66.0f38.w1 a1 /r] FMA,FUTURE,SQ +VFNMSUB321SD xmmreg,xmmrm [r+vm: vex.dds.128.66.0f38.w1 a1 /r] FMA,FUTURE,SQ VFMSUB132SS xmmreg,xmmreg,xmmrm [rvm: vex.dds.128.66.0f38.w0 9b /r] FMA,FUTURE,SD VFMSUB132SS xmmreg,xmmrm [r+vm: vex.dds.128.66.0f38.w0 9b /r] FMA,FUTURE,SD VFMSUB132SD xmmreg,xmmreg,xmmrm [rvm: vex.dds.128.66.0f38.w1 9b /r] FMA,FUTURE,SQ |