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| author | H. Peter Anvin <hpa@zytor.com> | 2007-09-22 18:23:20 -0700 |
|---|---|---|
| committer | H. Peter Anvin <hpa@zytor.com> | 2007-09-22 18:23:20 -0700 |
| commit | 57f38cdc0bcbad8c79905f9dadecbf9d3fe7d5bf (patch) | |
| tree | 24583f706535ba391d60692e8dc1d03b8d839a3d /insns.dat | |
| parent | 269700972c2016492d6373b68712af485b0d97e2 (diff) | |
| download | nasm-57f38cdc0bcbad8c79905f9dadecbf9d3fe7d5bf.tar.gz nasm-57f38cdc0bcbad8c79905f9dadecbf9d3fe7d5bf.tar.bz2 nasm-57f38cdc0bcbad8c79905f9dadecbf9d3fe7d5bf.zip | |
Tag UMOV as ND (no disassembly) to avoid collision
The UMOV opcodes have been recycled; tag UMOV as ND until we have a
better way to specify to the disassembler exactly how it wants
instructions interpreted.
Diffstat (limited to 'insns.dat')
| -rw-r--r-- | insns.dat | 24 |
1 files changed, 12 insertions, 12 deletions
@@ -1284,18 +1284,18 @@ TEST mem,imm32 \321\300\1\xF7\200\41 386,SM UD0 void \2\x0F\xFF 286,UNDOC UD1 void \2\x0F\xB9 286,UNDOC UD2 void \2\x0F\x0B 286 -UMOV mem,reg8 \300\2\x0F\x10\101 386,UNDOC,SM -UMOV reg8,reg8 \2\x0F\x10\101 386,UNDOC -UMOV mem,reg16 \320\300\2\x0F\x11\101 386,UNDOC,SM -UMOV reg16,reg16 \320\2\x0F\x11\101 386,UNDOC -UMOV mem,reg32 \321\300\2\x0F\x11\101 386,UNDOC,SM -UMOV reg32,reg32 \321\2\x0F\x11\101 386,UNDOC -UMOV reg8,mem \301\2\x0F\x12\110 386,UNDOC,SM -UMOV reg8,reg8 \2\x0F\x12\110 386,UNDOC -UMOV reg16,mem \320\301\2\x0F\x13\110 386,UNDOC,SM -UMOV reg16,reg16 \320\2\x0F\x13\110 386,UNDOC -UMOV reg32,mem \321\301\2\x0F\x13\110 386,UNDOC,SM -UMOV reg32,reg32 \321\2\x0F\x13\110 386,UNDOC +UMOV mem,reg8 \300\2\x0F\x10\101 386,UNDOC,SM,ND +UMOV reg8,reg8 \2\x0F\x10\101 386,UNDOC,ND +UMOV mem,reg16 \320\300\2\x0F\x11\101 386,UNDOC,SM,ND +UMOV reg16,reg16 \320\2\x0F\x11\101 386,UNDOC,ND +UMOV mem,reg32 \321\300\2\x0F\x11\101 386,UNDOC,SM,ND +UMOV reg32,reg32 \321\2\x0F\x11\101 386,UNDOC,ND +UMOV reg8,mem \301\2\x0F\x12\110 386,UNDOC,SM,ND +UMOV reg8,reg8 \2\x0F\x12\110 386,UNDOC,ND +UMOV reg16,mem \320\301\2\x0F\x13\110 386,UNDOC,SM,ND +UMOV reg16,reg16 \320\2\x0F\x13\110 386,UNDOC,ND +UMOV reg32,mem \321\301\2\x0F\x13\110 386,UNDOC,SM,ND +UMOV reg32,reg32 \321\2\x0F\x13\110 386,UNDOC,ND VERR mem \300\1\x0F\170\204 286,PROT VERR mem16 \300\1\x0F\170\204 286,PROT VERR reg16 \1\x0F\170\204 286,PROT |