Same some space by introducing shorthand byte codes for SSE prefixes

Properly done, all SSE instructions which has the 66/F2/F3 opcode
multiplex need two prefixes: one to control the use of OSP and one to
control the use of REP.  However, it's a four-way select: np/66/F2/F3;
so introduce shorthand bytecodes for that purpose.

1 files changed, 27 insertions, 0 deletions

diff --git a/assemble.c b/assemble.c
index 67dfcac..d10e5b0 100644
--- a/assemble.c
+++ b/assemble.c
@@ -91,6 +91,10 @@
  * \335          - disassemble a rep (0xF3 byte) prefix as repe not rep.
  * \340          - reserve <operand 0> bytes of uninitialized storage.
  *                 Operand 0 had better be a segmentless constant.
+ * \360		 - no SSE prefix (== \364\331)
+ * \361          - 66 SSE prefix (== \366\331)
+ * \362          - F2 SSE prefix (== \364\332)
+ * \363          - F3 SSE prefix (== \364\333)
  * \364          - operand-size prefix (0x66) not permitted
  * \365          - address-size prefix (0x67) not permitted
  * \366          - operand-size prefix (0x66) used as opcode extension
@@ -1077,6 +1081,13 @@ static int64_t calcsize(int32_t segment, int64_t offset, int bits,
             else
                 length += ins->oprs[0].offset;
             break;
+	case 0360:
+	    break;
+	case 0361:
+	case 0362:
+	case 0363:
+	    length++;
+	    break;
 	case 0364:
 	case 0365:
 	    break;
@@ -1732,6 +1743,22 @@ static void gencode(int32_t segment, int64_t offset, int bits,
             }
             break;
 
+	case 0360:
+	    break;
+
+	case 0361:
+	    bytes[0] = 0x66;
+            out(offset, segment, bytes, OUT_RAWDATA, 1, NO_SEG, NO_SEG);
+            offset += 1;
+	    break;
+
+	case 0362:
+	case 0363:
+	    bytes[0] = c - 0362 + 0xf2;
+            out(offset, segment, bytes, OUT_RAWDATA, 1, NO_SEG, NO_SEG);
+            offset += 1;
+	    break;
+
 	case 0364:
 	case 0365:
 	    break;