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authorGeorg Lehmann <dadschoorse@gmail.com>2023-07-22 23:17:45 +0200
committerEric Engestrom <eric@engestrom.ch>2023-07-28 18:48:24 +0100
commit5b2ce5c194a9ce580abc6c13d157d3cc9d126b42 (patch)
treec257ccdd429dc19c0d98048222d3abfd3660ec86 /src
parenta6ddf095aa54a06f90d08aa40b42c95c3cc3efec (diff)
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aco/gfx11: fix get_gfx11_true16_mask with v_cmp_class_f16
The second operand is 16bit, so the we need to use VOP3 to address v128-v255. Closes: #9413 Fixes: 6872f8d861b ("aco/gfx11: allow true 16-bit instructions to access v128+") Reviewed-by: Rhys Perry <pendingchaos02@gmail.com> Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24294> (cherry picked from commit 8fbebb6a2ac2b8b6e5c24fd8a9abb3ac3321fc03)
Diffstat (limited to 'src')
-rw-r--r--src/amd/compiler/aco_ir.cpp4
1 files changed, 2 insertions, 2 deletions
diff --git a/src/amd/compiler/aco_ir.cpp b/src/amd/compiler/aco_ir.cpp
index 2392acf3fcd..ed403dbb6f8 100644
--- a/src/amd/compiler/aco_ir.cpp
+++ b/src/amd/compiler/aco_ir.cpp
@@ -580,11 +580,10 @@ get_gfx11_true16_mask(aco_opcode op)
case aco_opcode::v_and_b16:
case aco_opcode::v_or_b16:
case aco_opcode::v_xor_b16: return 0x3 | 0x8;
- case aco_opcode::v_cmp_class_f16:
- case aco_opcode::v_cmpx_class_f16:
case aco_opcode::v_cvt_f32_f16:
case aco_opcode::v_cvt_i32_i16:
case aco_opcode::v_cvt_u32_u16: return 0x1;
+ case aco_opcode::v_cmp_class_f16:
case aco_opcode::v_cmp_eq_f16:
case aco_opcode::v_cmp_eq_i16:
case aco_opcode::v_cmp_eq_u16:
@@ -611,6 +610,7 @@ get_gfx11_true16_mask(aco_opcode op)
case aco_opcode::v_cmp_nlt_f16:
case aco_opcode::v_cmp_o_f16:
case aco_opcode::v_cmp_u_f16:
+ case aco_opcode::v_cmpx_class_f16:
case aco_opcode::v_cmpx_eq_f16:
case aco_opcode::v_cmpx_eq_i16:
case aco_opcode::v_cmpx_eq_u16: