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authorRohan Garg <rohan.garg@intel.com>2023-11-30 20:30:39 +0100
committerEric Engestrom <eric@engestrom.ch>2023-12-08 11:24:46 +0000
commit3913722a7faaed74d579199e4b86d2f14013572f (patch)
treed0cbf4f821a21daa5811edf7798be24bffed9549 /src/intel
parent4b4f608e105c34fec91e7e2b6fbe4f162435fb5e (diff)
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intel/compiler: infer the number of operands using lsc_op_num_data_values
nir_emit_global_atomic should utilize lsc_op_num_data_values to infer the number of operands for global atomic ops, following the same pattern as nir_emit_surface_atomic Fixes: 90a2137 ('intel/compiler: Use LSC opcode enum rather than legacy BRW_AOPs') Signed-off-by: Rohan Garg <rohan.garg@intel.com> Reviewed-by: Kenneth Graunke <kenneth@whitecape.org> Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26432> (cherry picked from commit db6aaa691d05ef017b803d11cce4e341d1a98882)
Diffstat (limited to 'src/intel')
-rw-r--r--src/intel/compiler/brw_fs_nir.cpp5
1 files changed, 3 insertions, 2 deletions
diff --git a/src/intel/compiler/brw_fs_nir.cpp b/src/intel/compiler/brw_fs_nir.cpp
index 1ba548b31f6..b9f7366763b 100644
--- a/src/intel/compiler/brw_fs_nir.cpp
+++ b/src/intel/compiler/brw_fs_nir.cpp
@@ -6400,16 +6400,17 @@ fs_visitor::nir_emit_global_atomic(const fs_builder &bld,
nir_intrinsic_instr *instr)
{
int op = lsc_aop_for_nir_intrinsic(instr);
+ int num_data = lsc_op_num_data_values(op);
fs_reg dest = get_nir_def(instr->def);
fs_reg addr = get_nir_src(instr->src[0]);
fs_reg data;
- if (op != LSC_OP_ATOMIC_INC && op != LSC_OP_ATOMIC_DEC)
+ if (num_data >= 1)
data = expand_to_32bit(bld, get_nir_src(instr->src[1]));
- if (op == LSC_OP_ATOMIC_CMPXCHG) {
+ if (num_data >= 2) {
fs_reg tmp = bld.vgrf(data.type, 2);
fs_reg sources[2] = {
data,