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| author | Jordan Justen <jordan.l.justen@intel.com> | 2021-01-25 23:01:52 -0800 |
|---|---|---|
| committer | Marge Bot <emma+marge@anholt.net> | 2022-12-01 16:22:47 +0000 |
| commit | 686ada78cdc642340b91b35ef00da0452a462966 (patch) | |
| tree | 729fc3cca3b6b0388c3d9e55be392c3734ec607d /include/pci_ids | |
| parent | d5740d85c4b8c33f05c8326e680c8e997ab07aa4 (diff) | |
| download | mesa-686ada78cdc642340b91b35ef00da0452a462966.tar.gz mesa-686ada78cdc642340b91b35ef00da0452a462966.tar.bz2 mesa-686ada78cdc642340b91b35ef00da0452a462966.zip | |
intel/dev: Add (disabled) device info for MTL
Reworks:
* Jordan: INTEL_PLATFORM_MTL_M/INTEL_PLATFORM_MTL_P
* Lionel: .has_coarse_pixel_primitive_and_cb
* Jordan: .has_mesh_shading & .has_ray_tracing
* Paulo: .has_64bit_float
* José: .has_integer_dword_mul (BSpec: 47431)
* Jordan: Comment pci device ids for now similar to DG2:
* 70a4e646852 ("intel: Add *disabled* device ids for DG2")
* ad565f6b70d ("intel/dev: Enable first set of DG2 PCI IDs")
Ref: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/include/drm/i915_pciids.h?h=v6.0-rc4#n736
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19658>
Diffstat (limited to 'include/pci_ids')
| -rw-r--r-- | include/pci_ids/iris_pci_ids.h | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/include/pci_ids/iris_pci_ids.h b/include/pci_ids/iris_pci_ids.h index 8fdae147fd5..fd8c32ae991 100644 --- a/include/pci_ids/iris_pci_ids.h +++ b/include/pci_ids/iris_pci_ids.h @@ -244,3 +244,9 @@ CHIPSET(0x56b2, dg2_g12, "DG2", "Intel(R) Graphics") CHIPSET(0x56b3, dg2_g12, "DG2", "Intel(R) Graphics") CHIPSET(0x56c0, dg2_g10, "ATS-M", "Intel(R) Data Center GPU Flex Series 170 Graphics") CHIPSET(0x56c1, dg2_g11, "ATS-M", "Intel(R) Data Center GPU Flex Series 140 Graphics") + +/* CHIPSET(0x7d40, mtl_m, "MTL", "Intel(R) Graphics") */ +/* CHIPSET(0x7d45, mtl_p, "MTL", "Intel(R) Graphics") */ +/* CHIPSET(0x7d55, mtl_p, "MTL", "Intel(R) Graphics") */ +/* CHIPSET(0x7d60, mtl_m, "MTL", "Intel(R) Graphics") */ +/* CHIPSET(0x7dd5, mtl_p, "MTL", "Intel(R) Graphics") */ |