1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
354
355
356
357
358
359
360
361
362
363
364
365
366
367
368
369
370
371
372
373
374
375
376
377
378
379
380
381
382
383
384
385
386
387
388
389
390
391
392
393
394
395
396
397
398
399
400
401
402
403
404
405
406
407
408
409
410
411
412
413
414
415
416
417
418
419
420
421
422
423
424
425
426
427
428
429
430
431
432
433
434
435
436
437
438
439
440
441
442
443
444
445
446
447
448
449
450
451
452
453
454
455
456
457
458
459
460
461
462
463
464
465
466
467
468
469
470
471
472
473
474
475
476
477
478
479
480
481
482
483
484
485
486
487
488
489
490
491
492
493
494
495
496
497
498
499
500
501
502
503
504
505
506
507
508
509
510
511
512
513
514
515
516
517
518
519
520
521
522
523
524
525
526
527
528
529
530
531
532
533
534
535
536
537
538
539
540
541
542
543
544
545
546
547
548
549
550
551
552
553
554
555
556
557
558
559
560
561
562
563
564
565
566
567
568
569
570
571
572
573
574
575
576
577
578
579
580
581
582
583
584
585
586
587
588
589
590
591
592
593
594
595
596
597
598
599
600
601
602
603
604
605
606
607
608
609
610
611
612
613
614
615
616
617
618
619
620
621
622
623
624
625
626
627
628
629
630
631
632
633
634
635
636
637
638
639
640
641
642
643
644
645
646
647
648
649
650
651
652
653
654
655
656
657
658
659
660
661
662
663
664
665
666
667
668
669
670
671
672
673
674
675
676
677
678
679
680
681
682
683
684
685
686
687
688
689
690
691
692
693
694
695
696
697
698
699
700
701
702
703
704
705
706
707
708
709
710
711
712
713
714
715
716
717
718
719
720
721
722
723
724
725
726
727
728
729
730
731
732
733
734
735
736
737
738
739
740
741
742
743
744
745
746
747
748
749
750
751
752
753
754
755
756
757
758
759
760
761
762
763
764
765
766
767
768
769
770
771
772
773
774
775
776
777
778
779
780
781
782
783
784
785
786
787
788
789
790
791
792
793
794
795
796
797
798
799
800
801
802
803
804
805
806
807
808
809
810
811
812
813
814
815
816
817
818
819
820
821
822
823
824
825
826
827
828
829
830
831
832
833
834
835
836
837
838
839
840
841
842
843
844
845
846
847
848
849
850
851
852
853
854
855
856
857
858
859
860
861
862
863
864
865
866
867
868
869
870
871
872
873
874
875
876
877
878
879
880
881
882
883
884
885
886
887
888
889
890
891
892
893
894
895
896
897
898
|
/* Generate code from machine description to emit insns as rtl.
Copyright (C) 1987, 1988, 1991, 1994, 1995, 1997, 1998, 1999, 2000, 2001
Free Software Foundation, Inc.
This file is part of GCC.
GCC is free software; you can redistribute it and/or modify it under
the terms of the GNU General Public License as published by the Free
Software Foundation; either version 2, or (at your option) any later
version.
GCC is distributed in the hope that it will be useful, but WITHOUT ANY
WARRANTY; without even the implied warranty of MERCHANTABILITY or
FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
for more details.
You should have received a copy of the GNU General Public License
along with GCC; see the file COPYING. If not, write to the Free
Software Foundation, 59 Temple Place - Suite 330, Boston, MA
02111-1307, USA. */
#include "hconfig.h"
#include "system.h"
#include "rtl.h"
#include "errors.h"
#include "gensupport.h"
static int max_opno;
static int max_dup_opno;
static int max_scratch_opno;
static int register_constraints;
static int insn_code_number;
static int insn_index_number;
/* Data structure for recording the patterns of insns that have CLOBBERs.
We use this to output a function that adds these CLOBBERs to a
previously-allocated PARALLEL expression. */
struct clobber_pat
{
struct clobber_ent *insns;
rtx pattern;
int first_clobber;
struct clobber_pat *next;
int has_hard_reg;
} *clobber_list;
/* Records one insn that uses the clobber list. */
struct clobber_ent
{
int code_number; /* Counts only insns. */
struct clobber_ent *next;
};
static void max_operand_1 PARAMS ((rtx));
static int max_operand_vec PARAMS ((rtx, int));
static void print_code PARAMS ((RTX_CODE));
static void gen_exp PARAMS ((rtx, enum rtx_code, char *));
static void gen_insn PARAMS ((rtx, int));
static void gen_expand PARAMS ((rtx));
static void gen_split PARAMS ((rtx));
static void output_add_clobbers PARAMS ((void));
static void output_added_clobbers_hard_reg_p PARAMS ((void));
static void gen_rtx_scratch PARAMS ((rtx, enum rtx_code));
static void output_peephole2_scratches PARAMS ((rtx));
static void
max_operand_1 (x)
rtx x;
{
RTX_CODE code;
int i;
int len;
const char *fmt;
if (x == 0)
return;
code = GET_CODE (x);
if (code == MATCH_OPERAND && XSTR (x, 2) != 0 && *XSTR (x, 2) != '\0')
register_constraints = 1;
if (code == MATCH_SCRATCH && XSTR (x, 1) != 0 && *XSTR (x, 1) != '\0')
register_constraints = 1;
if (code == MATCH_OPERAND || code == MATCH_OPERATOR
|| code == MATCH_PARALLEL)
max_opno = MAX (max_opno, XINT (x, 0));
if (code == MATCH_DUP || code == MATCH_OP_DUP || code == MATCH_PAR_DUP)
max_dup_opno = MAX (max_dup_opno, XINT (x, 0));
if (code == MATCH_SCRATCH)
max_scratch_opno = MAX (max_scratch_opno, XINT (x, 0));
fmt = GET_RTX_FORMAT (code);
len = GET_RTX_LENGTH (code);
for (i = 0; i < len; i++)
{
if (fmt[i] == 'e' || fmt[i] == 'u')
max_operand_1 (XEXP (x, i));
else if (fmt[i] == 'E')
{
int j;
for (j = 0; j < XVECLEN (x, i); j++)
max_operand_1 (XVECEXP (x, i, j));
}
}
}
static int
max_operand_vec (insn, arg)
rtx insn;
int arg;
{
int len = XVECLEN (insn, arg);
int i;
max_opno = -1;
max_dup_opno = -1;
max_scratch_opno = -1;
for (i = 0; i < len; i++)
max_operand_1 (XVECEXP (insn, arg, i));
return max_opno + 1;
}
static void
print_code (code)
RTX_CODE code;
{
const char *p1;
for (p1 = GET_RTX_NAME (code); *p1; p1++)
putchar (TOUPPER(*p1));
}
static void
gen_rtx_scratch (x, subroutine_type)
rtx x;
enum rtx_code subroutine_type;
{
if (subroutine_type == DEFINE_PEEPHOLE2)
{
printf ("operand%d", XINT (x, 0));
}
else
{
printf ("gen_rtx_SCRATCH (%smode)", GET_MODE_NAME (GET_MODE (x)));
}
}
/* Print a C expression to construct an RTX just like X,
substituting any operand references appearing within. */
static void
gen_exp (x, subroutine_type, used)
rtx x;
enum rtx_code subroutine_type;
char *used;
{
RTX_CODE code;
int i;
int len;
const char *fmt;
if (x == 0)
{
printf ("NULL_RTX");
return;
}
code = GET_CODE (x);
switch (code)
{
case MATCH_OPERAND:
case MATCH_DUP:
if (used)
{
if (used[XINT (x, 0)])
{
printf ("copy_rtx (operand%d)", XINT (x, 0));
return;
}
used[XINT (x, 0)] = 1;
}
printf ("operand%d", XINT (x, 0));
return;
case MATCH_OP_DUP:
printf ("gen_rtx (GET_CODE (operand%d), ", XINT (x, 0));
if (GET_MODE (x) == VOIDmode)
printf ("GET_MODE (operand%d)", XINT (x, 0));
else
printf ("%smode", GET_MODE_NAME (GET_MODE (x)));
for (i = 0; i < XVECLEN (x, 1); i++)
{
printf (",\n\t\t");
gen_exp (XVECEXP (x, 1, i), subroutine_type, used);
}
printf (")");
return;
case MATCH_OPERATOR:
printf ("gen_rtx (GET_CODE (operand%d)", XINT (x, 0));
printf (", %smode", GET_MODE_NAME (GET_MODE (x)));
for (i = 0; i < XVECLEN (x, 2); i++)
{
printf (",\n\t\t");
gen_exp (XVECEXP (x, 2, i), subroutine_type, used);
}
printf (")");
return;
case MATCH_PARALLEL:
case MATCH_PAR_DUP:
printf ("operand%d", XINT (x, 0));
return;
case MATCH_SCRATCH:
gen_rtx_scratch (x, subroutine_type);
return;
case ADDRESS:
fatal ("ADDRESS expression code used in named instruction pattern");
case PC:
printf ("pc_rtx");
return;
case CC0:
printf ("cc0_rtx");
return;
case CONST_INT:
if (INTVAL (x) == 0)
printf ("const0_rtx");
else if (INTVAL (x) == 1)
printf ("const1_rtx");
else if (INTVAL (x) == -1)
printf ("constm1_rtx");
else if (INTVAL (x) == STORE_FLAG_VALUE)
printf ("const_true_rtx");
else
{
printf ("GEN_INT (");
printf (HOST_WIDE_INT_PRINT_DEC, INTVAL (x));
printf (")");
}
return;
case CONST_DOUBLE:
/* These shouldn't be written in MD files. Instead, the appropriate
routines in varasm.c should be called. */
abort ();
default:
break;
}
printf ("gen_rtx_");
print_code (code);
printf (" (%smode", GET_MODE_NAME (GET_MODE (x)));
fmt = GET_RTX_FORMAT (code);
len = GET_RTX_LENGTH (code);
for (i = 0; i < len; i++)
{
if (fmt[i] == '0')
break;
printf (",\n\t");
if (fmt[i] == 'e' || fmt[i] == 'u')
gen_exp (XEXP (x, i), subroutine_type, used);
else if (fmt[i] == 'i')
printf ("%u", XINT (x, i));
else if (fmt[i] == 's')
printf ("\"%s\"", XSTR (x, i));
else if (fmt[i] == 'E')
{
int j;
printf ("gen_rtvec (%d", XVECLEN (x, i));
for (j = 0; j < XVECLEN (x, i); j++)
{
printf (",\n\t\t");
gen_exp (XVECEXP (x, i, j), subroutine_type, used);
}
printf (")");
}
else
abort ();
}
printf (")");
}
/* Generate the `gen_...' function for a DEFINE_INSN. */
static void
gen_insn (insn, lineno)
rtx insn;
int lineno;
{
int operands;
int i;
/* See if the pattern for this insn ends with a group of CLOBBERs of (hard)
registers or MATCH_SCRATCHes. If so, store away the information for
later. */
if (XVEC (insn, 1))
{
int has_hard_reg = 0;
for (i = XVECLEN (insn, 1) - 1; i > 0; i--)
{
if (GET_CODE (XVECEXP (insn, 1, i)) != CLOBBER)
break;
if (GET_CODE (XEXP (XVECEXP (insn, 1, i), 0)) == REG)
has_hard_reg = 1;
else if (GET_CODE (XEXP (XVECEXP (insn, 1, i), 0)) != MATCH_SCRATCH)
break;
}
if (i != XVECLEN (insn, 1) - 1)
{
struct clobber_pat *p;
struct clobber_ent *link
= (struct clobber_ent *) xmalloc (sizeof (struct clobber_ent));
int j;
link->code_number = insn_code_number;
/* See if any previous CLOBBER_LIST entry is the same as this
one. */
for (p = clobber_list; p; p = p->next)
{
if (p->first_clobber != i + 1
|| XVECLEN (p->pattern, 1) != XVECLEN (insn, 1))
continue;
for (j = i + 1; j < XVECLEN (insn, 1); j++)
{
rtx old = XEXP (XVECEXP (p->pattern, 1, j), 0);
rtx new = XEXP (XVECEXP (insn, 1, j), 0);
/* OLD and NEW are the same if both are to be a SCRATCH
of the same mode,
or if both are registers of the same mode and number. */
if (! (GET_MODE (old) == GET_MODE (new)
&& ((GET_CODE (old) == MATCH_SCRATCH
&& GET_CODE (new) == MATCH_SCRATCH)
|| (GET_CODE (old) == REG && GET_CODE (new) == REG
&& REGNO (old) == REGNO (new)))))
break;
}
if (j == XVECLEN (insn, 1))
break;
}
if (p == 0)
{
p = (struct clobber_pat *) xmalloc (sizeof (struct clobber_pat));
p->insns = 0;
p->pattern = insn;
p->first_clobber = i + 1;
p->next = clobber_list;
p->has_hard_reg = has_hard_reg;
clobber_list = p;
}
link->next = p->insns;
p->insns = link;
}
}
/* Don't mention instructions whose names are the null string
or begin with '*'. They are in the machine description just
to be recognized. */
if (XSTR (insn, 0)[0] == 0 || XSTR (insn, 0)[0] == '*')
return;
printf ("/* %s:%d */\n", read_rtx_filename, lineno);
/* Find out how many operands this function has,
and also whether any of them have register constraints. */
register_constraints = 0;
operands = max_operand_vec (insn, 1);
if (max_dup_opno >= operands)
fatal ("match_dup operand number has no match_operand");
/* Output the function name and argument declarations. */
printf ("rtx\ngen_%s (", XSTR (insn, 0));
for (i = 0; i < operands; i++)
if (i)
printf (", operand%d", i);
else
printf ("operand%d", i);
printf (")\n");
for (i = 0; i < operands; i++)
printf (" rtx operand%d;\n", i);
printf ("{\n");
/* Output code to construct and return the rtl for the instruction body */
if (XVECLEN (insn, 1) == 1)
{
printf (" return ");
gen_exp (XVECEXP (insn, 1, 0), DEFINE_INSN, NULL);
printf (";\n}\n\n");
}
else
{
printf (" return gen_rtx_PARALLEL (VOIDmode, gen_rtvec (%d",
XVECLEN (insn, 1));
for (i = 0; i < XVECLEN (insn, 1); i++)
{
printf (",\n\t\t");
gen_exp (XVECEXP (insn, 1, i), DEFINE_INSN, NULL);
}
printf ("));\n}\n\n");
}
}
/* Generate the `gen_...' function for a DEFINE_EXPAND. */
static void
gen_expand (expand)
rtx expand;
{
int operands;
int i;
if (strlen (XSTR (expand, 0)) == 0)
fatal ("define_expand lacks a name");
if (XVEC (expand, 1) == 0)
fatal ("define_expand for %s lacks a pattern", XSTR (expand, 0));
/* Find out how many operands this function has,
and also whether any of them have register constraints. */
register_constraints = 0;
operands = max_operand_vec (expand, 1);
/* Output the function name and argument declarations. */
printf ("rtx\ngen_%s (", XSTR (expand, 0));
for (i = 0; i < operands; i++)
if (i)
printf (", operand%d", i);
else
printf ("operand%d", i);
printf (")\n");
for (i = 0; i < operands; i++)
printf (" rtx operand%d;\n", i);
printf ("{\n");
/* If we don't have any C code to write, only one insn is being written,
and no MATCH_DUPs are present, we can just return the desired insn
like we do for a DEFINE_INSN. This saves memory. */
if ((XSTR (expand, 3) == 0 || *XSTR (expand, 3) == '\0')
&& operands > max_dup_opno
&& XVECLEN (expand, 1) == 1)
{
printf (" return ");
gen_exp (XVECEXP (expand, 1, 0), DEFINE_EXPAND, NULL);
printf (";\n}\n\n");
return;
}
/* For each operand referred to only with MATCH_DUPs,
make a local variable. */
for (i = operands; i <= max_dup_opno; i++)
printf (" rtx operand%d;\n", i);
for (; i <= max_scratch_opno; i++)
printf (" rtx operand%d ATTRIBUTE_UNUSED;\n", i);
printf (" rtx _val = 0;\n");
printf (" start_sequence ();\n");
/* The fourth operand of DEFINE_EXPAND is some code to be executed
before the actual construction.
This code expects to refer to `operands'
just as the output-code in a DEFINE_INSN does,
but here `operands' is an automatic array.
So copy the operand values there before executing it. */
if (XSTR (expand, 3) && *XSTR (expand, 3))
{
printf (" {\n");
if (operands > 0 || max_dup_opno >= 0 || max_scratch_opno >= 0)
printf (" rtx operands[%d];\n",
MAX (operands, MAX (max_scratch_opno, max_dup_opno) + 1));
/* Output code to copy the arguments into `operands'. */
for (i = 0; i < operands; i++)
printf (" operands[%d] = operand%d;\n", i, i);
/* Output the special code to be executed before the sequence
is generated. */
printf ("%s\n", XSTR (expand, 3));
/* Output code to copy the arguments back out of `operands'
(unless we aren't going to use them at all). */
if (XVEC (expand, 1) != 0)
{
for (i = 0; i < operands; i++)
printf (" operand%d = operands[%d];\n", i, i);
for (; i <= max_dup_opno; i++)
printf (" operand%d = operands[%d];\n", i, i);
for (; i <= max_scratch_opno; i++)
printf (" operand%d = operands[%d];\n", i, i);
}
printf (" }\n");
}
/* Output code to construct the rtl for the instruction bodies.
Use emit_insn to add them to the sequence being accumulated.
But don't do this if the user's code has set `no_more' nonzero. */
for (i = 0; i < XVECLEN (expand, 1); i++)
{
rtx next = XVECEXP (expand, 1, i);
if ((GET_CODE (next) == SET && GET_CODE (SET_DEST (next)) == PC)
|| (GET_CODE (next) == PARALLEL
&& GET_CODE (XVECEXP (next, 0, 0)) == SET
&& GET_CODE (SET_DEST (XVECEXP (next, 0, 0))) == PC)
|| GET_CODE (next) == RETURN)
printf (" emit_jump_insn (");
else if ((GET_CODE (next) == SET && GET_CODE (SET_SRC (next)) == CALL)
|| GET_CODE (next) == CALL
|| (GET_CODE (next) == PARALLEL
&& GET_CODE (XVECEXP (next, 0, 0)) == SET
&& GET_CODE (SET_SRC (XVECEXP (next, 0, 0))) == CALL)
|| (GET_CODE (next) == PARALLEL
&& GET_CODE (XVECEXP (next, 0, 0)) == CALL))
printf (" emit_call_insn (");
else if (GET_CODE (next) == CODE_LABEL)
printf (" emit_label (");
else if (GET_CODE (next) == MATCH_OPERAND
|| GET_CODE (next) == MATCH_DUP
|| GET_CODE (next) == MATCH_OPERATOR
|| GET_CODE (next) == MATCH_OP_DUP
|| GET_CODE (next) == MATCH_PARALLEL
|| GET_CODE (next) == MATCH_PAR_DUP
|| GET_CODE (next) == PARALLEL)
printf (" emit (");
else
printf (" emit_insn (");
gen_exp (next, DEFINE_EXPAND, NULL);
printf (");\n");
if (GET_CODE (next) == SET && GET_CODE (SET_DEST (next)) == PC
&& GET_CODE (SET_SRC (next)) == LABEL_REF)
printf (" emit_barrier ();");
}
/* Call `gen_sequence' to make a SEQUENCE out of all the
insns emitted within this gen_... function. */
printf (" _val = gen_sequence ();\n");
printf (" end_sequence ();\n");
printf (" return _val;\n}\n\n");
}
/* Like gen_expand, but generates a SEQUENCE. */
static void
gen_split (split)
rtx split;
{
int i;
int operands;
const char *const name =
((GET_CODE (split) == DEFINE_PEEPHOLE2) ? "peephole2" : "split");
const char *unused;
char *used;
if (XVEC (split, 0) == 0)
fatal ("define_%s (definition %d) lacks a pattern", name,
insn_index_number);
else if (XVEC (split, 2) == 0)
fatal ("define_%s (definition %d) lacks a replacement pattern", name,
insn_index_number);
/* Find out how many operands this function has. */
max_operand_vec (split, 2);
operands = MAX (max_opno, MAX (max_dup_opno, max_scratch_opno)) + 1;
unused = (operands == 0 ? " ATTRIBUTE_UNUSED" : "");
used = xcalloc (1, operands);
/* Output the prototype, function name and argument declarations. */
if (GET_CODE (split) == DEFINE_PEEPHOLE2)
{
printf ("extern rtx gen_%s_%d PARAMS ((rtx, rtx *));\n",
name, insn_code_number);
printf ("rtx\ngen_%s_%d (curr_insn, operands)\n",
name, insn_code_number);
printf (" rtx curr_insn ATTRIBUTE_UNUSED;\n");
printf (" rtx *operands%s;\n", unused);
}
else
{
printf ("extern rtx gen_split_%d PARAMS ((rtx *));\n", insn_code_number);
printf ("rtx\ngen_%s_%d (operands)\n", name, insn_code_number);
printf (" rtx *operands%s;\n", unused);
}
printf ("{\n");
/* Declare all local variables. */
for (i = 0; i < operands; i++)
printf (" rtx operand%d;\n", i);
printf (" rtx _val = 0;\n");
if (GET_CODE (split) == DEFINE_PEEPHOLE2)
output_peephole2_scratches (split);
printf (" start_sequence ();\n");
/* The fourth operand of DEFINE_SPLIT is some code to be executed
before the actual construction. */
if (XSTR (split, 3))
printf ("%s\n", XSTR (split, 3));
/* Output code to copy the arguments back out of `operands' */
for (i = 0; i < operands; i++)
printf (" operand%d = operands[%d];\n", i, i);
/* Output code to construct the rtl for the instruction bodies.
Use emit_insn to add them to the sequence being accumulated.
But don't do this if the user's code has set `no_more' nonzero. */
for (i = 0; i < XVECLEN (split, 2); i++)
{
rtx next = XVECEXP (split, 2, i);
if ((GET_CODE (next) == SET && GET_CODE (SET_DEST (next)) == PC)
|| (GET_CODE (next) == PARALLEL
&& GET_CODE (XVECEXP (next, 0, 0)) == SET
&& GET_CODE (SET_DEST (XVECEXP (next, 0, 0))) == PC)
|| GET_CODE (next) == RETURN)
printf (" emit_jump_insn (");
else if ((GET_CODE (next) == SET && GET_CODE (SET_SRC (next)) == CALL)
|| GET_CODE (next) == CALL
|| (GET_CODE (next) == PARALLEL
&& GET_CODE (XVECEXP (next, 0, 0)) == SET
&& GET_CODE (SET_SRC (XVECEXP (next, 0, 0))) == CALL)
|| (GET_CODE (next) == PARALLEL
&& GET_CODE (XVECEXP (next, 0, 0)) == CALL))
printf (" emit_call_insn (");
else if (GET_CODE (next) == CODE_LABEL)
printf (" emit_label (");
else if (GET_CODE (next) == MATCH_OPERAND
|| GET_CODE (next) == MATCH_OPERATOR
|| GET_CODE (next) == MATCH_PARALLEL
|| GET_CODE (next) == MATCH_OP_DUP
|| GET_CODE (next) == MATCH_DUP
|| GET_CODE (next) == PARALLEL)
printf (" emit (");
else
printf (" emit_insn (");
gen_exp (next, GET_CODE (split), used);
printf (");\n");
if (GET_CODE (next) == SET && GET_CODE (SET_DEST (next)) == PC
&& GET_CODE (SET_SRC (next)) == LABEL_REF)
printf (" emit_barrier ();");
}
/* Call `gen_sequence' to make a SEQUENCE out of all the
insns emitted within this gen_... function. */
printf (" _val = gen_sequence ();\n");
printf (" end_sequence ();\n");
printf (" return _val;\n}\n\n");
free (used);
}
/* Write a function, `add_clobbers', that is given a PARALLEL of sufficient
size for the insn and an INSN_CODE, and inserts the required CLOBBERs at
the end of the vector. */
static void
output_add_clobbers ()
{
struct clobber_pat *clobber;
struct clobber_ent *ent;
int i;
printf ("\n\nvoid\nadd_clobbers (pattern, insn_code_number)\n");
printf (" rtx pattern ATTRIBUTE_UNUSED;\n int insn_code_number;\n");
printf ("{\n");
printf (" switch (insn_code_number)\n");
printf (" {\n");
for (clobber = clobber_list; clobber; clobber = clobber->next)
{
for (ent = clobber->insns; ent; ent = ent->next)
printf (" case %d:\n", ent->code_number);
for (i = clobber->first_clobber; i < XVECLEN (clobber->pattern, 1); i++)
{
printf (" XVECEXP (pattern, 0, %d) = ", i);
gen_exp (XVECEXP (clobber->pattern, 1, i),
GET_CODE (clobber->pattern), NULL);
printf (";\n");
}
printf (" break;\n\n");
}
printf (" default:\n");
printf (" abort ();\n");
printf (" }\n");
printf ("}\n");
}
/* Write a function, `added_clobbers_hard_reg_p' this is given an insn_code
number that needs clobbers and returns 1 if they include a clobber of a
hard reg and 0 if they just clobber SCRATCH. */
static void
output_added_clobbers_hard_reg_p ()
{
struct clobber_pat *clobber;
struct clobber_ent *ent;
int clobber_p, used;
printf ("\n\nint\nadded_clobbers_hard_reg_p (insn_code_number)\n");
printf (" int insn_code_number;\n");
printf ("{\n");
printf (" switch (insn_code_number)\n");
printf (" {\n");
for (clobber_p = 0; clobber_p <= 1; clobber_p++)
{
used = 0;
for (clobber = clobber_list; clobber; clobber = clobber->next)
if (clobber->has_hard_reg == clobber_p)
for (ent = clobber->insns; ent; ent = ent->next)
{
printf (" case %d:\n", ent->code_number);
used++;
}
if (used)
printf (" return %d;\n\n", clobber_p);
}
printf (" default:\n");
printf (" abort ();\n");
printf (" }\n");
printf ("}\n");
}
/* Generate code to invoke find_free_register () as needed for the
scratch registers used by the peephole2 pattern in SPLIT. */
static void
output_peephole2_scratches (split)
rtx split;
{
int i;
int insn_nr = 0;
printf (" HARD_REG_SET _regs_allocated;\n");
printf (" CLEAR_HARD_REG_SET (_regs_allocated);\n");
for (i = 0; i < XVECLEN (split, 0); i++)
{
rtx elt = XVECEXP (split, 0, i);
if (GET_CODE (elt) == MATCH_SCRATCH)
{
int last_insn_nr = insn_nr;
int cur_insn_nr = insn_nr;
int j;
for (j = i + 1; j < XVECLEN (split, 0); j++)
if (GET_CODE (XVECEXP (split, 0, j)) == MATCH_DUP)
{
if (XINT (XVECEXP (split, 0, j), 0) == XINT (elt, 0))
last_insn_nr = cur_insn_nr;
}
else if (GET_CODE (XVECEXP (split, 0, j)) != MATCH_SCRATCH)
cur_insn_nr++;
printf (" if ((operands[%d] = peep2_find_free_register (%d, %d, \"%s\", %smode, &_regs_allocated)) == NULL_RTX)\n\
return NULL;\n",
XINT (elt, 0),
insn_nr, last_insn_nr,
XSTR (elt, 1),
GET_MODE_NAME (GET_MODE (elt)));
}
else if (GET_CODE (elt) != MATCH_DUP)
insn_nr++;
}
}
extern int main PARAMS ((int, char **));
int
main (argc, argv)
int argc;
char **argv;
{
rtx desc;
progname = "genemit";
if (argc <= 1)
fatal ("no input file name");
if (init_md_reader_args (argc, argv) != SUCCESS_EXIT_CODE)
return (FATAL_EXIT_CODE);
/* Assign sequential codes to all entries in the machine description
in parallel with the tables in insn-output.c. */
insn_code_number = 0;
insn_index_number = 0;
printf ("/* Generated automatically by the program `genemit'\n\
from the machine description file `md'. */\n\n");
printf ("#include \"config.h\"\n");
printf ("#include \"system.h\"\n");
printf ("#include \"rtl.h\"\n");
printf ("#include \"tm_p.h\"\n");
printf ("#include \"function.h\"\n");
printf ("#include \"expr.h\"\n");
printf ("#include \"optabs.h\"\n");
printf ("#include \"real.h\"\n");
printf ("#include \"flags.h\"\n");
printf ("#include \"output.h\"\n");
printf ("#include \"insn-config.h\"\n");
printf ("#include \"hard-reg-set.h\"\n");
printf ("#include \"recog.h\"\n");
printf ("#include \"resource.h\"\n");
printf ("#include \"reload.h\"\n");
printf ("#include \"toplev.h\"\n");
printf ("#include \"ggc.h\"\n\n");
printf ("#define FAIL return (end_sequence (), _val)\n");
printf ("#define DONE return (_val = gen_sequence (), end_sequence (), _val)\n\n");
/* Read the machine description. */
while (1)
{
int line_no;
desc = read_md_rtx (&line_no, &insn_code_number);
if (desc == NULL)
break;
switch (GET_CODE (desc))
{
case DEFINE_INSN:
gen_insn (desc, line_no);
break;
case DEFINE_EXPAND:
printf ("/* %s:%d */\n", read_rtx_filename, line_no);
gen_expand (desc);
break;
case DEFINE_SPLIT:
printf ("/* %s:%d */\n", read_rtx_filename, line_no);
gen_split (desc);
break;
case DEFINE_PEEPHOLE2:
printf ("/* %s:%d */\n", read_rtx_filename, line_no);
gen_split (desc);
break;
default:
break;
}
++insn_index_number;
}
/* Write out the routines to add CLOBBERs to a pattern and say whether they
clobber a hard reg. */
output_add_clobbers ();
output_added_clobbers_hard_reg_p ();
fflush (stdout);
return (ferror (stdout) != 0 ? FATAL_EXIT_CODE : SUCCESS_EXIT_CODE);
}
/* Define this so we can link with print-rtl.o to get debug_rtx function. */
const char *
get_insn_name (code)
int code ATTRIBUTE_UNUSED;
{
return NULL;
}
|