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-rw-r--r--src/gen6_mfc.c17
-rw-r--r--src/gen75_mfc.c16
-rw-r--r--src/gen8_mfc.c17
3 files changed, 37 insertions, 13 deletions
diff --git a/src/gen6_mfc.c b/src/gen6_mfc.c
index 0a10054..455721f 100644
--- a/src/gen6_mfc.c
+++ b/src/gen6_mfc.c
@@ -791,11 +791,15 @@ gen6_mfc_avc_pipeline_slice_programing(VADriverContextP ctx,
unsigned int tail_data[] = { 0x0, 0x0 };
int slice_type = intel_avc_enc_slice_type_fixup(pSliceParameter->slice_type);
int is_intra = slice_type == SLICE_TYPE_I;
+ int qp_slice;
+ qp_slice = qp;
if (rate_control_mode == VA_RC_CBR) {
qp = mfc_context->bit_rate_control_context[slice_type].QpPrimeY;
- if (encode_state->slice_header_index[slice_index] == 0)
+ if (encode_state->slice_header_index[slice_index] == 0) {
pSliceParameter->slice_qp_delta = qp - pPicParameter->pic_init_qp;
+ qp_slice = qp;
+ }
}
/* only support for 8-bit pixel bit-depth */
@@ -808,7 +812,7 @@ gen6_mfc_avc_pipeline_slice_programing(VADriverContextP ctx,
pPicParameter,
pSliceParameter,
encode_state, encoder_context,
- (rate_control_mode == VA_RC_CBR), qp, slice_batch);
+ (rate_control_mode == VA_RC_CBR), qp_slice, slice_batch);
if ( slice_index == 0)
intel_mfc_avc_pipeline_header_programing(ctx, encode_state, encoder_context, slice_batch);
@@ -1171,11 +1175,16 @@ gen6_mfc_avc_batchbuffer_slice(VADriverContextP ctx,
int old_used = intel_batchbuffer_used_size(slice_batch), used;
unsigned short head_size, tail_size;
int slice_type = intel_avc_enc_slice_type_fixup(pSliceParameter->slice_type);
+ int qp_slice;
+ qp_slice = qp;
if (rate_control_mode == VA_RC_CBR) {
qp = mfc_context->bit_rate_control_context[slice_type].QpPrimeY;
- if (encode_state->slice_header_index[slice_index] == 0)
+ if (encode_state->slice_header_index[slice_index] == 0) {
pSliceParameter->slice_qp_delta = qp - pPicParameter->pic_init_qp;
+ /* Use the adjusted qp when slice_header is generated by driver */
+ qp_slice = qp;
+ }
}
/* only support for 8-bit pixel bit-depth */
@@ -1191,7 +1200,7 @@ gen6_mfc_avc_batchbuffer_slice(VADriverContextP ctx,
encode_state,
encoder_context,
(rate_control_mode == VA_RC_CBR),
- qp,
+ qp_slice,
slice_batch);
if (slice_index == 0)
diff --git a/src/gen75_mfc.c b/src/gen75_mfc.c
index 2ff35af..a6a3c1d 100644
--- a/src/gen75_mfc.c
+++ b/src/gen75_mfc.c
@@ -1169,11 +1169,15 @@ gen75_mfc_avc_pipeline_slice_programing(VADriverContextP ctx,
unsigned int tail_data[] = { 0x0, 0x0 };
int slice_type = intel_avc_enc_slice_type_fixup(pSliceParameter->slice_type);
int is_intra = slice_type == SLICE_TYPE_I;
+ int qp_slice;
+ qp_slice = qp;
if (rate_control_mode == VA_RC_CBR) {
qp = mfc_context->bit_rate_control_context[slice_type].QpPrimeY;
- if (encode_state->slice_header_index[slice_index] == 0)
+ if (encode_state->slice_header_index[slice_index] == 0) {
pSliceParameter->slice_qp_delta = qp - pPicParameter->pic_init_qp;
+ qp_slice = qp;
+ }
}
/* only support for 8-bit pixel bit-depth */
@@ -1186,7 +1190,7 @@ gen75_mfc_avc_pipeline_slice_programing(VADriverContextP ctx,
pPicParameter,
pSliceParameter,
encode_state, encoder_context,
- (rate_control_mode == VA_RC_CBR), qp, slice_batch);
+ (rate_control_mode == VA_RC_CBR), qp_slice, slice_batch);
if ( slice_index == 0)
intel_mfc_avc_pipeline_header_programing(ctx, encode_state, encoder_context, slice_batch);
@@ -1508,11 +1512,15 @@ gen75_mfc_avc_batchbuffer_slice(VADriverContextP ctx,
unsigned int tail_data[] = { 0x0, 0x0 };
long head_offset;
int slice_type = intel_avc_enc_slice_type_fixup(pSliceParameter->slice_type);
+ int qp_slice;
+ qp_slice = qp;
if (rate_control_mode == VA_RC_CBR) {
qp = mfc_context->bit_rate_control_context[slice_type].QpPrimeY;
- if (encode_state->slice_header_index[slice_index] == 0)
+ if (encode_state->slice_header_index[slice_index] == 0) {
pSliceParameter->slice_qp_delta = qp - pPicParameter->pic_init_qp;
+ qp_slice = qp;
+ }
}
/* only support for 8-bit pixel bit-depth */
@@ -1527,7 +1535,7 @@ gen75_mfc_avc_batchbuffer_slice(VADriverContextP ctx,
encode_state,
encoder_context,
(rate_control_mode == VA_RC_CBR),
- qp,
+ qp_slice,
slice_batch);
if (slice_index == 0)
diff --git a/src/gen8_mfc.c b/src/gen8_mfc.c
index e3f07ad..2d76816 100644
--- a/src/gen8_mfc.c
+++ b/src/gen8_mfc.c
@@ -1032,12 +1032,15 @@ gen8_mfc_avc_pipeline_slice_programing(VADriverContextP ctx,
unsigned int tail_data[] = { 0x0, 0x0 };
int slice_type = intel_avc_enc_slice_type_fixup(pSliceParameter->slice_type);
int is_intra = slice_type == SLICE_TYPE_I;
+ int qp_slice;
-
+ qp_slice = qp;
if (rate_control_mode == VA_RC_CBR) {
qp = mfc_context->bit_rate_control_context[slice_type].QpPrimeY;
- if (encode_state->slice_header_index[slice_index] == 0)
+ if (encode_state->slice_header_index[slice_index] == 0) {
pSliceParameter->slice_qp_delta = qp - pPicParameter->pic_init_qp;
+ qp_slice = qp;
+ }
}
/* only support for 8-bit pixel bit-depth */
@@ -1050,7 +1053,7 @@ gen8_mfc_avc_pipeline_slice_programing(VADriverContextP ctx,
pPicParameter,
pSliceParameter,
encode_state, encoder_context,
- (rate_control_mode == VA_RC_CBR), qp, slice_batch);
+ (rate_control_mode == VA_RC_CBR), qp_slice, slice_batch);
if ( slice_index == 0)
intel_mfc_avc_pipeline_header_programing(ctx, encode_state, encoder_context, slice_batch);
@@ -1403,11 +1406,15 @@ gen8_mfc_avc_batchbuffer_slice(VADriverContextP ctx,
int old_used = intel_batchbuffer_used_size(slice_batch), used;
unsigned short head_size, tail_size;
int slice_type = intel_avc_enc_slice_type_fixup(pSliceParameter->slice_type);
+ int qp_slice;
+ qp_slice = qp;
if (rate_control_mode == VA_RC_CBR) {
qp = mfc_context->bit_rate_control_context[slice_type].QpPrimeY;
- if (encode_state->slice_header_index[slice_index] == 0)
+ if (encode_state->slice_header_index[slice_index] == 0) {
pSliceParameter->slice_qp_delta = qp - pPicParameter->pic_init_qp;
+ qp_slice = qp;
+ }
}
/* only support for 8-bit pixel bit-depth */
@@ -1423,7 +1430,7 @@ gen8_mfc_avc_batchbuffer_slice(VADriverContextP ctx,
encode_state,
encoder_context,
(rate_control_mode == VA_RC_CBR),
- qp,
+ qp_slice,
slice_batch);
if (slice_index == 0)
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-24 08:34:30 +0000