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author | Xiang, Haihao <haihao.xiang@intel.com> | 2014-04-19 00:12:38 +0800 |
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committer | Xiang, Haihao <haihao.xiang@intel.com> | 2014-05-26 11:59:24 +0800 |
commit | e889cefebad2a2fa2230882b8070309f23054247 (patch) | |
tree | be4c0bf4b91bbbd36bc866c6de958da24228c1b5 /src | |
parent | 5684002ddffc89398755bccf3962febf88e1dd2d (diff) | |
download | libva-intel-driver-e889cefebad2a2fa2230882b8070309f23054247.tar.gz libva-intel-driver-e889cefebad2a2fa2230882b8070309f23054247.tar.bz2 libva-intel-driver-e889cefebad2a2fa2230882b8070309f23054247.zip |
Remove max_wm_threads from render_state
Instead directly use the value stored in intel_device_info
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
(cherry picked from commit 6ba787b29e4bcebdceda52906e33cb84f24a63b5)
Diffstat (limited to 'src')
-rw-r--r-- | src/gen8_render.c | 10 | ||||
-rw-r--r-- | src/i965_render.c | 31 | ||||
-rw-r--r-- | src/i965_render.h | 2 |
3 files changed, 5 insertions, 38 deletions
diff --git a/src/gen8_render.c b/src/gen8_render.c index 90f278e..8f5feaa 100644 --- a/src/gen8_render.c +++ b/src/gen8_render.c @@ -1377,7 +1377,7 @@ gen8_emit_wm_state(VADriverContextP ctx, int kernel) unsigned int num_samples = 0; unsigned int max_threads; - max_threads = render_state->max_wm_threads - 2; + max_threads = i965->intel.device_info->max_wm_threads - 2; BEGIN_BATCH(batch, 2); OUT_BATCH(batch, GEN8_3DSTATE_PSEXTRA | (2 - 2)); @@ -1784,14 +1784,6 @@ gen8_render_init(VADriverContextP ctx) dri_bo_unmap(render_state->instruction_state.bo); - - if (IS_GEN8(i965->intel.device_id)) { - render_state->max_wm_threads = 64; - } else { - /* should never get here !!! */ - assert(0); - } - return true; } diff --git a/src/i965_render.c b/src/i965_render.c index 6520ce3..15643f3 100644 --- a/src/i965_render.c +++ b/src/i965_render.c @@ -478,7 +478,7 @@ i965_subpic_render_wm_unit(VADriverContextP ctx) wm_state->wm4.sampler_count = (render_state->wm.sampler_count + 3) / 4; } - wm_state->wm5.max_threads = render_state->max_wm_threads - 1; + wm_state->wm5.max_threads = i965->intel.device_info->max_wm_threads - 1; wm_state->wm5.thread_dispatch_enable = 1; wm_state->wm5.enable_16_pix = 1; wm_state->wm5.enable_8_pix = 0; @@ -542,7 +542,7 @@ i965_render_wm_unit(VADriverContextP ctx) wm_state->wm4.sampler_count = (render_state->wm.sampler_count + 3) / 4; } - wm_state->wm5.max_threads = render_state->max_wm_threads - 1; + wm_state->wm5.max_threads = i965->intel.device_info->max_wm_threads - 1; wm_state->wm5.thread_dispatch_enable = 1; wm_state->wm5.enable_16_pix = 1; wm_state->wm5.enable_8_pix = 0; @@ -2117,7 +2117,7 @@ gen6_emit_wm_state(VADriverContextP ctx, int kernel) (5 << GEN6_3DSTATE_WM_BINDING_TABLE_ENTRY_COUNT_SHIFT)); OUT_BATCH(batch, 0); OUT_BATCH(batch, (6 << GEN6_3DSTATE_WM_DISPATCH_START_GRF_0_SHIFT)); /* DW4 */ - OUT_BATCH(batch, ((render_state->max_wm_threads - 1) << GEN6_3DSTATE_WM_MAX_THREADS_SHIFT) | + OUT_BATCH(batch, ((i965->intel.device_info->max_wm_threads - 1) << GEN6_3DSTATE_WM_MAX_THREADS_SHIFT) | GEN6_3DSTATE_WM_DISPATCH_ENABLE | GEN6_3DSTATE_WM_16_DISPATCH_ENABLE); OUT_BATCH(batch, (1 << GEN6_3DSTATE_WM_NUM_SF_OUTPUTS_SHIFT) | @@ -2899,7 +2899,7 @@ gen7_emit_wm_state(VADriverContextP ctx, int kernel) (5 << GEN7_PS_BINDING_TABLE_ENTRY_COUNT_SHIFT)); OUT_BATCH(batch, 0); /* scratch space base offset */ OUT_BATCH(batch, - ((render_state->max_wm_threads - 1) << max_threads_shift) | num_samples | + ((i965->intel.device_info->max_wm_threads - 1) << max_threads_shift) | num_samples | GEN7_PS_PUSH_CONSTANT_ENABLE | GEN7_PS_ATTRIBUTE_ENABLE | GEN7_PS_16_DISPATCH_ENABLE); @@ -3187,29 +3187,6 @@ i965_render_init(VADriverContextP ctx) 4096, 64); assert(render_state->curbe.bo); - if (IS_HSW_GT1(i965->intel.device_id)) { - render_state->max_wm_threads = 102; - } else if (IS_HSW_GT2(i965->intel.device_id)) { - render_state->max_wm_threads = 204; - } else if (IS_HSW_GT3(i965->intel.device_id)) { - render_state->max_wm_threads = 408; - } else if (IS_IVB_GT1(i965->intel.device_id) || IS_BAYTRAIL(i965->intel.device_id)) { - render_state->max_wm_threads = 48; - } else if (IS_IVB_GT2(i965->intel.device_id)) { - render_state->max_wm_threads = 172; - } else if (IS_SNB_GT1(i965->intel.device_id)) { - render_state->max_wm_threads = 40; - } else if (IS_SNB_GT2(i965->intel.device_id)) { - render_state->max_wm_threads = 80; - } else if (IS_IRONLAKE(i965->intel.device_id)) { - render_state->max_wm_threads = 72; /* 12 * 6 */ - } else if (IS_G4X(i965->intel.device_id)) { - render_state->max_wm_threads = 50; /* 12 * 5 */ - } else { - /* should never get here !!! */ - assert(0); - } - return true; } diff --git a/src/i965_render.h b/src/i965_render.h index a1f2f8f..afbce49 100644 --- a/src/i965_render.h +++ b/src/i965_render.h @@ -79,8 +79,6 @@ struct i965_render_state struct i965_kernel render_kernels[3]; - int max_wm_threads; - struct { dri_bo *bo; int bo_size; |