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author | Zhao Yakui <yakui.zhao@intel.com> | 2013-12-19 13:37:21 +0800 |
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committer | Xiang, Haihao <haihao.xiang@intel.com> | 2014-02-27 10:26:17 +0800 |
commit | 3d7451a2bbca676e9f4a2933947e17f0e24e585c (patch) | |
tree | 4969fa4f9ae3e02788cfaced3a1be340b6cfd930 /src/gen8_mfc.c | |
parent | 8b100cfe0aa2030c8158163efcd460e82d2aeec0 (diff) | |
download | libva-intel-driver-3d7451a2bbca676e9f4a2933947e17f0e24e585c.tar.gz libva-intel-driver-3d7451a2bbca676e9f4a2933947e17f0e24e585c.tar.bz2 libva-intel-driver-3d7451a2bbca676e9f4a2933947e17f0e24e585c.zip |
BDW encoding reuses aux_batchbuffer instead of allocating another new buffer
This is picked up from that on Haswell/Ivybridge.
Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
Diffstat (limited to 'src/gen8_mfc.c')
-rw-r--r-- | src/gen8_mfc.c | 18 |
1 files changed, 6 insertions, 12 deletions
diff --git a/src/gen8_mfc.c b/src/gen8_mfc.c index d2ab264..314a3e0 100644 --- a/src/gen8_mfc.c +++ b/src/gen8_mfc.c @@ -1115,17 +1115,13 @@ gen8_mfc_avc_software_batchbuffer(VADriverContextP ctx, struct encode_state *encode_state, struct intel_encoder_context *encoder_context) { + struct gen6_mfc_context *mfc_context = encoder_context->mfc_context; struct i965_driver_data *i965 = i965_driver_data(ctx); struct intel_batchbuffer *batch; dri_bo *batch_bo; int i; - int buffer_size; - VAEncSequenceParameterBufferH264 *pSequenceParameter = (VAEncSequenceParameterBufferH264 *)encode_state->seq_param_ext->buffer; - int width_in_mbs = pSequenceParameter->picture_width_in_mbs; - int height_in_mbs = pSequenceParameter->picture_height_in_mbs; - buffer_size = width_in_mbs * height_in_mbs * 64; - batch = intel_batchbuffer_new(&i965->intel, I915_EXEC_BSD, buffer_size); + batch = mfc_context->aux_batchbuffer; batch_bo = batch->buffer; for (i = 0; i < encode_state->num_slice_params_ext; i++) { gen8_mfc_avc_pipeline_slice_programing(ctx, encode_state, encoder_context, i, batch); @@ -1140,6 +1136,7 @@ gen8_mfc_avc_software_batchbuffer(VADriverContextP ctx, dri_bo_reference(batch_bo); intel_batchbuffer_free(batch); + mfc_context->aux_batchbuffer = NULL; return batch_bo; } @@ -2196,18 +2193,14 @@ gen8_mfc_mpeg2_software_slice_batchbuffer(VADriverContextP ctx, struct encode_state *encode_state, struct intel_encoder_context *encoder_context) { + struct gen6_mfc_context *mfc_context = encoder_context->mfc_context; struct i965_driver_data *i965 = i965_driver_data(ctx); struct intel_batchbuffer *batch; - VAEncSequenceParameterBufferMPEG2 *seq_param = (VAEncSequenceParameterBufferMPEG2 *)encode_state->seq_param_ext->buffer; VAEncSliceParameterBufferMPEG2 *next_slice_group_param = NULL; dri_bo *batch_bo; int i; - int buffer_size; - int width_in_mbs = ALIGN(seq_param->picture_width, 16) / 16; - int height_in_mbs = ALIGN(seq_param->picture_height, 16) / 16; - buffer_size = width_in_mbs * height_in_mbs * 64; - batch = intel_batchbuffer_new(&i965->intel, I915_EXEC_BSD, buffer_size); + batch = mfc_context->aux_batchbuffer; batch_bo = batch->buffer; for (i = 0; i < encode_state->num_slice_params_ext; i++) { @@ -2228,6 +2221,7 @@ gen8_mfc_mpeg2_software_slice_batchbuffer(VADriverContextP ctx, dri_bo_reference(batch_bo); intel_batchbuffer_free(batch); + mfc_context->aux_batchbuffer = NULL; return batch_bo; } |