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| author | Xiang, Haihao <haihao.xiang@intel.com> | 2011-05-10 12:52:05 +0800 |
|---|---|---|
| committer | Xiang, Haihao <haihao.xiang@intel.com> | 2011-05-10 14:17:20 +0800 |
| commit | a384c9b28be0e596acb29dd4ec1bb9810d77387c (patch) | |
| tree | 77e563497aa614e9dfcf071fe200a55c2927f115 /i965_avc_ildb.c | |
| parent | 28b83a7b9c985c32d89289b925f3bc96080d381a (diff) | |
| download | libva-intel-driver-a384c9b28be0e596acb29dd4ec1bb9810d77387c.tar.gz libva-intel-driver-a384c9b28be0e596acb29dd4ec1bb9810d77387c.tar.bz2 libva-intel-driver-a384c9b28be0e596acb29dd4ec1bb9810d77387c.zip | |
i965_drv_video: store kernel info in the corresponding context
Diffstat (limited to 'i965_avc_ildb.c')
| -rw-r--r-- | i965_avc_ildb.c | 6 |
1 files changed, 2 insertions, 4 deletions
diff --git a/i965_avc_ildb.c b/i965_avc_ildb.c index 19146ac..739e0cf 100644 --- a/i965_avc_ildb.c +++ b/i965_avc_ildb.c @@ -123,8 +123,6 @@ struct avc_ildb_root_input unsigned int pad3; }; -extern struct i965_kernel *h264_avc_kernels; - #define NUM_AVC_ILDB_INTERFACES ARRAY_ELEMS(avc_ildb_kernel_offset_gen4) static unsigned long *avc_ildb_kernel_offset = NULL; @@ -278,7 +276,7 @@ i965_avc_ildb_interface_descriptor_table(VADriverContextP ctx, struct i965_h264_ int kernel_offset = avc_ildb_kernel_offset[i]; memset(desc, 0, sizeof(*desc)); desc->desc0.grf_reg_blocks = 7; - desc->desc0.kernel_start_pointer = (h264_avc_kernels[H264_AVC_COMBINED].bo->offset + kernel_offset) >> 6; /* reloc */ + desc->desc0.kernel_start_pointer = (i965_h264_context->avc_kernels[H264_AVC_COMBINED].bo->offset + kernel_offset) >> 6; /* reloc */ desc->desc1.const_urb_entry_read_offset = 0; desc->desc1.const_urb_entry_read_len = ((i == AVC_ILDB_ROOT_Y_ILDB_FRAME || i == AVC_ILDB_ROOT_Y_ILDB_FIELD || @@ -291,7 +289,7 @@ i965_avc_ildb_interface_descriptor_table(VADriverContextP ctx, struct i965_h264_ I915_GEM_DOMAIN_INSTRUCTION, 0, desc->desc0.grf_reg_blocks + kernel_offset, i * sizeof(*desc) + offsetof(struct i965_interface_descriptor, desc0), - h264_avc_kernels[H264_AVC_COMBINED].bo); + i965_h264_context->avc_kernels[H264_AVC_COMBINED].bo); dri_bo_emit_reloc(bo, I915_GEM_DOMAIN_INSTRUCTION, 0, |