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| author | Zhao, Yakui <yakui.zhao@intel.com> | 2014-05-26 08:40:15 +0800 |
|---|---|---|
| committer | Xiang, Haihao <haihao.xiang@intel.com> | 2014-06-16 11:53:35 +0800 |
| commit | b5fec62b2533c7086ddd40d0c61b51aedc6e33c2 (patch) | |
| tree | ae9943bdde1fed3a46742b05436fc5a0787e0dc2 | |
| parent | 107274f309c6c3a7c59b70d5140b781341c7e9c2 (diff) | |
| download | libva-intel-driver-b5fec62b2533c7086ddd40d0c61b51aedc6e33c2.tar.gz libva-intel-driver-b5fec62b2533c7086ddd40d0c61b51aedc6e33c2.tar.bz2 libva-intel-driver-b5fec62b2533c7086ddd40d0c61b51aedc6e33c2.zip | |
H264_encoding: Don't update the slice qp for CBR mode when finding packed slice_header data
Otherwise the slice qp is inconsistent and the encoding is incorrect.
Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
(cherry picked from commit 897527c30435202927e6cd05cd5189a710d02c91)
| -rw-r--r-- | src/gen6_mfc.c | 6 | ||||
| -rw-r--r-- | src/gen75_mfc.c | 6 | ||||
| -rw-r--r-- | src/gen8_mfc.c | 6 |
3 files changed, 12 insertions, 6 deletions
diff --git a/src/gen6_mfc.c b/src/gen6_mfc.c index f1b29b9..0a10054 100644 --- a/src/gen6_mfc.c +++ b/src/gen6_mfc.c @@ -794,7 +794,8 @@ gen6_mfc_avc_pipeline_slice_programing(VADriverContextP ctx, if (rate_control_mode == VA_RC_CBR) { qp = mfc_context->bit_rate_control_context[slice_type].QpPrimeY; - pSliceParameter->slice_qp_delta = qp - pPicParameter->pic_init_qp; + if (encode_state->slice_header_index[slice_index] == 0) + pSliceParameter->slice_qp_delta = qp - pPicParameter->pic_init_qp; } /* only support for 8-bit pixel bit-depth */ @@ -1173,7 +1174,8 @@ gen6_mfc_avc_batchbuffer_slice(VADriverContextP ctx, if (rate_control_mode == VA_RC_CBR) { qp = mfc_context->bit_rate_control_context[slice_type].QpPrimeY; - pSliceParameter->slice_qp_delta = qp - pPicParameter->pic_init_qp; + if (encode_state->slice_header_index[slice_index] == 0) + pSliceParameter->slice_qp_delta = qp - pPicParameter->pic_init_qp; } /* only support for 8-bit pixel bit-depth */ diff --git a/src/gen75_mfc.c b/src/gen75_mfc.c index 1051dd5..2ff35af 100644 --- a/src/gen75_mfc.c +++ b/src/gen75_mfc.c @@ -1172,7 +1172,8 @@ gen75_mfc_avc_pipeline_slice_programing(VADriverContextP ctx, if (rate_control_mode == VA_RC_CBR) { qp = mfc_context->bit_rate_control_context[slice_type].QpPrimeY; - pSliceParameter->slice_qp_delta = qp - pPicParameter->pic_init_qp; + if (encode_state->slice_header_index[slice_index] == 0) + pSliceParameter->slice_qp_delta = qp - pPicParameter->pic_init_qp; } /* only support for 8-bit pixel bit-depth */ @@ -1510,7 +1511,8 @@ gen75_mfc_avc_batchbuffer_slice(VADriverContextP ctx, if (rate_control_mode == VA_RC_CBR) { qp = mfc_context->bit_rate_control_context[slice_type].QpPrimeY; - pSliceParameter->slice_qp_delta = qp - pPicParameter->pic_init_qp; + if (encode_state->slice_header_index[slice_index] == 0) + pSliceParameter->slice_qp_delta = qp - pPicParameter->pic_init_qp; } /* only support for 8-bit pixel bit-depth */ diff --git a/src/gen8_mfc.c b/src/gen8_mfc.c index c86cf09..e3f07ad 100644 --- a/src/gen8_mfc.c +++ b/src/gen8_mfc.c @@ -1036,7 +1036,8 @@ gen8_mfc_avc_pipeline_slice_programing(VADriverContextP ctx, if (rate_control_mode == VA_RC_CBR) { qp = mfc_context->bit_rate_control_context[slice_type].QpPrimeY; - pSliceParameter->slice_qp_delta = qp - pPicParameter->pic_init_qp; + if (encode_state->slice_header_index[slice_index] == 0) + pSliceParameter->slice_qp_delta = qp - pPicParameter->pic_init_qp; } /* only support for 8-bit pixel bit-depth */ @@ -1405,7 +1406,8 @@ gen8_mfc_avc_batchbuffer_slice(VADriverContextP ctx, if (rate_control_mode == VA_RC_CBR) { qp = mfc_context->bit_rate_control_context[slice_type].QpPrimeY; - pSliceParameter->slice_qp_delta = qp - pPicParameter->pic_init_qp; + if (encode_state->slice_header_index[slice_index] == 0) + pSliceParameter->slice_qp_delta = qp - pPicParameter->pic_init_qp; } /* only support for 8-bit pixel bit-depth */ |