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authorSean V Kelley <sean.v.kelley@intel.com>2014-08-20 13:03:52 -0700
committerZhao, Yakui <yakui.zhao@intel.com>2014-09-25 09:31:13 +0800
commit1121cb1f87228005a2b15b5ead95701a7fbe7519 (patch)
treecb1adfed2fef18b16e7af6eaa4d4eda4be79f531
parente02449a1d65b44a82b5f2fcdf8a5b0ba51c2bb6a (diff)
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CHV: Add PCIID placeholders for CHV
Pending branding and differentiation by stepping. CHV is used generically to match libdrm and mesa identification. Signed-off-by: Sean V Kelley <sean.v.kelley@intel.com>
-rw-r--r--src/i965_device_info.c51
-rw-r--r--src/i965_pciids.h4
-rw-r--r--src/intel_driver.h2
3 files changed, 57 insertions, 0 deletions
diff --git a/src/i965_device_info.c b/src/i965_device_info.c
index 9573b7d..0e97794 100644
--- a/src/i965_device_info.c
+++ b/src/i965_device_info.c
@@ -244,6 +244,48 @@ static const struct hw_codec_info bdw_hw_codec_info = {
},
};
+static const struct hw_codec_info chv_hw_codec_info = {
+ .dec_hw_context_init = gen8_dec_hw_context_init,
+ .enc_hw_context_init = gen8_enc_hw_context_init,
+ .proc_hw_context_init = gen75_proc_context_init,
+ .render_init = gen8_render_init,
+ .post_processing_context_init = gen8_post_processing_context_init,
+
+ .max_width = 4096,
+ .max_height = 4096,
+ .min_linear_wpitch = 64,
+ .min_linear_hpitch = 16,
+
+ .h264_mvc_dec_profiles = (VA_PROFILE_MASK(H264StereoHigh) |
+ VA_PROFILE_MASK(H264MultiviewHigh)),
+ .h264_dec_chroma_formats = EXTRA_H264_DEC_CHROMA_FORMATS,
+ .jpeg_dec_chroma_formats = EXTRA_JPEG_DEC_CHROMA_FORMATS,
+
+ .has_mpeg2_decoding = 1,
+ .has_mpeg2_encoding = 1,
+ .has_h264_decoding = 1,
+ .has_h264_encoding = 1,
+ .has_vc1_decoding = 1,
+ .has_jpeg_decoding = 1,
+ .has_vpp = 1,
+ .has_accelerated_getimage = 1,
+ .has_accelerated_putimage = 1,
+ .has_tiled_surface = 1,
+ .has_di_motion_adptive = 1,
+ .has_di_motion_compensated = 1,
+ .has_vp8_decoding = 1,
+ .has_h264_mvc_encoding = 1,
+
+ .num_filters = 5,
+ .filters = {
+ { VAProcFilterNoiseReduction, I965_RING_VEBOX },
+ { VAProcFilterDeinterlacing, I965_RING_VEBOX },
+ { VAProcFilterSharpening, I965_RING_NULL }, /* need to rebuild the shader for BDW */
+ { VAProcFilterColorBalance, I965_RING_VEBOX},
+ { VAProcFilterSkinToneEnhancement, I965_RING_VEBOX},
+ },
+};
+
const struct hw_codec_info *
i965_get_codec_info(int devid)
{
@@ -356,6 +398,15 @@ static const struct intel_device_info bdw_device_info = {
.max_wm_threads = 64, /* per PSD */
};
+static const struct intel_device_info chv_device_info = {
+ .gen = 8,
+
+ .urb_size = 4096,
+ .max_wm_threads = 64, /* per PSD */
+
+ .is_cherryview = 1,
+};
+
const struct intel_device_info *
i965_get_device_info(int devid)
{
diff --git a/src/i965_pciids.h b/src/i965_pciids.h
index 64973e4..fc046d1 100644
--- a/src/i965_pciids.h
+++ b/src/i965_pciids.h
@@ -129,3 +129,7 @@ CHIPSET(0x162A, bdw, bdw, "Intel(R) Broadwell")
CHIPSET(0x162B, bdw, bdw, "Intel(R) Broadwell")
CHIPSET(0x162D, bdw, bdw, "Intel(R) Broadwell")
CHIPSET(0x162E, bdw, bdw, "Intel(R) Broadwell")
+CHIPSET(0x22B0, chv, chv, "Intel(R) CherryView")
+CHIPSET(0x22B1, chv, chv, "Intel(R) CherryView")
+CHIPSET(0x22B2, chv, chv, "Intel(R) CherryView")
+CHIPSET(0x22B3, chv, chv, "Intel(R) CherryView")
diff --git a/src/intel_driver.h b/src/intel_driver.h
index 7a726e3..432a0d9 100644
--- a/src/intel_driver.h
+++ b/src/intel_driver.h
@@ -133,6 +133,7 @@ struct intel_device_info
unsigned int is_ivybridge : 1; /* gen7 */
unsigned int is_baytrail : 1; /* gen7 */
unsigned int is_haswell : 1; /* gen7 */
+ unsigned int is_cherryview : 1; /* gen8 */
};
struct intel_driver_data
@@ -188,6 +189,7 @@ struct intel_region
#define IS_HASWELL(device_info) (device_info->is_haswell)
#define IS_GEN7(device_info) (device_info->gen == 7)
+#define IS_CHERRYVIEW(device_info) (device_info->is_cherryview)
#define IS_GEN8(device_info) (device_info->gen == 8)
#endif /* _INTEL_DRIVER_H_ */