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| author | Eugeni Dodonov <eugeni@dodonov.net> | 2012-03-29 21:03:29 -0300 |
|---|---|---|
| committer | Eugeni Dodonov <eugeni.dodonov@intel.com> | 2012-04-01 11:03:36 -0300 |
| commit | e057a56448e2e785f74bc13dbd6ead8572ebed91 (patch) | |
| tree | 113508dab37f6753088292e525cfc240adfe5f55 /intel | |
| parent | a3c34f56b94d4d47cadcd9814c2684c11f800e7d (diff) | |
| download | libdrm-e057a56448e2e785f74bc13dbd6ead8572ebed91.tar.gz libdrm-e057a56448e2e785f74bc13dbd6ead8572ebed91.tar.bz2 libdrm-e057a56448e2e785f74bc13dbd6ead8572ebed91.zip | |
intel: add Ivy Bridge GT2 server variant
We were missing this one and it is being used by Bromolow.
Signed-off-by: Eugeni Dodonov <eugeni.dodonov@intel.com>
Diffstat (limited to 'intel')
| -rw-r--r-- | intel/intel_chipset.h | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/intel/intel_chipset.h b/intel/intel_chipset.h index 435d01a3..9c1abc86 100644 --- a/intel/intel_chipset.h +++ b/intel/intel_chipset.h @@ -44,6 +44,7 @@ #define PCI_CHIP_IVYBRIDGE_M_GT1 0x0156 /* mobile */ #define PCI_CHIP_IVYBRIDGE_M_GT2 0x0166 #define PCI_CHIP_IVYBRIDGE_S 0x015a /* server */ +#define PCI_CHIP_IVYBRIDGE_S_GT2 0x016a /* server */ #define PCI_CHIP_HASWELL_GT1 0x0402 /* Desktop */ #define PCI_CHIP_HASWELL_GT2 0x0412 @@ -128,7 +129,8 @@ dev == PCI_CHIP_IVYBRIDGE_GT2 || \ dev == PCI_CHIP_IVYBRIDGE_M_GT1 || \ dev == PCI_CHIP_IVYBRIDGE_M_GT2 || \ - dev == PCI_CHIP_IVYBRIDGE_S) + dev == PCI_CHIP_IVYBRIDGE_S || \ + dev == PCI_CHIP_IVYBRIDGE_S_GT2) #define IS_HSW_GT1(devid) (devid == PCI_CHIP_HASWELL_GT1 || \ devid == PCI_CHIP_HASWELL_M_GT1) |