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authorGuchun Chen <guchun.chen@amd.com>2019-08-27 10:44:18 +0800
committerAlex Deucher <alexander.deucher@amd.com>2019-09-16 07:57:10 -0500
commit018169bfbab281c70059602925d49de3852a47c2 (patch)
tree29eb864c7f347c3fafe66e5dcedff6a508811bbd /data
parentcb637bc17becf609349d6a09afd26aaeebc144ed (diff)
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amdgpu: delete test configuration file
Json package dependence is removed from amdgpu_test, so this json configuration file is not needed any more. Suggested-by: Christian König <christian.koenig@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Reviewed-by: Tao Zhou <tao.zhou1@amd.com> Signed-off-by: Guchun Chen <guchun.chen@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'data')
-rw-r--r--data/amdgpu_ras.json267
1 files changed, 0 insertions, 267 deletions
diff --git a/data/amdgpu_ras.json b/data/amdgpu_ras.json
deleted file mode 100644
index 26fd9465..00000000
--- a/data/amdgpu_ras.json
+++ /dev/null
@@ -1,267 +0,0 @@
-{
- "version": "0.0.1",
- "block": {
- "umc": {
- "index": 0
- },
- "gfx": {
- "index": 2,
- "subblock": {
- "gfx_cpc_scratch": 0,
- "gfx_cpc_ucode": 1,
- "gfx_dc_state_me1": 2,
- "gfx_dc_csinvoc_me1": 3,
- "gfx_dc_restore_me1": 4,
- "gfx_dc_state_me2": 5,
- "gfx_dc_csinvoc_me2": 6,
- "gfx_dc_restore_me2": 7,
- "gfx_cpf_roq_me2": 8,
- "gfx_cpf_roq_me1": 9,
- "gfx_cpf_tag": 10,
- "gfx_cpg_dma_roq": 11,
- "gfx_cpg_dma_tag": 12,
- "gfx_cpg_tag": 13,
- "gfx_gds_mem": 14,
- "gfx_gds_input_queue": 15,
- "gfx_gds_oa_phy_cmd_ram_mem": 16,
- "gfx_gds_oa_phy_data_ram_mem": 17,
- "gfx_gds_oa_pipe_mem": 18,
- "gfx_spi_sr_mem": 19,
- "gfx_sq_sgpr": 20,
- "gfx_sq_lds_d": 21,
- "gfx_sq_lds_i": 22,
- "gfx_sq_vgpr": 23,
- "gfx_sqc_inst_utcl1_lfifo": 24,
- "gfx_sqc_data_cu0_write_data_buf": 25,
- "gfx_sqc_data_cu0_utcl1_lfifo": 26,
- "gfx_sqc_data_cu1_write_data_buf": 27,
- "gfx_sqc_data_cu1_utcl1_lfifo": 28,
- "gfx_sqc_data_cu2_write_data_buf": 29,
- "gfx_sqc_data_cu2_utcl1_lfifo": 30,
- "gfx_sqc_inst_banka_tag_ram": 31,
- "gfx_sqc_inst_banka_utcl1_miss_fifo": 32,
- "gfx_sqc_inst_banka_miss_fifo": 33,
- "gfx_sqc_inst_banka_bank_ram": 34,
- "gfx_sqc_data_banka_tag_ram": 35,
- "gfx_sqc_data_banka_hit_fifo": 36,
- "gfx_sqc_data_banka_miss_fifo": 37,
- "gfx_sqc_data_banka_dirty_bit_ram": 38,
- "gfx_sqc_data_banka_bank_ram": 39,
- "gfx_sqc_inst_bankb_tag_ram": 40,
- "gfx_sqc_inst_bankb_utcl1_miss_fifo": 41,
- "gfx_sqc_inst_bankb_miss_fifo": 42,
- "gfx_sqc_inst_bankb_bank_ram": 43,
- "gfx_sqc_data_bankb_tag_ram": 44,
- "gfx_sqc_data_bankb_hit_fifo": 45,
- "gfx_sqc_data_bankb_miss_fifo": 46,
- "gfx_sqc_data_bankb_dirty_bit_ram": 47,
- "gfx_sqc_data_bankb_bank_ram": 48,
- "gfx_ta_fs_dfifo": 49,
- "gfx_ta_fs_afifo": 50,
- "gfx_ta_fl_lfifo": 51,
- "gfx_ta_fx_lfifo": 52,
- "gfx_ta_fs_cfifo": 53,
- "gfx_tca_hole_fifo": 54,
- "gfx_tca_req_fifo": 55,
- "gfx_tcc_cache_data": 56,
- "gfx_tcc_cache_data_bank_0_1": 57,
- "gfx_tcc_cache_data_bank_1_0": 58,
- "gfx_tcc_cache_data_bank_1_1": 59,
- "gfx_tcc_cache_dirty_bank_0": 60,
- "gfx_tcc_cache_dirty_bank_1": 61,
- "gfx_tcc_high_rate_tag": 62,
- "gfx_tcc_low_rate_tag": 63,
- "gfx_tcc_in_use_dec": 64,
- "gfx_tcc_in_use_transfer": 65,
- "gfx_tcc_return_data": 66,
- "gfx_tcc_return_control": 67,
- "gfx_tcc_uc_atomic_fifo": 68,
- "gfx_tcc_write_return": 69,
- "gfx_tcc_write_cache_read": 70,
- "gfx_tcc_src_fifo": 71,
- "gfx_tcc_src_fifo_next_ram": 72,
- "gfx_tcc_cache_tag_probe_fifo": 73,
- "gfx_tcc_latency_fifo": 74,
- "gfx_tcc_latency_fifo_next_ram": 75,
- "gfx_tcc_wrret_tag_write_return": 76,
- "gfx_tcc_atomic_return_buffer": 77,
- "gfx_tci_write_ram": 78,
- "gfx_tcp_cache_ram": 79,
- "gfx_tcp_lfifo_ram": 80,
- "gfx_tcp_cmd_fifo": 81,
- "gfx_tcp_vm_fifo": 82,
- "gfx_tcp_db_ram": 83,
- "gfx_tcp_utcl1_lfifo0": 84,
- "gfx_tcp_utcl1_lfifo1": 85,
- "gfx_td_ss_fifo_lo": 86,
- "gfx_td_ss_fifo_hi": 87,
- "gfx_td_cs_fifo": 88,
- "gfx_ea_dramrd_cmdmem": 89,
- "gfx_ea_dramwr_cmdmem": 90,
- "gfx_ea_dramwr_datamem": 91,
- "gfx_ea_rret_tagmem": 92,
- "gfx_ea_wret_tagmem": 93,
- "gfx_ea_gmird_cmdmem": 94,
- "gfx_ea_gmiwr_cmdmem": 95,
- "gfx_ea_gmiwr_datamem": 96,
- "gfx_ea_dramrd_pagemem": 97,
- "gfx_ea_dramwr_pagemem": 98,
- "gfx_ea_iord_cmdmem": 99,
- "gfx_ea_iowr_cmdmem": 100,
- "gfx_ea_iowr_datamem": 101,
- "gfx_ea_gmird_pagemem": 102,
- "gfx_ea_gmiwr_pagemem": 103,
- "gfx_ea_mam_d0mem": 104,
- "gfx_ea_mam_d1mem": 105,
- "gfx_ea_mam_d2mem": 106,
- "gfx_ea_mam_d3mem": 107,
- "utc_vml2_bank_cache": 108,
- "utc_vml2_walker": 109,
- "utc_atcl2_cache_2m_bank": 110,
- "utc_atcl2_cache_4k_bank": 111
- }
- },
- },
- "type": {
- "parity": 1,
- "single_correctable": 2,
- "multi_uncorrectable": 4,
- "poison": 8
- },
- "tests": [
- {
- "name": "ras_umc.1.0",
- "block": "umc",
- "type": "single_correctable",
- "address": 0,
- "value": 0
- },
- {
- "name": "ras_umc.1.0",
- "block": "umc",
- "type": "multi_uncorrectable",
- "address": 0,
- "value": 0
- },
- {
- "name": "ras_gfx.2.1",
- "block": "gfx",
- "subblock": "gfx_cpc_ucode",
- "type": "single_correctable",
- "address": 0,
- "value": 0
- },
- {
- "name": "ras_gfx.2.10",
- "block": "gfx",
- "subblock": "gfx_cpf_tag",
- "type": "single_correctable",
- "address": 0,
- "value": 0
- },
- {
- "name": "ras_gfx.2.13",
- "block": "gfx",
- "subblock": "gfx_cpg_tag",
- "type": "single_correctable",
- "address": 0,
- "value": 0
- },
- {
- "name": "ras_gfx.2.21",
- "block": "gfx",
- "subblock": "gfx_sq_lds_d",
- "type": "single_correctable",
- "address": 0,
- "value": 0
- },
- {
- "name": "ras_gfx.2.28",
- "block": "gfx",
- "subblock": "gfx_sqc_data_cu1_utcl1_lfifo",
- "type": "single_correctable",
- "address": 0,
- "value": 0
- },
- {
- "name": "ras_gfx.2.31",
- "block": "gfx",
- "subblock": "gfx_sqc_inst_banka_tag_ram",
- "type": "single_correctable",
- "address": 0,
- "value": 0
- },
- {
- "name": "ras_gfx.2.40",
- "block": "gfx",
- "subblock": "gfx_sqc_inst_bankb_tag_ram",
- "type": "single_correctable",
- "address": 0,
- "value": 0
- },
- {
- "name": "ras_gfx.2.49",
- "block": "gfx",
- "subblock": "gfx_ta_fs_dfifo",
- "type": "single_correctable",
- "address": 0,
- "value": 0
- },
- {
- "name": "ras_gfx.2.56",
- "block": "gfx",
- "subblock": "gfx_tcc_cache_data",
- "type": "single_correctable",
- "address": 0,
- "value": 0
- },
- {
- "name": "ras_gfx.2.57",
- "block": "gfx",
- "subblock": "gfx_tcc_cache_data_bank_0_1",
- "type": "single_correctable",
- "address": 0,
- "value": 0
- },
- {
- "name": "ras_gfx.2.58",
- "block": "gfx",
- "subblock": "gfx_tcc_cache_data_bank_1_0",
- "type": "single_correctable",
- "address": 0,
- "value": 0
- },
- {
- "name": "ras_gfx.2.59",
- "block": "gfx",
- "subblock": "gfx_tcc_cache_data_bank_1_1",
- "type": "single_correctable",
- "address": 0,
- "value": 0
- },
- {
- "name": "ras_gfx.2.79",
- "block": "gfx",
- "subblock": "gfx_tcp_cache_ram",
- "type": "single_correctable",
- "address": 0,
- "value": 0
- },
- {
- "name": "ras_gfx.2.86",
- "block": "gfx",
- "subblock": "gfx_td_ss_fifo_lo",
- "type": "single_correctable",
- "address": 0,
- "value": 0
- },
- {
- "name": "ras_gfx.2.89",
- "block": "gfx",
- "subblock": "gfx_ea_dramrd_cmdmem",
- "type": "single_correctable",
- "address": 0,
- "value": 0
- },
- ]
-}