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/*******************************************************************************
* Copyright 2018 Intel Corporation
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*******************************************************************************/
#ifndef JIT_UNI_DW_CONV_KERNEL_F32_HPP
#define JIT_UNI_DW_CONV_KERNEL_F32_HPP
#include "c_types_map.hpp"
#include "jit_generator.hpp"
#include "jit_primitive_conf.hpp"
#include "jit_uni_eltwise.hpp"
#include "jit_uni_depthwise.hpp"
namespace mkldnn {
namespace impl {
namespace cpu {
template <cpu_isa_t isa>
struct jit_uni_dw_conv_fwd_kernel_f32: public jit_generator {
DECLARE_CPU_JIT_AUX_FUNCTIONS(jit_uni_dw_conv_fwd_kernel_f32)
jit_uni_dw_conv_fwd_kernel_f32(jit_conv_conf_t ajcp,
const primitive_attr_t &attr): jcp(ajcp), attr_(attr) {
this->generate();
jit_ker = (void (*)(jit_conv_call_s *))this->getCode();
}
~jit_uni_dw_conv_fwd_kernel_f32() {
for (auto inj : eltwise_injectors)
delete inj;
eltwise_injectors.clear();
for (auto inj : depthwise_injectors)
delete inj;
depthwise_injectors.clear();
}
static bool post_ops_ok(jit_conv_conf_t &jcp,
const primitive_attr_t &attr);
static status_t init_conf(jit_conv_conf_t &jcp,
const convolution_desc_t &cd, const memory_desc_wrapper &src_d,
const memory_desc_wrapper &weights_d,
const memory_desc_wrapper &dst_d, const primitive_attr_t &attr,
bool with_relu = false, float relu_negative_slope = 0.f);
jit_conv_conf_t jcp;
const primitive_attr_t &attr_;
void (*jit_ker)(jit_conv_call_s *);
private:
using Vmm = typename utils::conditional3<isa == sse42, Xbyak::Xmm,
isa == avx2, Xbyak::Ymm, Xbyak::Zmm>::type;
using reg64_t = const Xbyak::Reg64;
const Xbyak::AddressFrame &vmmword = (isa == sse42)
? xword : (isa == avx2) ? yword : zword;
const int vlen = cpu_isa_traits<isa>::vlen;
// dw convolution
reg64_t reg_input = r8;
reg64_t aux_reg_input = r9;
reg64_t aux1_reg_input = r10;
reg64_t reg_kernel = r11;
reg64_t aux_reg_kernel = r12;
reg64_t aux1_reg_kernel = r13;
reg64_t reg_output = r14;
reg64_t reg_bias = r15;
reg64_t reg_kh = rax;
reg64_t reg_kw = rbx;
reg64_t iter_kh = rdx;
reg64_t iter_kw = rsi;
reg64_t reg_ur_w = rbp;
reg64_t reg_ch_blocks = aux1_reg_input;
reg64_t imm_addr64 = aux1_reg_input;
reg64_t reg_d_weights = imm_addr64;
reg64_t reg_d_bias = iter_kh;
inline Vmm get_ker_reg(int idx) { return Vmm(idx + 0); }
inline Vmm get_src_reg(int idx) { return Vmm(idx + 1); }
inline Vmm get_acc_reg(int idx) { return Vmm(idx + 4); }
inline void load_src(int ur_ch_blocks, int ur_w);
inline void apply_filter(int ur_ch_blocks, int ur_w);
inline void apply_filter_unrolled(int ur_ch_blocks, int ur_w);
inline void apply_postprocess(int ur_ch_blocks, int ur_w);
inline void store_dst(int ur_ch_blocks, int ur_w);
inline void loop_body(int ur_ch_blocks);
void generate();
nstl::vector<jit_uni_eltwise_injector_f32<isa>*> eltwise_injectors;
nstl::vector<jit_uni_depthwise_injector_f32<isa>*> depthwise_injectors;
};
template <cpu_isa_t isa>
struct jit_uni_dw_conv_bwd_data_kernel_f32: public jit_generator {
DECLARE_CPU_JIT_AUX_FUNCTIONS(jit_uni_dw_conv_bwd_data_kernel_f32)
jit_uni_dw_conv_bwd_data_kernel_f32(jit_conv_conf_t ajcp): jcp(ajcp) {
this->generate();
jit_ker = (void (*)(jit_conv_call_s *))this->getCode();
}
static status_t init_conf(jit_conv_conf_t &jcp,
const convolution_desc_t &cd, const memory_desc_wrapper &diff_src_d,
const memory_desc_wrapper &weights_d,
const memory_desc_wrapper &diff_dst_d);
jit_conv_conf_t jcp;
void (*jit_ker)(jit_conv_call_s *);
private:
using Vmm = typename utils::conditional3<isa == sse42, Xbyak::Xmm,
isa == avx2, Xbyak::Ymm, Xbyak::Zmm>::type;
using reg64_t = const Xbyak::Reg64;
inline Vmm get_ker_reg(int idx) { return Vmm(idx + 0); }
inline Vmm get_src_reg(int idx) { return Vmm(idx + 1); }
inline Vmm get_acc_reg(int idx) { return Vmm(idx + 4); }
reg64_t reg_ddst = rax;
reg64_t aux_reg_ddst = r8;
reg64_t aux1_reg_ddst = abi_not_param1;
reg64_t reg_kernel = rdx;
reg64_t aux_reg_kernel = r10;
reg64_t aux1_reg_kernel = rbp;
reg64_t reg_dsrc = rsi;
reg64_t reg_ur_str_w = r9;
reg64_t reg_ch_blocks = rbx;
reg64_t iter_kh = r11;
reg64_t iter_kw = r12;
reg64_t reg_kh = r13;
reg64_t reg_kw = r14;
inline void loop_body(int ur_ch_blocks);
inline void load_ddst(int ur_ch_blocks, int ur_str_w);
inline void apply_filter(int ur_ch_blocks, int ur_str_w);
inline void store_dsrc(int ur_ch_blocks, int ur_str_w);
void generate();
};
}
}
}
#endif
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