Publishing R5 content (#72)

* Publishing R5 content

* Updated ade revision

* updated readme

* add possibility to build CPU plugin with Intel MKL package

26 files changed, 511 insertions, 12 deletions

diff --git a/inference-engine/thirdparty/mkl-dnn/tests/benchdnn/inputs/bnorm/test_bnorm_regressions b/inference-engine/thirdparty/mkl-dnn/tests/benchdnn/inputs/bnorm/test_bnorm_regressions
index 134a50561..4cb9265c8 100644
--- a/inference-engine/thirdparty/mkl-dnn/tests/benchdnn/inputs/bnorm/test_bnorm_regressions
+++ b/inference-engine/thirdparty/mkl-dnn/tests/benchdnn/inputs/bnorm/test_bnorm_regressions
@@ -2,7 +2,6 @@
 --fmt=nhwc
 
 --dir=FWD_D
---flags=SR --batch=bnorm_large
 --flags=SR --batch=bnorm_regressions
 --flags=GS --batch=bnorm_regressions
 --flags=S  --batch=bnorm_regressions
@@ -13,7 +12,6 @@
 --attr=
 
 --dir=BWD_DW
---flags=SR --batch=bnorm_large
 --flags=SR --batch=bnorm_regressions
 --flags=GS --batch=bnorm_regressions
 --flags=S  --batch=bnorm_regressions
@@ -24,7 +22,6 @@
 --fmt=nchw
 
 --dir=FWD_D
---flags=SR --batch=bnorm_large
 --flags=SR --batch=bnorm_regressions
 --flags=GS --batch=bnorm_regressions
 --flags=S  --batch=bnorm_regressions
@@ -35,7 +32,6 @@
 --attr=
 
 --dir=BWD_DW
---flags=SR --batch=bnorm_large
 --flags=SR --batch=bnorm_regressions
 --flags=GS --batch=bnorm_regressions
 --flags=S  --batch=bnorm_regressions
@@ -46,7 +42,6 @@
 --fmt=nChw16c # avx512
 
 --dir=FWD_D
---flags=SR --batch=bnorm_large
 --flags=SR --batch=bnorm_regressions
 --flags=GS --batch=bnorm_regressions
 --flags=S  --batch=bnorm_regressions
@@ -57,7 +52,6 @@
 --attr=
 
 --dir=BWD_DW
---flags=SR --batch=bnorm_large
 --flags=SR --batch=bnorm_regressions
 --flags=GS --batch=bnorm_regressions
 --flags=S  --batch=bnorm_regressions
diff --git a/inference-engine/thirdparty/mkl-dnn/tests/benchdnn/inputs/bnorm/test_bnorm_regressions_large b/inference-engine/thirdparty/mkl-dnn/tests/benchdnn/inputs/bnorm/test_bnorm_regressions_large
new file mode 100644
index 000000000..ff5062f93
--- /dev/null
+++ b/inference-engine/thirdparty/mkl-dnn/tests/benchdnn/inputs/bnorm/test_bnorm_regressions_large
@@ -0,0 +1,24 @@
+--skip-impl=ref
+--fmt=nhwc
+
+--dir=FWD_D
+--flags=SR --batch=bnorm_large
+
+--dir=BWD_DW
+--flags=SR --batch=bnorm_large
+
+--fmt=nchw
+
+--dir=FWD_D
+--flags=SR --batch=bnorm_large
+
+--dir=BWD_DW
+--flags=SR --batch=bnorm_large
+
+--fmt=nChw16c # avx512
+
+--dir=FWD_D
+--flags=SR --batch=bnorm_large
+
+--dir=BWD_DW
+--flags=SR --batch=bnorm_large
diff --git a/inference-engine/thirdparty/mkl-dnn/tests/benchdnn/inputs/conv_1d b/inference-engine/thirdparty/mkl-dnn/tests/benchdnn/inputs/conv_1d
new file mode 100644
index 000000000..ae6582ee5
--- /dev/null
+++ b/inference-engine/thirdparty/mkl-dnn/tests/benchdnn/inputs/conv_1d
@@ -0,0 +1,34 @@
+# 1D convolution
+
+g1mb50ic3iw224oc64kw7sw1pw0n"conv1d:1"
+
+g1mb50ic3iw224oc64ow112kw7sw2pw3n"conv1d:2"
+g1mb50ic256iw56oc512ow28kw1sw2pw0n"conv1d:3"
+g1mb50ic256iw56oc128ow28kw1sw2pw0n"conv1d:4"
+
+mb1ic32iw32oc32kw2pw0sw1n"conv1d:5"
+mb1ic32iw100oc32ow98kw3pw0sw1n"conv1d:6"
+mb1ic32iw121oc32ow119kw3pw0sw1n"conv1d:7"
+mb1ic512iw300oc512ow298kw3pw0sw1n"conv1d:8"
+
+mb1ic32iw32oc32kw5pw0sw1n"conv1d:9"
+mb1ic32iw100oc32kw2pw0sw1n"conv1d:10"
+mb1ic32iw121oc32kw6pw0sw1n"conv1d:11"
+mb1ic512iw300oc512kw1pw0sw1n"conv1d:12"
+
+mb1ic32iw32oc32kw5pw0sw1n"conv1d:13"
+mb1ic32iw100oc32kw2pw0sw1n"conv1d:14"
+mb1ic32iw121oc32kw6pw0sw4n"conv1d:15"
+
+mb1ic32iw32oc32kw5pw1sw1n"conv1d:16"
+mb1ic32iw100oc32kw2pw2sw1n"conv1d:17"
+mb1ic32iw121oc32kw6pw3sw1n"conv1d:18"
+
+mb1ic512iw32oc512kw5pw1sw1n"conv1d:19"
+mb1ic512iw100oc512kw2pw2sw1n"conv1d:20"
+mb1ic512iw121oc512kw6pw3sw1n"conv1d:21"
+
+ic8oc8_iw5ow2kw3sw1dw2pw3n"conv1d_gemm:1"
+ic32oc8_iw8ow2kw3sw1dw2pw0n"conv1d_gemm:2"
+ic512oc1024_iw19ow19kw3sw1dw5pw6n"conv1d_gemm:3"
+ic256oc512_iw15ow15kw3sw1dw5pw6n"conv1d_gemm:4"
diff --git a/inference-engine/thirdparty/mkl-dnn/tests/benchdnn/inputs/conv_1d_wavenet b/inference-engine/thirdparty/mkl-dnn/tests/benchdnn/inputs/conv_1d_wavenet
new file mode 100644
index 000000000..fab218a03
--- /dev/null
+++ b/inference-engine/thirdparty/mkl-dnn/tests/benchdnn/inputs/conv_1d_wavenet
@@ -0,0 +1,10 @@
+# Wavenet sizes
+mb128_g1ic32oc32_iw643ow642kw2sw1dw0pw0n"wavenet:conv1d_1"
+mb256_g1ic32oc32_iw337ow336kw2sw1dw0pw0n"wavenet:conv1d_2"
+mb32_g1ic32oc32_iw269ow268kw2sw1dw0pw0n"wavenet:conv1d_3"
+mb512_g1ic32oc32_iw168ow167kw2sw1dw0pw0n"wavenet:conv1d_4"
+mb64_g1ic32oc32_iw1349ow1348kw2sw1dw0pw0n"wavenet:conv1d_5"
+
+mb1_g1ic32oc32_iw842ow842kw1sw1dw0pw0n"wavenet:conv1d_1x1_1"
+mb1_g1ic512oc256_iw812ow812kw1sw1dw0pw0n"wavenet:conv1d_1x1_2"
+mb1_g1ic512oc512_iw812ow812kw1sw1dw0pw0n"wavenet:conv1d_1x1_3"
diff --git a/inference-engine/thirdparty/mkl-dnn/tests/benchdnn/inputs/conv_all b/inference-engine/thirdparty/mkl-dnn/tests/benchdnn/inputs/conv_all
index 3713198eb..f69be7d36 100644
--- a/inference-engine/thirdparty/mkl-dnn/tests/benchdnn/inputs/conv_all
+++ b/inference-engine/thirdparty/mkl-dnn/tests/benchdnn/inputs/conv_all
@@ -1,3 +1,5 @@
+--batch=conv_1d
+--batch=conv_1d_wavenet
 --batch=conv_3d_unet
 --batch=conv_alexnet
 --batch=conv_vgg_19
diff --git a/inference-engine/thirdparty/mkl-dnn/tests/benchdnn/inputs/conv_all_topo b/inference-engine/thirdparty/mkl-dnn/tests/benchdnn/inputs/conv_all_topo
index c9df7a139..313eba05b 100644
--- a/inference-engine/thirdparty/mkl-dnn/tests/benchdnn/inputs/conv_all_topo
+++ b/inference-engine/thirdparty/mkl-dnn/tests/benchdnn/inputs/conv_all_topo
@@ -1,3 +1,4 @@
+--batch=conv_1d_wavenet
 --batch=conv_3d_unet
 --batch=conv_a3c
 --batch=conv_alexnet
diff --git a/inference-engine/thirdparty/mkl-dnn/tests/benchdnn/inputs/conv_dilated b/inference-engine/thirdparty/mkl-dnn/tests/benchdnn/inputs/conv_dilated
index b69296458..30949cc22 100644
--- a/inference-engine/thirdparty/mkl-dnn/tests/benchdnn/inputs/conv_dilated
+++ b/inference-engine/thirdparty/mkl-dnn/tests/benchdnn/inputs/conv_dilated
@@ -14,3 +14,7 @@ mb20ic4ih8iw8oc6oh4ow8kh3kw3sh2sw1ph1pw1dh1dw0n"dilated_conv:11"
 mb20ic4ih8iw8oc6oh8ow2kh3kw3sh1sw3ph1pw1dh0dw2n"dilated_conv:12"
 mb20ic8ih5iw8oc8oh3ow8kh3kw3ph2pw1dh1dw0n"dilated_conv:13"
 mb20ic8ih8iw5oc8oh8ow2kh3kw3ph1pw3dh0dw2n"dilated_conv:14"
+
+mb20ic16ih1iw8oc6oh1kh1kw3sh1pw0ph0sw1dh0dw2n"dilated_conv1d:15"
+mb20ic32ih1iw8oc8oh1kh1kw3sh1pw0ph0sw1dh0dw1n"dilated_conv1d:16"
+mb20ic32ih1iw8oc8oh1kh1kw3sh1pw0ph0sw1dh0dw2n"dilated_conv1d:17"
diff --git a/inference-engine/thirdparty/mkl-dnn/tests/benchdnn/inputs/conv_regression_small_spatial b/inference-engine/thirdparty/mkl-dnn/tests/benchdnn/inputs/conv_regression_small_spatial
index 3f91569f7..284233ce4 100644
--- a/inference-engine/thirdparty/mkl-dnn/tests/benchdnn/inputs/conv_regression_small_spatial
+++ b/inference-engine/thirdparty/mkl-dnn/tests/benchdnn/inputs/conv_regression_small_spatial
@@ -85,3 +85,4 @@ mb1ic16oc16_ih5oh5kh7ph6
 mb4_g1ic1oc2_ih5oh2kh2sh2dh0ph0_iw5ow2kw2sw2dw0pw0
 mb2ic16ih33oc16oh16kh2sh2
 mb1g2ic2oc4_ih2oh1kh2sh1ph0_iw3ow2kw3sw1pw0
+mb1_g1ic1oc1_id4od3kd3sd2dd0pd2_ih4oh2kh5sh2dh0ph2_iw4ow1kw7sw2dw0pw2
diff --git a/inference-engine/thirdparty/mkl-dnn/tests/benchdnn/inputs/conv_tails b/inference-engine/thirdparty/mkl-dnn/tests/benchdnn/inputs/conv_tails
index f19836a4c..7d8b0fdd1 100644
--- a/inference-engine/thirdparty/mkl-dnn/tests/benchdnn/inputs/conv_tails
+++ b/inference-engine/thirdparty/mkl-dnn/tests/benchdnn/inputs/conv_tails
@@ -57,4 +57,15 @@ ic17oc16_ih13oh12kh3ph0_id13od11kd3pd0_n"tails_conv_3d:3"
 ic35oc32_ih13oh13kh3ph1_id13od11kd3pd0_n"tails_conv_3d:4"
 
 ic47oc37_ih13oh12kh3ph0_id13od11kd3pd0_n"tails_conv_3d:5"
-ic27oc19_ih13oh13kh3ph1_id13od11kd3pd0_n"tails_conv_3d:6"
\ No newline at end of file
+ic27oc19_ih13oh13kh3ph1_id13od11kd3pd0_n"tails_conv_3d:6"
+
+# 1d conv
+ic19oc32_iw13ow12kw3pw1_n"tails_conv_1d:1"
+ic20oc32_iw13ow13kw3pw0_n"tails_conv_1d:2"
+ic23oc64_iw13ow13kw3pw1_n"tails_conv_1d:3"
+ic25oc24_iw13ow12kw3pw0_n"tails_conv_1d:4"
+ic29oc32_iw13ow12kw3pw0_n"tails_conv_1d:5"
+ic20oc32_iw13kw1pw0_n"tails_conv_1d_1x1:2"
+ic23oc64_iw13kw1pw0_n"tails_conv_1d_1x1:3"
+ic25oc24_iw13kw1pw0_n"tails_conv_1d_1x1:4"
+ic29oc32_iw13kw1pw0_n"tails_conv_1d_1x1:5"
diff --git a/inference-engine/thirdparty/mkl-dnn/tests/benchdnn/inputs/ip/test_ip_all b/inference-engine/thirdparty/mkl-dnn/tests/benchdnn/inputs/ip/test_ip_all
index 271c2bd63..e59a6697a 100644
--- a/inference-engine/thirdparty/mkl-dnn/tests/benchdnn/inputs/ip/test_ip_all
+++ b/inference-engine/thirdparty/mkl-dnn/tests/benchdnn/inputs/ip/test_ip_all
@@ -5,7 +5,7 @@
 --dir=BWD_WB --batch=ip_all
 
 # i8 (skx)
---reset --dir=FWD_B --mb=2 --attr=irmode=down;oscale=per_oc:2.25;
+--reset --allow-unimpl=true --dir=FWD_B --mb=2 --attr=irmode=down;oscale=per_oc:2.25;
 --cfg=u8s8u8s32  --batch=ip_all
 --cfg=u8s8s8s32  --batch=ip_all
 --cfg=u8s8s32s32 --batch=ip_all
diff --git a/inference-engine/thirdparty/mkl-dnn/tests/benchdnn/inputs/rnn/rnn_gru b/inference-engine/thirdparty/mkl-dnn/tests/benchdnn/inputs/rnn/rnn_gru
new file mode 100644
index 000000000..7496c8b1e
--- /dev/null
+++ b/inference-engine/thirdparty/mkl-dnn/tests/benchdnn/inputs/rnn/rnn_gru
@@ -0,0 +1,4 @@
+l2t2mb128sic512n"exp-gru-0"
+l7t1mb128sic512slc1024dic512dlc512n"exp-gru-1"
+l1t10mb32sic128slc512dic128dlc128n"exp-gru-2"
+
diff --git a/inference-engine/thirdparty/mkl-dnn/tests/benchdnn/inputs/rnn/rnn_gru_small b/inference-engine/thirdparty/mkl-dnn/tests/benchdnn/inputs/rnn/rnn_gru_small
new file mode 100644
index 000000000..c315e9e4d
--- /dev/null
+++ b/inference-engine/thirdparty/mkl-dnn/tests/benchdnn/inputs/rnn/rnn_gru_small
@@ -0,0 +1,7 @@
+l1t1sic1
+l1t1sic2
+l1t1mb4sic2
+l1t1mb4sic1slc3dic1dlc1
+l1t2mb4sic2
+l2t1mb4sic2
+l2t2mb4sic2
diff --git a/inference-engine/thirdparty/mkl-dnn/tests/benchdnn/inputs/rnn/rnn_inference b/inference-engine/thirdparty/mkl-dnn/tests/benchdnn/inputs/rnn/rnn_inference
new file mode 100644
index 000000000..be3524761
--- /dev/null
+++ b/inference-engine/thirdparty/mkl-dnn/tests/benchdnn/inputs/rnn/rnn_inference
@@ -0,0 +1,10 @@
+l1t30mb1sic512n"GNMT_enc-inference"
+l7t30mb1sic1024n"GNMT_enc-inference"
+l8t1mb1sic2048slc1024dic1024dlc1024n"GNMT_dec-inference"
+l1t50mb1sic1760n"deepspeech2-inference"
+l1t100mb1sic760n"deepspeech2-inference"
+l1t200mb1sic1760n"deepspeech2-inference"
+l1t50mb1sic500n"pytorch_testcase-inference"
+l1t629mb1sic128n"paddlepaddle_testcase-inference"
+l1t10mb1sic128slc512dic128dlc128n"exp-0"
+l10t1mb1sic512slc128dic128dlc128n"exp-1"
diff --git a/inference-engine/thirdparty/mkl-dnn/tests/benchdnn/inputs/rnn/rnn_small b/inference-engine/thirdparty/mkl-dnn/tests/benchdnn/inputs/rnn/rnn_small
new file mode 100644
index 000000000..f7e2c2d5f
--- /dev/null
+++ b/inference-engine/thirdparty/mkl-dnn/tests/benchdnn/inputs/rnn/rnn_small
@@ -0,0 +1,8 @@
+l1t1sic1
+l1t1sic2
+l1t1mb3sic2
+l1t1mb5sic1slc3dic1dlc1
+l1t1mb5sic3slc1dic1dlc1
+l1t2mb3sic2
+l2t1mb3sic2
+l2t2mb3sic2
diff --git a/inference-engine/thirdparty/mkl-dnn/tests/benchdnn/inputs/rnn/rnn_training b/inference-engine/thirdparty/mkl-dnn/tests/benchdnn/inputs/rnn/rnn_training
new file mode 100644
index 000000000..5d9a0ddea
--- /dev/null
+++ b/inference-engine/thirdparty/mkl-dnn/tests/benchdnn/inputs/rnn/rnn_training
@@ -0,0 +1,11 @@
+l1t1mb128sic512n"GNMT_enc-training"
+l2t2mb128sic1024n"GNMT_enc-training"
+l8t1mb128sic2048slc1024dic1024dlc1024n"GNMT_dec-training"
+l1t50mb32sic1760n"deepspeech2-training"
+l1t100mb32sic1760n"deepspeech2-training"
+l1t200mb32sic1760n"deepspeech2-training"
+l1t50mb64sic500n"pytorch_testcase-training"
+l1t629mb128sic128n"paddlepaddle_testcase-training"
+l1t952mb128sic128n"paddlepaddle_testcase-training"
+l1t10mb32sic128slc512dic128dlc128n"exp-0"
+l10t1mb32sic512slc128dic128dlc128n"exp-1"
diff --git a/inference-engine/thirdparty/mkl-dnn/tests/benchdnn/inputs/rnn/test_rnn_inference b/inference-engine/thirdparty/mkl-dnn/tests/benchdnn/inputs/rnn/test_rnn_inference
new file mode 100644
index 000000000..86ef88f13
--- /dev/null
+++ b/inference-engine/thirdparty/mkl-dnn/tests/benchdnn/inputs/rnn/test_rnn_inference
@@ -0,0 +1,37 @@
+# f32
+
+# RNN
+--reset --alg=VANILLA_RNN
+--direction=left2right
+--activation=LOGISTIC
+--prop=FWD_D --batch=rnn_inference
+
+--reset
+--direction=concat
+--activation=LOGISTIC
+--prop=FWD_D --batch=rnn_inference
+
+# sum
+--reset
+--direction=sum
+--activation=LOGISTIC
+--prop=FWD_D --batch=rnn_inference
+
+# LSTM
+--reset --alg=VANILLA_LSTM
+--direction=left2right
+--activation=LOGISTIC
+--prop=FWD_D --batch=rnn_inference
+
+# GRU
+--reset --alg=VANILLA_GRU
+--direction=left2right
+--activation=LOGISTIC
+--prop=FWD_D --batch=rnn_gru
+
+# LBR_GRU
+--reset --alg=LBR_GRU
+--direction=left2right
+--activation=LOGISTIC
+--prop=FWD_D --batch=rnn_inference
+
diff --git a/inference-engine/thirdparty/mkl-dnn/tests/benchdnn/inputs/rnn/test_rnn_small b/inference-engine/thirdparty/mkl-dnn/tests/benchdnn/inputs/rnn/test_rnn_small
new file mode 100644
index 000000000..6ca0cb3fa
--- /dev/null
+++ b/inference-engine/thirdparty/mkl-dnn/tests/benchdnn/inputs/rnn/test_rnn_small
@@ -0,0 +1,66 @@
+# f32
+
+# RNN
+# direction
+# l2r
+--reset --alg=VANILLA_RNN
+--direction=left2right
+--activation=RELU
+--prop=FWD_D --batch=rnn_small
+--prop=BWD_DW --batch=rnn_small
+
+# r2l
+--reset --alg=VANILLA_RNN
+--direction=right2left
+--activation=RELU
+--prop=FWD_D --batch=rnn_small
+--prop=BWD_DW --batch=rnn_small
+
+# concat
+--reset --alg=VANILLA_RNN
+--direction=concat
+--activation=RELU
+--prop=FWD_D --batch=rnn_small
+--prop=BWD_DW --batch=rnn_small
+
+# sum
+--reset --alg=VANILLA_RNN
+--direction=sum
+--activation=RELU
+--prop=FWD_D --batch=rnn_small
+--prop=BWD_DW --batch=rnn_small
+
+# activation
+--reset --alg=VANILLA_RNN
+--direction=left2right
+--activation=TANH
+--prop=FWD_D --batch=rnn_small
+--prop=BWD_DW --batch=rnn_small
+
+--reset --alg=VANILLA_RNN
+--direction=left2right
+--activation=LOGISTIC
+--prop=FWD_D --batch=rnn_small
+--prop=BWD_DW --batch=rnn_small
+
+# LSTM
+--reset --alg=VANILLA_LSTM
+--direction=left2right
+--activation=TANH
+--prop=FWD_D --batch=rnn_small
+--prop=BWD_DW --batch=rnn_small
+
+# GRU
+--reset --alg=VANILLA_GRU
+--direction=left2right
+--activation=TANH
+--prop=FWD_D --batch=rnn_gru_small
+--prop=BWD_DW --batch=rnn_gru_small
+
+# LBR_GRU
+--reset --alg=LBR_GRU
+--direction=left2right
+--activation=TANH
+--prop=FWD_D --batch=rnn_small
+--prop=BWD_DW --batch=rnn_small
+
diff --git a/inference-engine/thirdparty/mkl-dnn/tests/benchdnn/inputs/rnn/test_rnn_training b/inference-engine/thirdparty/mkl-dnn/tests/benchdnn/inputs/rnn/test_rnn_training
new file mode 100644
index 000000000..0661966dc
--- /dev/null
+++ b/inference-engine/thirdparty/mkl-dnn/tests/benchdnn/inputs/rnn/test_rnn_training
@@ -0,0 +1,42 @@
+# f32
+
+# RNN
+--reset --alg=VANILLA_RNN
+--direction=left2right
+--activation=TANH
+--prop=FWD_D --batch=rnn_training
+--prop=BWD_DW --batch=rnn_training
+
+--reset
+--direction=concat
+--activation=TANH
+--prop=FWD_D --batch=rnn_training
+--prop=BWD_DW --batch=rnn_training
+
+# sum
+--reset
+--direction=sum
+--activation=TANH
+--prop=FWD_D --batch=rnn_training
+--prop=BWD_DW --batch=rnn_training
+
+# LSTM
+--reset --alg=VANILLA_LSTM
+--direction=left2right
+--activation=TANH
+--prop=FWD_D --batch=rnn_training
+--prop=BWD_DW --batch=rnn_training
+
+# GRU
+--reset --alg=VANILLA_GRU
+--direction=left2right
+--activation=TANH
+--prop=FWD_D --batch=rnn_gru
+--prop=BWD_DW --batch=rnn_gru
+
+# LBR_GRU
+--reset --alg=LBR_GRU
+--direction=left2right
+--activation=TANH
+--prop=FWD_D --batch=rnn_training
+--prop=BWD_DW --batch=rnn_training
diff --git a/inference-engine/thirdparty/mkl-dnn/tests/benchdnn/inputs/shuffle/test_shuffle b/inference-engine/thirdparty/mkl-dnn/tests/benchdnn/inputs/shuffle/test_shuffle
new file mode 100644
index 000000000..4e0517704
--- /dev/null
+++ b/inference-engine/thirdparty/mkl-dnn/tests/benchdnn/inputs/shuffle/test_shuffle
@@ -0,0 +1,97 @@
+--dir=FWD_D
+
+# group_size = 4
+# (1, 68, 56, 56)
+--dt=f32 --fmt=nchw --axis=1 --group=4 1x68x56x56
+--dt=f32 --fmt=nhwc --axis=1 --group=4 1x68x56x56
+
+--dt=u8 --fmt=nchw --axis=1 --group=4 1x68x56x56
+--dt=u8 --fmt=nhwc --axis=1 --group=4 1x68x56x56
+
+--dt=s8 --fmt=nchw --axis=1 --group=4 1x68x56x56
+--dt=s8 --fmt=nhwc --axis=1 --group=4 1x68x56x56
+
+--dt=s32 --fmt=nchw --axis=1 --group=4 1x68x56x56
+--dt=s32 --fmt=nhwc --axis=1 --group=4 1x68x56x56
+
+# (1, 136, 56, 56)
+--dt=f32 --fmt=nchw --axis=1 --group=4 1x136x56x56
+--dt=f32 --fmt=nhwc --axis=1 --group=4 1x136x56x56
+--dt=f32 --fmt=nChw8c --axis=1 --group=4 1x136x56x56
+
+--dt=u8 --fmt=nchw --axis=1 --group=4 1x136x56x56
+--dt=u8 --fmt=nhwc --axis=1 --group=4 1x136x56x56
+--dt=u8 --fmt=nChw8c --axis=1 --group=4 1x136x56x56
+
+--dt=s8 --fmt=nchw --axis=1 --group=4 1x136x56x56
+--dt=s8 --fmt=nhwc --axis=1 --group=4 1x136x56x56
+--dt=s8 --fmt=nChw8c --axis=1 --group=4 1x136x56x56
+
+--dt=s32 --fmt=nchw --axis=1 --group=4 1x136x56x56
+--dt=s32 --fmt=nhwc --axis=1 --group=4 1x136x56x56
+--dt=s32 --fmt=nChw8c --axis=1 --group=4 1x136x56x56
+
+# (1, 272, 56, 56)
+--dt=f32 --fmt=nchw --axis=1 --group=4 1x272x56x56
+--dt=f32 --fmt=nhwc --axis=1 --group=4 1x272x56x56
+--dt=f32 --fmt=nChw8c --axis=1 --group=4 1x272x56x56
+--dt=f32 --fmt=nChw16c --axis=1 --group=4 1x272x56x56
+
+--dt=u8 --fmt=nchw --axis=1 --group=4 1x272x56x56
+--dt=u8 --fmt=nhwc --axis=1 --group=4 1x272x56x56
+--dt=u8 --fmt=nChw8c --axis=1 --group=4 1x272x56x56
+--dt=u8 --fmt=nChw16c --axis=1 --group=4 1x272x56x56
+
+--dt=s8 --fmt=nchw --axis=1 --group=4 1x272x56x56
+--dt=s8 --fmt=nhwc --axis=1 --group=4 1x272x56x56
+--dt=s8 --fmt=nChw8c --axis=1 --group=4 1x272x56x56
+--dt=s8 --fmt=nChw16c --axis=1 --group=4 1x272x56x56
+
+--dt=s32 --fmt=nchw --axis=1 --group=4 1x272x56x56
+--dt=s32 --fmt=nhwc --axis=1 --group=4 1x272x56x56
+--dt=s32 --fmt=nChw8c --axis=1 --group=4 1x272x56x56
+--dt=s32 --fmt=nChw16c --axis=1 --group=4 1x272x56x56
+
+# 3D (1, 272, 2, 56, 56)
+--dt=f32 --fmt=ncdhw --axis=1 --group=4 1x272x2x56x56
+--dt=f32 --fmt=ndhwc --axis=1 --group=4 1x272x2x56x56
+--dt=f32 --fmt=nCdhw8c --axis=1 --group=4 1x272x2x56x56
+--dt=f32 --fmt=nCdhw16c --axis=1 --group=4 1x272x2x56x56
+
+--dt=u8 --fmt=ncdhw --axis=1 --group=4 1x272x2x56x56
+--dt=u8 --fmt=ndhwc --axis=1 --group=4 1x272x2x56x56
+--dt=u8 --fmt=nCdhw8c --axis=1 --group=4 1x272x2x56x56
+--dt=u8 --fmt=nCdhw16c --axis=1 --group=4 1x272x2x56x56
+
+--dt=s8 --fmt=ncdhw --axis=1 --group=4 1x272x2x56x56
+--dt=s8 --fmt=ndhwc --axis=1 --group=4 1x272x2x56x56
+--dt=s8 --fmt=nCdhw8c --axis=1 --group=4 1x272x2x56x56
+--dt=s8 --fmt=nCdhw16c --axis=1 --group=4 1x272x2x56x56
+
+--dt=s32 --fmt=ncdhw --axis=1 --group=4 1x272x2x56x56
+--dt=s32 --fmt=ndhwc --axis=1 --group=4 1x272x2x56x56
+--dt=s32 --fmt=nCdhw8c --axis=1 --group=4 1x272x2x56x56
+--dt=s32 --fmt=nCdhw16c --axis=1 --group=4 1x272x2x56x56
+
+--dir=BWD_D
+
+--dt=f32 --fmt=nchw --axis=1 --group=4 1x272x56x56
+--dt=f32 --fmt=nhwc --axis=1 --group=4 1x272x56x56
+--dt=f32 --fmt=nChw8c --axis=1 --group=4 1x272x56x56
+--dt=f32 --fmt=nChw16c --axis=1 --group=4 1x272x56x56
+
+--dt=u8 --fmt=nchw --axis=1 --group=4 1x272x56x56
+--dt=u8 --fmt=nhwc --axis=1 --group=4 1x272x56x56
+--dt=u8 --fmt=nChw8c --axis=1 --group=4 1x272x56x56
+--dt=u8 --fmt=nChw16c --axis=1 --group=4 1x272x56x56
+
+--dt=s8 --fmt=nchw --axis=1 --group=4 1x272x56x56
+--dt=s8 --fmt=nhwc --axis=1 --group=4 1x272x56x56
+--dt=s8 --fmt=nChw8c --axis=1 --group=4 1x272x56x56
+--dt=s8 --fmt=nChw16c --axis=1 --group=4 1x272x56x56
+
+--dt=s32 --fmt=nchw --axis=1 --group=4 1x272x56x56
+--dt=s32 --fmt=nhwc --axis=1 --group=4 1x272x56x56
+--dt=s32 --fmt=nChw8c --axis=1 --group=4 1x272x56x56
+--dt=s32 --fmt=nChw16c --axis=1 --group=4 1x272x56x56
+
diff --git a/inference-engine/thirdparty/mkl-dnn/tests/benchdnn/inputs/shuffle/test_shuffle_axis b/inference-engine/thirdparty/mkl-dnn/tests/benchdnn/inputs/shuffle/test_shuffle_axis
new file mode 100644
index 000000000..20584de3a
--- /dev/null
+++ b/inference-engine/thirdparty/mkl-dnn/tests/benchdnn/inputs/shuffle/test_shuffle_axis
@@ -0,0 +1,103 @@
+--dir=FWD_D
+
+# group_size = 4
+# (1, 68, 56, 56)
+--dt=f32 --fmt=nchw --axis=2 --group=4 1x68x56x56
+--dt=f32 --fmt=nhwc --axis=2 --group=4 1x68x56x56
+
+--dt=u8 --fmt=nchw --axis=2 --group=4 1x68x56x56
+--dt=u8 --fmt=nhwc --axis=2 --group=4 1x68x56x56
+
+--dt=s8 --fmt=nchw --axis=2 --group=4 1x68x56x56
+--dt=s8 --fmt=nhwc --axis=2 --group=4 1x68x56x56
+
+--dt=s32 --fmt=nchw --axis=2 --group=4 1x68x56x56
+--dt=s32 --fmt=nhwc --axis=2 --group=4 1x68x56x56
+
+# (1, 136, 56, 56)
+--dt=f32 --fmt=nchw --axis=2 --group=4 1x136x56x56
+--dt=f32 --fmt=nhwc --axis=2 --group=4 1x136x56x56
+--dt=f32 --fmt=nChw8c --axis=2 --group=4 1x136x56x56
+
+--dt=u8 --fmt=nchw --axis=2 --group=4 1x136x56x56
+--dt=u8 --fmt=nhwc --axis=2 --group=4 1x136x56x56
+--dt=u8 --fmt=nChw8c --axis=2 --group=4 1x136x56x56
+
+--dt=s8 --fmt=nchw --axis=2 --group=4 1x136x56x56
+--dt=s8 --fmt=nhwc --axis=2 --group=4 1x136x56x56
+--dt=s8 --fmt=nChw8c --axis=2 --group=4 1x136x56x56
+
+--dt=s32 --fmt=nchw --axis=2 --group=4 1x136x56x56
+--dt=s32 --fmt=nhwc --axis=2 --group=4 1x136x56x56
+--dt=s32 --fmt=nChw8c --axis=2 --group=4 1x136x56x56
+
+# (1, 272, 56, 56)
+--dt=f32 --fmt=nchw --axis=2 --group=4 1x272x56x56
+--dt=f32 --fmt=nhwc --axis=2 --group=4 1x272x56x56
+--dt=f32 --fmt=nChw8c --axis=2 --group=4 1x272x56x56
+--dt=f32 --fmt=nChw16c --axis=2 --group=4 1x272x56x56
+
+--dt=u8 --fmt=nchw --axis=2 --group=4 1x272x56x56
+--dt=u8 --fmt=nhwc --axis=2 --group=4 1x272x56x56
+--dt=u8 --fmt=nChw8c --axis=2 --group=4 1x272x56x56
+--dt=u8 --fmt=nChw16c --axis=2 --group=4 1x272x56x56
+
+--dt=s8 --fmt=nchw --axis=2 --group=4 1x272x56x56
+--dt=s8 --fmt=nhwc --axis=2 --group=4 1x272x56x56
+--dt=s8 --fmt=nChw8c --axis=2 --group=4 1x272x56x56
+--dt=s8 --fmt=nChw16c --axis=2 --group=4 1x272x56x56
+
+--dt=s32 --fmt=nchw --axis=2 --group=4 1x272x56x56
+--dt=s32 --fmt=nhwc --axis=2 --group=4 1x272x56x56
+--dt=s32 --fmt=nChw8c --axis=2 --group=4 1x272x56x56
+--dt=s32 --fmt=nChw16c --axis=2 --group=4 1x272x56x56
+
+# blocked with tail
+--dt=f32 --fmt=nChw16c --axis=1 --group=4 1x12x56x56
+--dt=f32 --fmt=nChw16c --axis=1 --group=4 1x24x56x56
+--dt=f32 --fmt=nChw16c --axis=1 --group=4 1x36x56x56
+--dt=f32 --fmt=nChw16c --axis=1 --group=4 1x68x56x56
+
+# 3D (1, 272, 2, 56, 56)
+--dt=f32 --fmt=ncdhw --axis=3 --group=4 1x272x2x56x56
+--dt=f32 --fmt=ndhwc --axis=3 --group=4 1x272x2x56x56
+--dt=f32 --fmt=nCdhw8c --axis=3 --group=4 1x272x2x56x56
+--dt=f32 --fmt=nCdhw16c --axis=3 --group=4 1x272x2x56x56
+
+--dt=u8 --fmt=ncdhw --axis=3 --group=4 1x272x2x56x56
+--dt=u8 --fmt=ndhwc --axis=3 --group=4 1x272x2x56x56
+--dt=u8 --fmt=nCdhw8c --axis=4 --group=4 1x272x2x56x56
+--dt=u8 --fmt=nCdhw16c --axis=4 --group=4 1x272x2x56x56
+
+--dt=s8 --fmt=ncdhw --axis=3 --group=4 1x272x2x56x56
+--dt=s8 --fmt=ndhwc --axis=3 --group=4 1x272x2x56x56
+--dt=s8 --fmt=nCdhw8c --axis=4 --group=4 1x272x2x56x56
+--dt=s8 --fmt=nCdhw16c --axis=4 --group=4 1x272x2x56x56
+
+--dt=s32 --fmt=ncdhw --axis=3 --group=4 1x272x2x56x56
+--dt=s32 --fmt=ndhwc --axis=3 --group=4 1x272x2x56x56
+--dt=s32 --fmt=nCdhw8c --axis=4 --group=4 1x272x2x56x56
+--dt=s32 --fmt=nCdhw16c --axis=4 --group=4 1x272x2x56x56
+
+--dir=BWD_D
+
+--dt=f32 --fmt=nchw --axis=2 --group=4 1x272x56x56
+--dt=f32 --fmt=nhwc --axis=2 --group=4 1x272x56x56
+--dt=f32 --fmt=nChw8c --axis=2 --group=4 1x272x56x56
+--dt=f32 --fmt=nChw16c --axis=2 --group=4 1x272x56x56
+
+--dt=u8 --fmt=nchw --axis=2 --group=4 1x272x56x56
+--dt=u8 --fmt=nhwc --axis=2 --group=4 1x272x56x56
+--dt=u8 --fmt=nChw8c --axis=2 --group=4 1x272x56x56
+--dt=u8 --fmt=nChw16c --axis=2 --group=4 1x272x56x56
+
+--dt=s8 --fmt=nchw --axis=2 --group=4 1x272x56x56
+--dt=s8 --fmt=nhwc --axis=2 --group=4 1x272x56x56
+--dt=s8 --fmt=nChw8c --axis=2 --group=4 1x272x56x56
+--dt=s8 --fmt=nChw16c --axis=2 --group=4 1x272x56x56
+
+--dt=s32 --fmt=nchw --axis=2 --group=4 1x272x56x56
+--dt=s32 --fmt=nhwc --axis=2 --group=4 1x272x56x56
+--dt=s32 --fmt=nChw8c --axis=2 --group=4 1x272x56x56
+--dt=s32 --fmt=nChw16c --axis=2 --group=4 1x272x56x56
+
diff --git a/inference-engine/thirdparty/mkl-dnn/tests/benchdnn/inputs/test_conv_all b/inference-engine/thirdparty/mkl-dnn/tests/benchdnn/inputs/test_conv_all
index 5354842c6..6f725f9a6 100644
--- a/inference-engine/thirdparty/mkl-dnn/tests/benchdnn/inputs/test_conv_all
+++ b/inference-engine/thirdparty/mkl-dnn/tests/benchdnn/inputs/test_conv_all
@@ -17,12 +17,17 @@
 # i8 (skx)
 --reset --dir=FWD_B --mb=2
 --skip-impl="ref:gemm"      # ! test jit version only
-
+--allow-unimpl=true
 --cfg=u8s8u8s32  --batch=conv_all
 --cfg=u8s8s8s32  --batch=conv_resnet_50
 --cfg=u8s8s32s32 --batch=conv_googlenet_v3
 --merge=RELU
 --cfg=u8s8s32s32 --batch=conv_vgg_19
+--cfg=s8s8u8s32  --batch=conv_all
+--cfg=s8s8s8s32  --batch=conv_resnet_50
+--cfg=s8s8s32s32 --batch=conv_googlenet_v3
+--merge=RELU
+--cfg=s8s8s32s32 --batch=conv_vgg_19
 
 # s16 (knm)
 --reset --mb=2
@@ -66,4 +71,4 @@
 --batch=test_conv_tails
 
 # 3D conv
---batch=test_conv_3d
\ No newline at end of file
+--batch=test_conv_3d
diff --git a/inference-engine/thirdparty/mkl-dnn/tests/benchdnn/inputs/test_conv_attrs b/inference-engine/thirdparty/mkl-dnn/tests/benchdnn/inputs/test_conv_attrs
index 51ae42bf2..00d4cff66 100644
--- a/inference-engine/thirdparty/mkl-dnn/tests/benchdnn/inputs/test_conv_attrs
+++ b/inference-engine/thirdparty/mkl-dnn/tests/benchdnn/inputs/test_conv_attrs
@@ -7,10 +7,14 @@
 --attr=irmode=down;oscale=per_oc:2.25;post_ops='sum:1.5;relu'
 --cfg=u8s8u8s32  --batch=conv_vgg_19
 --cfg=u8s8f32s32 --batch=conv_googlenet_v2
+--cfg=s8s8u8s32  --batch=conv_vgg_19
+--cfg=s8s8f32s32 --batch=conv_googlenet_v2
 --dir=FWD_D
 --attr=irmode=nearest;oscale=common:2.25;post_ops='sum:1.5'
 --cfg=u8s8s8s32  --batch=conv_googlenet_v3
 --cfg=u8s8s32s32 --batch=conv_alexnet
+--cfg=s8s8s8s32  --batch=conv_googlenet_v3
+--cfg=s8s8s32s32 --batch=conv_alexnet
 
 # f32
 --reset --cfg=f32
@@ -19,6 +23,7 @@
 --allow-unimpl=true
 --dir=FWD_B --attr=post_ops='sum;relu' --batch=conv_resnet_50
 --dir=FWD_B --attr=post_ops='sum;relu' --batch=conv_3d
+--dir=FWD_B --attr=post_ops='sum;relu' --batch=conv_1d
 
 # f32_wino
 --reset --alg=wino --cfg=f32_wino
diff --git a/inference-engine/thirdparty/mkl-dnn/tests/benchdnn/inputs/test_conv_dilated b/inference-engine/thirdparty/mkl-dnn/tests/benchdnn/inputs/test_conv_dilated
index af5c0f8c4..b5c8a325a 100644
--- a/inference-engine/thirdparty/mkl-dnn/tests/benchdnn/inputs/test_conv_dilated
+++ b/inference-engine/thirdparty/mkl-dnn/tests/benchdnn/inputs/test_conv_dilated
@@ -12,3 +12,5 @@
 # int8 (full)
 --reset --cfg=u8s8u8s32
 --dir=FWD_D --batch=conv_dilated_rfcn --match=.*fc6.* --batch=conv_ssd_300_voc0712
+--reset --allow-unimpl=true --cfg=s8s8u8s32
+--dir=FWD_D --batch=conv_dilated_rfcn --match=.*fc6.* --batch=conv_ssd_300_voc0712
diff --git a/inference-engine/thirdparty/mkl-dnn/tests/benchdnn/inputs/test_conv_regression_general b/inference-engine/thirdparty/mkl-dnn/tests/benchdnn/inputs/test_conv_regression_general
index fda923ba5..e2cebb980 100644
--- a/inference-engine/thirdparty/mkl-dnn/tests/benchdnn/inputs/test_conv_regression_general
+++ b/inference-engine/thirdparty/mkl-dnn/tests/benchdnn/inputs/test_conv_regression_general
@@ -29,6 +29,7 @@
 
 # MKLDNN-623
 --reset --cfg=u8s8u8s32 --dir=FWD_D --skip-impl="ref:gemm" mb2ic672ih29iw29oc192kh1kw1sh1sw1ph0pw0n"DENSENET_161:conv3_11/x1"
+--reset --allow-unimpl=true --cfg=s8s8u8s32 --dir=FWD_D --skip-impl="ref:gemm" mb2ic672ih29iw29oc192kh1kw1sh1sw1ph0pw0n"DENSENET_161:conv3_11/x1"
 --reset --cfg=s16s16s32s32 --skip-impl="ref:gemm" mb2ic672ih29iw29oc192kh1kw1sh1sw1ph0pw0n"DENSENET_161:conv3_11/x1"
 --reset --cfg=s32s16s16s32 --dir=BWD_D --skip-impl="ref:gemm" mb2ic672ih29iw29oc192kh1kw1sh1sw1ph0pw0n"DENSENET_161:conv3_11/x1"
 --reset --cfg=s16s32s16s32 --dir=BWD_WB --skip-impl="ref:gemm" mb2ic672ih29iw29oc192kh1kw1sh1sw1ph0pw0n"DENSENET_161:conv3_11/x1"
@@ -42,6 +43,7 @@
 # MKLDNN-796: large asymmetric padding
 --reset --cfg=f32_full mb2_g1ic32oc32_ih7oh11kh3ph2
 --reset --cfg=u8s8u8s32 mb2_g1ic32oc32_ih7oh11kh3ph2
+--reset --allow-unimpl=true --cfg=s8s8u8s32 mb2_g1ic32oc32_ih7oh11kh3ph2
 
 # MKLDNN-860
 --reset --dir=BWD_WB --cfg=f32_wino --allow-unimpl=true --alg=wino  mb2ic16ih13oc16oh13kh3ph1
@@ -52,9 +54,18 @@
 # MKLDNN-930
 --reset mb2ic3ih300oc32oh150kh3sh2
 --reset --cfg=u8s8u8s32 mb2ic3ih84oc16oh42kh3sh2
+--reset --allow-unimpl=true --cfg=s8s8u8s32 mb2ic3ih84oc16oh42kh3sh2
 
 # MKLDNN-949
 --reset --dir=BWD_D mb2_g1ic1oc2_ih3oh1kh2sh1dh1ph0_iw5ow3kw2sw1dw1pw0
 
 # special case for 4vnni and 4fma kernels had this FPE bug
 --reset --cfg=f32_full mb1_g1ic16oc16_ih7oh7kh3ph1
+
+# MKLDNN-982: FPE for large right-hand-side padding
+--reset --dir=FWD_D mb2_g1ic1oc2_ih3oh10kh2sh1dh1ph4_iw5ow12kw2sw1dw1pw2
+--reset --dir=FWD_D mb2_g1ic8oc8_ih1oh16kh2ph1
+
+# MKLDNN-1074: FPE for mb1 with ih < sh or iw < sw
+--reset --dir=FWD_D mb1_g1ic128oc256_ih1oh1kh3sh2dh0ph1_iw1ow1kw3sw2dw0pw1
+
diff --git a/inference-engine/thirdparty/mkl-dnn/tests/benchdnn/inputs/test_conv_tails b/inference-engine/thirdparty/mkl-dnn/tests/benchdnn/inputs/test_conv_tails
index 142fa89a4..c81dd4ea2 100644
--- a/inference-engine/thirdparty/mkl-dnn/tests/benchdnn/inputs/test_conv_tails
+++ b/inference-engine/thirdparty/mkl-dnn/tests/benchdnn/inputs/test_conv_tails
@@ -21,7 +21,11 @@
 --attr=irmode=down;oscale=per_oc:2.25;post_ops='sum:1.5;relu'
 --cfg=u8s8u8s32  --batch=conv_tails
 --cfg=u8s8f32s32 --batch=conv_tails
+--cfg=s8s8u8s32  --batch=conv_tails
+--cfg=s8s8f32s32 --batch=conv_tails
 --dir=FWD_D
 --attr=irmode=nearest;oscale=common:2.25;post_ops='sum:1.5'
 --cfg=u8s8s8s32  --batch=conv_tails
---cfg=u8s8s32s32 --batch=conv_tails
\ No newline at end of file
+--cfg=u8s8s32s32 --batch=conv_tails
+--cfg=s8s8s8s32  --batch=conv_tails
+--cfg=s8s8s32s32 --batch=conv_tails
diff --git a/inference-engine/thirdparty/mkl-dnn/tests/benchdnn/inputs/test_deconv_all b/inference-engine/thirdparty/mkl-dnn/tests/benchdnn/inputs/test_deconv_all
index e5dc8cc2e..2b71b5002 100644
--- a/inference-engine/thirdparty/mkl-dnn/tests/benchdnn/inputs/test_deconv_all
+++ b/inference-engine/thirdparty/mkl-dnn/tests/benchdnn/inputs/test_deconv_all
@@ -8,13 +8,19 @@
 
 #int8
 --skip-impl=ref
---reset --dir=FWD_B --mb=2
+--reset --allow-unimpl=true --dir=FWD_B --mb=2
 --attr=irmode=down;oscale=per_oc:2.25;
 --cfg=u8s8u8s32 --batch=deconv_2d
 --cfg=u8s8s8s32 --batch=deconv_2d
 --cfg=u8s8s32s32 --batch=deconv_2d
+--cfg=s8s8u8s32 --batch=deconv_2d
+--cfg=s8s8s8s32 --batch=deconv_2d
+--cfg=s8s8s32s32 --batch=deconv_2d
 --attr=irmode=nearest;oscale=common:2.25;
 --attr=irmode=down;oscale=per_oc:2.25;
 --cfg=u8s8u8s32 --batch=deconv_2d
 --cfg=u8s8s8s32 --batch=deconv_2d
 --cfg=u8s8s32s32 --batch=deconv_2d
+--cfg=s8s8u8s32 --batch=deconv_2d
+--cfg=s8s8s8s32 --batch=deconv_2d
+--cfg=s8s8s32s32 --batch=deconv_2d