Age | Commit message (Expand) | Author | Files | Lines |
---|---|---|---|---|
2017-11-14 | Change VEX-encoding selection to avoid AVX-SSE transition penalties | Fei Peng | 1 | -6/+1 |
2017-10-25 | Decoupling SIMD levels from instruction sets | Fei Peng | 1 | -0/+37 |
2017-05-10 | add jit intrinsic support for vector conversion/narrow/widen on AMD64 and x86... | helloguo | 1 | -0/+4 |
2016-12-07 | Use only lower floats for Vector3 dot and equality | Carol Eidt | 1 | -5/+10 |
2016-10-27 | Initial RyuJIT x86 SIMD support | Bruce Forstall | 1 | -2/+2 |
2016-08-11 | Reformat jit sources with clang-tidy and format | Michelle McDaniel | 1 | -18/+17 |
2016-01-27 | Update license headers | dotnet-bot | 1 | -4/+3 |
2016-01-15 | Enable FEATURE_SIMD on Linux. | Carol Eidt | 1 | -1/+1 |
2015-07-13 | Don't reorder operands for Vector constructor | Carol Eidt | 1 | -1/+1 |
2015-01-30 | Initial commit to populate CoreCLR repo | dotnet-bot | 1 | -0/+45 |