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path: root/src/jit/simd.cpp
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2018-12-21Ensure that the S.N.Vector methods are marked as [Intrinsic] and that the att...Tanner Gooding1-1/+16
2018-11-26Fixing a few small issues with the SIMD vs SIMD HWIntrinsics (#21097)Tanner Gooding1-6/+13
2018-11-22Typos (#21171)John Doe1-7/+7
2018-07-03Merge pull request #18504 from mikedn/comp-smallBruce Forstall1-123/+143
2018-07-02Updating SSE_StaticCast and AVX_StaticCast to set the correct type on the ret...Tanner Gooding1-3/+11
2018-06-30Move SIMD/Intrinsic handles out of CompilerMike Danes1-123/+143
2018-06-25Cross-bitness in instance fields placement and CORINFO structs (#18366)Egor Chesakov1-5/+5
2018-05-22Remove JIT LEGACY_BACKEND code (#18064)Bruce Forstall1-4/+0
2018-03-26Merge pull request #15301 from mikedn/cast-unCarol Eidt1-1/+1
2018-02-27Fix StaticCast with NotSupportedExceptionFei Peng1-1/+5
2018-02-12Fix inconsistent handling of zero extending castsMike Danes1-1/+1
2018-01-31Delete GenTreePtr. (#16027)Sergey Andreenko1-94/+94
2018-01-26[Arm64] Initial HWIntrinsic implementationSteve MacLean1-33/+0
2018-01-25Merge pull request #16005 from CarolEidt/Fix15848Carol Eidt1-3/+1
2018-01-24Disable the ConvertToUInt intrinsics by removing them from simdintrinsiclist.hCarol Eidt1-8/+0
2018-01-24Disable FP to Unsigned Vector ConversionsCarol Eidt1-3/+9
2018-01-19Fix desktop buildBruce Forstall1-1/+1
2018-01-04[Arm64] Add Vector64 HW Intrinsic supportSteve MacLean1-0/+119
2018-01-03[Arm64] getBaseTypeAndSizeOfSIMDTypeSteve MacLean1-25/+37
2017-12-13get rid of TYP_CHARFei Peng1-12/+12
2017-12-12Enable Vector128/256<T> and Add intrinsicsFei Peng1-197/+454
2017-12-12Use macro _countof instead of explicit sizeof(arr) / sizeof(arr[0]) or sizeof...Egor Chesakov1-1/+1
2017-12-06new intrinsic type support (#15340)Fei Peng1-0/+8
2017-11-14Change VEX-encoding selection to avoid AVX-SSE transition penaltiesFei Peng1-23/+0
2017-11-02Merge pull request #14791 from sdmaclea/PR-ARM64-impSIMDSelectCarol Eidt1-1/+7
2017-11-01[Arm64] Fix impSIMDSelectSteve MacLean1-1/+7
2017-11-01SIMD Handle negative indicies in get_ItemSteve MacLean1-1/+1
2017-10-30Rename and simplify SSE3_4 to SSE4Fei Peng1-2/+2
2017-10-25Decoupling SIMD levels from instruction setsFei Peng1-9/+8
2017-10-23[Arm64] SIMD simple defines (#14628)Steve MacLean1-0/+2
2017-10-21Merge pull request #14632 from sdmaclea/PR-ARM64-SIMD-SIMD.CPPBruce Forstall1-18/+70
2017-10-20Allow GT_CALL as BYREF operand for SIMD intrinsicsBruce Forstall1-2/+2
2017-10-20[Arm64] SIMD simd.cppSteve MacLean1-18/+70
2017-09-13Allow a RET_EXPR as a BYREF operand for SIMD intrinsics.Carol Eidt1-1/+2
2017-08-31Enable checking of GTF_EXCEPT and GTF_ASG flags. (#13668)Eugene Rozenfeld1-8/+6
2017-05-10add jit intrinsic support for vector conversion/narrow/widen on AMD64 and x86...helloguo1-0/+59
2017-02-13Directly support Min/Max intrinsic for Vector<T> on SSE3_4 and above targetsFei Peng1-5/+10
2017-02-05Enable SIMD for RyuJIT/x86Bruce Forstall1-10/+0
2017-01-19Merge pull request #8402 from CarolEidt/Fix7508Carol Eidt1-0/+1
2017-01-19Enable promotion of SIMD fields of structsCarol Eidt1-0/+1
2017-01-07Change fields order in GenTreeBoundsChk.Sergey Andreenko1-4/+4
2017-01-04Accelerate Abs intrinsic even in cases where there is no direct instruction s...sivarv1-105/+155
2016-12-21Use Pabsd/pabsw/pabsb instructions for Abs SIMD intrinsic on SSE4 and above t...sivarv1-5/+27
2016-12-07Use only lower floats for Vector3 dot and equalityCarol Eidt1-5/+17
2016-12-02RyuJIT/x86: Implement TYP_SIMD12 supportBruce Forstall1-11/+13
2016-11-28Enable using SSE3_4 instruction set for SIMD codegen.sivarv1-2/+3
2016-11-03Jit: fix regression in non-AVX SIMD codegen (#7989)Andy Ayers1-2/+2
2016-10-31Add GTF_ICON_SIMD_COUNT flagJoseph Tremoulet1-0/+2
2016-10-27Initial RyuJIT x86 SIMD supportBruce Forstall1-29/+49
2016-10-21Optimize Vector<int>.Dot on AVX.sivarv1-6/+5
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