index
:
platform/upstream/coreclr
accepted/tizen_4.0_base
accepted/tizen_4.0_unified
accepted/tizen_5.0_base
accepted/tizen_5.5_unified
accepted/tizen_5.5_unified_mobile_hotfix
accepted/tizen_5.5_unified_wearable_hotfix
accepted/tizen_6.0_unified
accepted/tizen_6.0_unified_hotfix
accepted/tizen_6.5_unified
accepted/tizen_base
accepted/tizen_common
accepted/tizen_ivi
accepted/tizen_mobile
accepted/tizen_tv
accepted/tizen_unified
asoldatov
backup/release/2.0.0_tizen/20170828
backup/release/2.0.0_tizen/20170906
backup/tizen_5.5/20190304
backup/tizen_base_2.0.0
backup/tizen_base_2.1.1-upd2
master
origin/backup/release/2.0.0_tizen_4.0/20170908
sandbox/adrob/asan
sandbox/adrob/asan.old
sandbox/akazmin/asan_annotate_buff
sandbox/ches01/asan
sandbox/ches01/asan_ARM
sandbox/ches01/asan_ARM_v2
sandbox/ches01/asan_amd64
sandbox/ches01/asan_amd64_intel_syntax
sandbox/ches01/asan_amd64_v2
sandbox/ches01/integrate-libasansi
sandbox/ches01/integrate-libasansi_debug
sandbox/ches01/integrate-libasansi_debug_v2
sandbox/denis13/gcc6x
sandbox/dkson95/clang
sandbox/dkson95/gcc_6_2_1
sandbox/dkson95/hardfp
sandbox/dkson95/hardfp_rebase
sandbox/dkson95/integrate-libasansi
sandbox/dkson95/tizen
sandbox/giuliana/fix_llvm_path
sandbox/giuliana/gcc_6_2_1
sandbox/giuliana/x86_baselibs
sandbox/jaehun77/hardfp
sandbox/mkashkarov/debug_build
sandbox/mkashkarov/test
sandbox/mkashkarov/tizen_6.0_build
sandbox/nmerinov/llvm
sandbox/vbarinov/clean-clang
sandbox/wangbiao/rpm_upgrade
tc
tizen
tizen_4.0
tizen_4.0_base
tizen_4.0_tv
tizen_5.0_base
tizen_5.5
tizen_5.5_mobile_hotfix
tizen_5.5_tv
tizen_5.5_wearable_hotfix
tizen_6.0
tizen_6.0_hotfix
tizen_6.5
tizen_base
Domain: Dotnet / Core; Licenses: MIT;
Alexander Soldatov <soldatov.a@samsung.com>, Dmitri Botcharnikov <dmitry.b@samsung.com>, Igor Kulaychuk <i.kulaychuk@samsung.com>
summary
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log
tree
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author
committer
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path:
root
/
src
/
jit
/
codegeninterface.h
Age
Commit message (
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Author
Files
Lines
2019-05-15
Make sure variable live range for prolog is reported first
Andrew Au
1
-2
/
+6
2019-05-06
Leaving Scope Info as variable location tracking default system again
Brian Bohe
1
-2
/
+2
2019-03-29
Moving VariableLiveRanges classes outside Compiler class
Brian Bohe
1
-2
/
+196
2019-03-29
A new way of tracking variables (#23373)
Brian Bohe
1
-4
/
+19
2019-03-21
Moving gen stack level to code gen interface (#23328)
Brian Bohe
1
-0
/
+7
2019-03-20
Adding a flag to able/disable scope info (#23298)
Brian Bohe
1
-0
/
+8
2019-03-19
Adding const to functions that don't change or shouldn't change state (#23329)
Brian Bohe
1
-8
/
+8
2019-03-15
Add siVarLoc::Equals (#23275)
Brian Bohe
1
-0
/
+3
2019-02-12
Refactoring siVarLoc creation (#22543)
Brian Bohe
1
-0
/
+144
2019-02-06
Fix ARM64 GS with localloc
Bruce Forstall
1
-0
/
+5
2018-10-18
[RyuJIT] Delete dead code (#20411)
mikedn
1
-3
/
+0
2018-08-27
Merging the instrsxarch fp, rf, and wf parameters into a single flags parameter
Tanner Gooding
1
-0
/
+6
2018-08-20
Stop using size_t for passing immediate values in CodeGen CodeGenInterface (#...
Egor Chesakov
1
-5
/
+5
2018-06-02
Cleanup and remove unused parameters from genCreateAddrMode (#18258)
Robin Sue
1
-5
/
+2
2018-06-02
JIT: Eliminate RegTracker (#18179) (#18230)
Andrew Au
1
-4
/
+0
2018-05-22
Remove JIT LEGACY_BACKEND code (#18064)
Bruce Forstall
1
-81
/
+4
2018-05-15
Do not allocate memory in compUpdateTreeLife. (#17055)
Sergey Andreenko
1
-0
/
+3
2018-02-14
[RyuJit] Stack level setter (#15597)
Sergey Andreenko
1
-0
/
+11
2018-02-14
Fix ARM/ARM64 hijacking in tail calls (#16039)
Jan Vorlicek
1
-0
/
+15
2018-01-31
Delete GenTreePtr. (#16027)
Sergey Andreenko
1
-20
/
+20
2018-01-10
Fix ARM GCStress hole with byref write barrier helper
Bruce Forstall
1
-0
/
+5
2017-10-24
Ifdef out legacy RegTracker code
Mike Danes
1
-0
/
+2
2017-04-14
Introduce API for codegen getting temp registers from gtRsvdRegs
Bruce Forstall
1
-2
/
+0
2017-03-13
Convert GenTree* to GenTreeCall* as much as possible (#10132)
Bruce Forstall
1
-1
/
+1
2016-10-14
Remove DEBUGGING_SUPPORT #ifdef (#7611)
Bruce Forstall
1
-2
/
+0
2016-09-21
Fix conflicts between nix and Windows formatting
Michelle McDaniel
1
-0
/
+2
2016-09-21
Reformat jit code on OSX
Michelle McDaniel
1
-1
/
+1
2016-08-19
Implement the proposed design for RyuJIT's LIR. (#6689)
Pat Gavlin
1
-0
/
+2
2016-08-11
Reformat jit sources with clang-tidy and format
Michelle McDaniel
1
-166
/
+212
2016-07-20
Support for reg optional tree temps.
sivarv
1
-0
/
+3
2016-06-09
Code review cleanup items and moved some items into LEGACY_BACKEND ifdefs
Brian Sullivan
1
-4
/
+5
2016-06-07
ARM64: ABI - Support for using register x8 as the return buffer argument for ...
Brian Sullivan
1
-1
/
+1
2016-04-20
ARM64 Work Item 3817, 3524 - Struct16 decomposition
Brian Sullivan
1
-1
/
+1
2016-04-11
Merge pull request #4239 from BruceForstall/Cleanup2
Bruce Forstall
1
-4
/
+0
2016-04-08
Minor JIT changes
Bruce Forstall
1
-4
/
+4
2016-04-08
Cleanup: replace getFramePointerReg() with preexisting genFramePointerReg()
Bruce Forstall
1
-4
/
+0
2016-01-27
Update license headers
dotnet-bot
1
-4
/
+3
2015-12-11
Port of all JIT changes for .NET Framework 4.6.1 changes
Brian Sullivan
1
-2
/
+11
2015-03-26
Fix warnings in the jitter code
Jan Vorlicek
1
-1
/
+2
2015-01-30
Initial commit to populate CoreCLR repo
dotnet-bot
1
-0
/
+383