diff options
Diffstat (limited to 'src/jit/emitarm64.cpp')
| -rw-r--r-- | src/jit/emitarm64.cpp | 47 |
1 files changed, 16 insertions, 31 deletions
diff --git a/src/jit/emitarm64.cpp b/src/jit/emitarm64.cpp index d066edfd27..afd5cf44e2 100644 --- a/src/jit/emitarm64.cpp +++ b/src/jit/emitarm64.cpp @@ -2327,9 +2327,9 @@ emitter::code_t emitter::emitInsCode(instruction ins, insFormat fmt) unsigned R = bmImm.immR; unsigned S = bmImm.immS; - unsigned elemWidth = 64; // used when immN == 1 + unsigned elemWidth = 64; // used when N == 1 - if (bmImm.immN == 0) // find the smaller elemWidth when immN == 0 + if (N == 0) // find the smaller elemWidth when N == 0 { // Scan S for the highest bit not set elemWidth = 32; @@ -3393,9 +3393,8 @@ void emitter::emitIns_I(instruction ins, emitAttr attr, ssize_t imm) void emitter::emitIns_R(instruction ins, emitAttr attr, regNumber reg) { - emitAttr size = EA_SIZE(attr); - insFormat fmt = IF_NONE; - instrDesc* id = nullptr; + insFormat fmt = IF_NONE; + instrDesc* id = nullptr; /* Figure out the encoding format of the instruction */ switch (ins) @@ -3537,7 +3536,6 @@ void emitter::emitIns_R_I(instruction ins, emitAttr attr, regNumber reg, ssize_t ssize_t imm8 = 0; unsigned pos = 0; canEncode = true; - bool failed = false; while (uimm != 0) { INT64 loByte = uimm & 0xFF; @@ -6089,8 +6087,7 @@ void emitter::emitIns_R_R_R_R( void emitter::emitIns_R_COND(instruction ins, emitAttr attr, regNumber reg, insCond cond) { - emitAttr size = EA_SIZE(attr); - insFormat fmt = IF_NONE; + insFormat fmt = IF_NONE; condFlagsImm cfi; cfi.immCFVal = 0; @@ -6132,8 +6129,7 @@ void emitter::emitIns_R_COND(instruction ins, emitAttr attr, regNumber reg, insC void emitter::emitIns_R_R_COND(instruction ins, emitAttr attr, regNumber reg1, regNumber reg2, insCond cond) { - emitAttr size = EA_SIZE(attr); - insFormat fmt = IF_NONE; + insFormat fmt = IF_NONE; condFlagsImm cfi; cfi.immCFVal = 0; @@ -6178,8 +6174,7 @@ void emitter::emitIns_R_R_COND(instruction ins, emitAttr attr, regNumber reg1, r void emitter::emitIns_R_R_R_COND( instruction ins, emitAttr attr, regNumber reg1, regNumber reg2, regNumber reg3, insCond cond) { - emitAttr size = EA_SIZE(attr); - insFormat fmt = IF_NONE; + insFormat fmt = IF_NONE; condFlagsImm cfi; cfi.immCFVal = 0; @@ -6229,8 +6224,7 @@ void emitter::emitIns_R_R_R_COND( void emitter::emitIns_R_R_FLAGS_COND( instruction ins, emitAttr attr, regNumber reg1, regNumber reg2, insCflags flags, insCond cond) { - emitAttr size = EA_SIZE(attr); - insFormat fmt = IF_NONE; + insFormat fmt = IF_NONE; condFlagsImm cfi; cfi.immCFVal = 0; @@ -6274,8 +6268,7 @@ void emitter::emitIns_R_R_FLAGS_COND( void emitter::emitIns_R_I_FLAGS_COND( instruction ins, emitAttr attr, regNumber reg, int imm, insCflags flags, insCond cond) { - emitAttr size = EA_SIZE(attr); - insFormat fmt = IF_NONE; + insFormat fmt = IF_NONE; condFlagsImm cfi; cfi.immCFVal = 0; @@ -6876,7 +6869,6 @@ void emitter::emitIns_R_C( emitAttr size = EA_SIZE(attr); insFormat fmt = IF_NONE; - int disp = 0; instrDescJmp* id = emitNewInstrJmp(); switch (ins) @@ -9071,14 +9063,13 @@ unsigned emitter::emitOutputCall(insGroup* ig, BYTE* dst, instrDesc* id, code_t size_t emitter::emitOutputInstr(insGroup* ig, instrDesc* id, BYTE** dp) { - BYTE* dst = *dp; - BYTE* odst = dst; - code_t code = 0; - size_t sz = emitGetInstrDescSize(id); // TODO-ARM64-Cleanup: on ARM, this is set in each case. why? - instruction ins = id->idIns(); - insFormat fmt = id->idInsFmt(); - emitAttr size = id->idOpSize(); - unsigned char callInstrSize = 0; + BYTE* dst = *dp; + BYTE* odst = dst; + code_t code = 0; + size_t sz = emitGetInstrDescSize(id); // TODO-ARM64-Cleanup: on ARM, this is set in each case. why? + instruction ins = id->idIns(); + insFormat fmt = id->idInsFmt(); + emitAttr size = id->idOpSize(); #ifdef DEBUG #if DUMP_GC_TABLES @@ -9090,8 +9081,6 @@ size_t emitter::emitOutputInstr(insGroup* ig, instrDesc* id, BYTE** dp) assert(REG_NA == (int)REG_NA); - VARSET_TP GCvars(VarSetOps::UninitVal()); - /* What instruction format have we got? */ switch (fmt) @@ -11705,8 +11694,6 @@ void emitter::emitInsLoadStoreOp(instruction ins, emitAttr attr, regNumber dataR regNumber emitter::emitInsBinary(instruction ins, emitAttr attr, GenTree* dst, GenTree* src) { - regNumber result = REG_NA; - // dst can only be a reg assert(!dst->isContained()); @@ -11737,8 +11724,6 @@ regNumber emitter::emitInsBinary(instruction ins, emitAttr attr, GenTree* dst, G regNumber emitter::emitInsTernary(instruction ins, emitAttr attr, GenTree* dst, GenTree* src1, GenTree* src2) { - regNumber result = REG_NA; - // dst can only be a reg assert(!dst->isContained()); |