diff options
| -rw-r--r-- | src/ToolBox/superpmi/superpmi-shared/compileresult.cpp | 6 | ||||
| -rw-r--r-- | src/jit/emit.cpp | 2 | ||||
| -rw-r--r-- | src/jit/emitxarch.cpp | 8 |
3 files changed, 8 insertions, 8 deletions
diff --git a/src/ToolBox/superpmi/superpmi-shared/compileresult.cpp b/src/ToolBox/superpmi/superpmi-shared/compileresult.cpp index 1c714c01ab..70f54d2c4c 100644 --- a/src/ToolBox/superpmi/superpmi-shared/compileresult.cpp +++ b/src/ToolBox/superpmi/superpmi-shared/compileresult.cpp @@ -672,6 +672,8 @@ void CompileResult::repRecordRelocation(void* location, void* target, WORD fRelo value.slotNum = (DWORD)slotNum; value.addlDelta = (DWORD)addlDelta; + Assert(value.slotNum == 0); + RecordRelocation->Append(value); } @@ -731,10 +733,6 @@ void CompileResult::applyRelocs(unsigned char* block1, ULONG blocksize1, void* o (DWORD)tmp.target); *(DWORD*)address = (DWORD)tmp.target; } - if (tmp.addlDelta != 0) - __debugbreak(); - if (tmp.slotNum != 0) - __debugbreak(); } break; #endif // _TARGET_X86_ diff --git a/src/jit/emit.cpp b/src/jit/emit.cpp index f320596436..cd733d76b9 100644 --- a/src/jit/emit.cpp +++ b/src/jit/emit.cpp @@ -7169,6 +7169,8 @@ void emitter::emitRecordRelocation(void* location, /* IN */ WORD slotNum /* = 0 */, /* IN */ INT32 addlDelta /* = 0 */) /* IN */ { + assert(slotNum == 0); // It is unused on all supported platforms. + // If we're an unmatched altjit, don't tell the VM anything. We still record the relocation for // late disassembly; maybe we'll need it? if (emitComp->info.compMatchedVM) diff --git a/src/jit/emitxarch.cpp b/src/jit/emitxarch.cpp index 9a6d63f05b..5add8636c8 100644 --- a/src/jit/emitxarch.cpp +++ b/src/jit/emitxarch.cpp @@ -9526,9 +9526,9 @@ GOT_DSP: #ifdef _TARGET_AMD64_ // all these opcodes only take a sign-extended 4-byte immediate noway_assert(opsz < 8 || ((int)cval == cval && !addc->cnsReloc)); -#else +#else //_TARGET_X86_ noway_assert(opsz <= 4); -#endif +#endif //_TARGET_X86_ switch (opsz) { @@ -10762,9 +10762,9 @@ BYTE* emitter::emitOutputCV(BYTE* dst, instrDesc* id, code_t code, CnsVal* addc) #ifdef _TARGET_AMD64_ // all these opcodes only take a sign-extended 4-byte immediate noway_assert(opsz < 8 || ((int)cval == cval && !addc->cnsReloc)); -#else +#else //_TARGET_X86_ noway_assert(opsz <= 4); -#endif +#endif //_TARGET_X86_ switch (opsz) { |