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| author | Carol Eidt <carol.eidt@microsoft.com> | 2018-10-03 14:18:47 -0700 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2018-10-03 14:18:47 -0700 |
| commit | bac49ea2198a958f018c8a6b0fb4c1c07561042b (patch) | |
| tree | b41966ff17f5a462a211af6f6a5c6a07dcad9630 /tests/arm | |
| parent | d4b291c10ace6baf35d2c7b45f50f98d6cea4060 (diff) | |
| parent | 945b636566de8756742de1b3488f8c3db7333ca1 (diff) | |
| download | coreclr-bac49ea2198a958f018c8a6b0fb4c1c07561042b.tar.gz coreclr-bac49ea2198a958f018c8a6b0fb4c1c07561042b.tar.bz2 coreclr-bac49ea2198a958f018c8a6b0fb4c1c07561042b.zip | |
Merge pull request #20173 from fiigii/retest
Optimize some SSE2 intrinsic importation and re-enable tests
Diffstat (limited to 'tests/arm')
| -rw-r--r-- | tests/arm/Tests.lst | 16 |
1 files changed, 16 insertions, 0 deletions
diff --git a/tests/arm/Tests.lst b/tests/arm/Tests.lst index edc66c9224..47526c3c06 100644 --- a/tests/arm/Tests.lst +++ b/tests/arm/Tests.lst @@ -88148,6 +88148,14 @@ MaxAllowedDurationSeconds=600 Categories=EXPECTED_PASS;NEW;EXCLUDED HostStyle=0 +[Popcnt_r.cmd_11492] +RelativePath=JIT\HardwareIntrinsics\X86\Popcnt\Popcnt_r\Popcnt_r.cmd +WorkingDir=JIT\HardwareIntrinsics\X86\Popcnt\Popcnt_r +Expected=0 +MaxAllowedDurationSeconds=600 +Categories=EXPECTED_PASS;NEW;EXCLUDED +HostStyle=0 + [StoreLow_r.cmd_11493] RelativePath=JIT\HardwareIntrinsics\X86\Sse2\StoreLow_r\StoreLow_r.cmd WorkingDir=JIT\HardwareIntrinsics\X86\Sse2\StoreLow_r @@ -90388,6 +90396,14 @@ MaxAllowedDurationSeconds=600 Categories=EXPECTED_PASS;NEW;EXCLUDED HostStyle=0 +[Popcnt_ro.cmd_11829] +RelativePath=JIT\HardwareIntrinsics\X86\Popcnt\Popcnt_ro\Popcnt_ro.cmd +WorkingDir=JIT\HardwareIntrinsics\X86\Popcnt\Popcnt_ro +Expected=0 +MaxAllowedDurationSeconds=600 +Categories=EXPECTED_PASS;NEW;EXCLUDED +HostStyle=0 + [MoveHighAndDuplicate_ro.cmd_11830] RelativePath=JIT\HardwareIntrinsics\X86\Sse3\MoveHighAndDuplicate_ro\MoveHighAndDuplicate_ro.cmd WorkingDir=JIT\HardwareIntrinsics\X86\Sse3\MoveHighAndDuplicate_ro |