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| author | Mikhail Skvortcov <m.skvortcov@partner.samsung.com> | 2017-05-30 18:47:54 +0300 |
|---|---|---|
| committer | Mikhail Skvortcov <m.skvortcov@partner.samsung.com> | 2017-05-30 21:18:44 +0300 |
| commit | c25f8454b016bd54f581459832cb855be63d2672 (patch) | |
| tree | 1ed8c1ffca9bf891824eee8c2730e6fa22d7f7d7 /src | |
| parent | 85603db02dee063acd8d6f9f5e853cd407cff134 (diff) | |
| download | coreclr-c25f8454b016bd54f581459832cb855be63d2672.tar.gz coreclr-c25f8454b016bd54f581459832cb855be63d2672.tar.bz2 coreclr-c25f8454b016bd54f581459832cb855be63d2672.zip | |
RyuJIT/arm32: Fix double argument passing
Diffstat (limited to 'src')
| -rw-r--r-- | src/jit/codegenarmarch.cpp | 8 | ||||
| -rw-r--r-- | src/jit/lsraarmarch.cpp | 8 |
2 files changed, 16 insertions, 0 deletions
diff --git a/src/jit/codegenarmarch.cpp b/src/jit/codegenarmarch.cpp index 80d0a86e9e..e8391d1512 100644 --- a/src/jit/codegenarmarch.cpp +++ b/src/jit/codegenarmarch.cpp @@ -1541,6 +1541,14 @@ void CodeGen::genCallInstruction(GenTreeCall* call) } argReg = genRegArgNext(argReg); + +#if defined(_TARGET_ARM_) + // A double register is modelled as an even-numbered single one + if (putArgRegNode->TypeGet() == TYP_DOUBLE) + { + argReg = genRegArgNext(argReg); + } +#endif // _TARGET_ARM_ } } else diff --git a/src/jit/lsraarmarch.cpp b/src/jit/lsraarmarch.cpp index 54bf543d83..d33eb30f8c 100644 --- a/src/jit/lsraarmarch.cpp +++ b/src/jit/lsraarmarch.cpp @@ -558,6 +558,14 @@ void Lowering::TreeNodeInfoInitCall(GenTreeCall* call) // Update argReg for the next putarg_reg (if any) argReg = genRegArgNext(argReg); + +#if defined(_TARGET_ARM_) + // A double register is modelled as an even-numbered single one + if (entry->Current()->TypeGet() == TYP_DOUBLE) + { + argReg = genRegArgNext(argReg); + } +#endif // _TARGET_ARM_ } } else |