diff options
| author | Gleb Balykov <g.balykov@samsung.com> | 2020-09-14 13:30:50 +0300 |
|---|---|---|
| committer | Alexander Soldatov/Platform Lab /SRR/Staff Engineer/Samsung Electronics <soldatov.a@samsung.com> | 2020-09-21 20:04:27 +0300 |
| commit | 676b3e46459a5138d05ac31bb697a54a8a8f685c (patch) | |
| tree | 9a5d32deb41da42d98bf125b6a1ec9dee8359ce8 /src/vm/arm64/asmconstants.h | |
| parent | 7a0186fe2611e00cd8019adced7af3a269e2e7f4 (diff) | |
| download | coreclr-submit/tizen/20200921.230336.tar.gz coreclr-submit/tizen/20200921.230336.tar.bz2 coreclr-submit/tizen/20200921.230336.zip | |
[Tizen] Add RelativeFixupPrecode for arm64, which replaces FixupPrecode in FNV imagessubmit/tizen/20200921.230336accepted/tizen/unified/20200922.034817
Diffstat (limited to 'src/vm/arm64/asmconstants.h')
| -rw-r--r-- | src/vm/arm64/asmconstants.h | 29 |
1 files changed, 20 insertions, 9 deletions
diff --git a/src/vm/arm64/asmconstants.h b/src/vm/arm64/asmconstants.h index 3bb4f6494f..84b92fa5a1 100644 --- a/src/vm/arm64/asmconstants.h +++ b/src/vm/arm64/asmconstants.h @@ -176,19 +176,30 @@ ASMCONSTANTS_C_ASSERT(CONTEXT_Pc == offsetof(T_CONTEXT,Pc)) ASMCONSTANTS_C_ASSERT(SIZEOF__FaultingExceptionFrame == sizeof(FaultingExceptionFrame)); ASMCONSTANTS_C_ASSERT(FaultingExceptionFrame__m_fFilterExecuted == offsetof(FaultingExceptionFrame, m_fFilterExecuted)); -#define SIZEOF__FixupPrecode 24 -#define Offset_PrecodeChunkIndex 15 -#define Offset_MethodDescChunkIndex 14 -#define MethodDesc_ALIGNMENT_SHIFT 3 -#define FixupPrecode_ALIGNMENT_SHIFT_1 3 -#define FixupPrecode_ALIGNMENT_SHIFT_2 4 +#define MethodDesc_ALIGNMENT_SHIFT 3 +ASMCONSTANTS_C_ASSERT(MethodDesc_ALIGNMENT_SHIFT == MethodDesc::ALIGNMENT_SHIFT); + +#define SIZEOF__FixupPrecode 24 +#define Offset_FixupPrecodeChunkIndex 15 +#define Offset_FixupPrecodeMethodDescChunkIndex 14 +#define FixupPrecode_ALIGNMENT_SHIFT_1 3 +#define FixupPrecode_ALIGNMENT_SHIFT_2 4 ASMCONSTANTS_C_ASSERT(SIZEOF__FixupPrecode == sizeof(FixupPrecode)); -ASMCONSTANTS_C_ASSERT(Offset_PrecodeChunkIndex == offsetof(FixupPrecode, m_PrecodeChunkIndex)); -ASMCONSTANTS_C_ASSERT(Offset_MethodDescChunkIndex == offsetof(FixupPrecode, m_MethodDescChunkIndex)); -ASMCONSTANTS_C_ASSERT(MethodDesc_ALIGNMENT_SHIFT == MethodDesc::ALIGNMENT_SHIFT); +ASMCONSTANTS_C_ASSERT(Offset_FixupPrecodeChunkIndex == offsetof(FixupPrecode, m_PrecodeChunkIndex)); +ASMCONSTANTS_C_ASSERT(Offset_FixupPrecodeMethodDescChunkIndex == offsetof(FixupPrecode, m_MethodDescChunkIndex)); ASMCONSTANTS_C_ASSERT((1<<FixupPrecode_ALIGNMENT_SHIFT_1) + (1<<FixupPrecode_ALIGNMENT_SHIFT_2) == sizeof(FixupPrecode)); +#define SIZEOF__RelativeFixupPrecode 32 +#define Offset_RelativeFixupPrecodeChunkIndex 17 +#define Offset_RelativeFixupPrecodeMethodDescChunkIndex 16 +#define RelativeFixupPrecode_ALIGNMENT_SHIFT 4 + +ASMCONSTANTS_C_ASSERT(SIZEOF__RelativeFixupPrecode == sizeof(RelativeFixupPrecode)); +ASMCONSTANTS_C_ASSERT(Offset_RelativeFixupPrecodeChunkIndex == offsetof(RelativeFixupPrecode, m_PrecodeChunkIndex)); +ASMCONSTANTS_C_ASSERT(Offset_RelativeFixupPrecodeMethodDescChunkIndex == offsetof(RelativeFixupPrecode, m_MethodDescChunkIndex)); +ASMCONSTANTS_C_ASSERT((1<<(RelativeFixupPrecode_ALIGNMENT_SHIFT+1)) == sizeof(RelativeFixupPrecode)); + #ifndef CROSSGEN_COMPILE #define ResolveCacheElem__target 0x10 #define ResolveCacheElem__pNext 0x18 |