diff options
author | Carol Eidt <carol.eidt@microsoft.com> | 2018-07-26 13:44:47 -0700 |
---|---|---|
committer | Carol Eidt <carol.eidt@microsoft.com> | 2018-07-26 13:54:32 -0700 |
commit | 8f020204f27aa10f778f9e549e01c6717d939d47 (patch) | |
tree | ae6fda97cb5f869437ed0dbbccecbb2c36cbe581 /src/jit | |
parent | 51c390f3d009e36a72ca0b1e8b90a4d14a395ff9 (diff) | |
download | coreclr-8f020204f27aa10f778f9e549e01c6717d939d47.tar.gz coreclr-8f020204f27aa10f778f9e549e01c6717d939d47.tar.bz2 coreclr-8f020204f27aa10f778f9e549e01c6717d939d47.zip |
Include long shifts in OperIsShiftOrRotate
The register allocator uses `OperIsShiftOrRotate` as the assertion for the method that gets the kills for the class of instructions that use RCX as the shift amount register. Expand it to include `RSH_LO` and `LSH_HI`.
Fix #19081
Diffstat (limited to 'src/jit')
-rw-r--r-- | src/jit/codegenxarch.cpp | 2 | ||||
-rw-r--r-- | src/jit/gentree.h | 16 | ||||
-rw-r--r-- | src/jit/lowerarmarch.cpp | 5 | ||||
-rw-r--r-- | src/jit/lowerxarch.cpp | 7 |
4 files changed, 20 insertions, 10 deletions
diff --git a/src/jit/codegenxarch.cpp b/src/jit/codegenxarch.cpp index 1ceb928778..ea37fb6cc3 100644 --- a/src/jit/codegenxarch.cpp +++ b/src/jit/codegenxarch.cpp @@ -4131,7 +4131,7 @@ void CodeGen::genCodeForShiftRMW(GenTreeStoreInd* storeInd) GenTree* data = storeInd->Data(); GenTree* addr = storeInd->Addr(); - assert(data->OperIsShiftOrRotate()); + assert(data->OperIsShift() || data->OperIsRotate()); // This function only handles the RMW case. assert(data->gtOp.gtOp1->isUsedFromMemory()); diff --git a/src/jit/gentree.h b/src/jit/gentree.h index 83f07d3213..4195bf4650 100644 --- a/src/jit/gentree.h +++ b/src/jit/gentree.h @@ -1281,6 +1281,20 @@ public: return OperIsShift(OperGet()); } + static bool OperIsShiftLong(genTreeOps gtOper) + { +#ifdef _TARGET_64BIT_ + return false; +#else + return (gtOper == GT_LSH_HI) || (gtOper == GT_RSH_LO); +#endif + } + + bool OperIsShiftLong() const + { + return OperIsShiftLong(OperGet()); + } + static bool OperIsRotate(genTreeOps gtOper) { return (gtOper == GT_ROL) || (gtOper == GT_ROR); @@ -1293,7 +1307,7 @@ public: static bool OperIsShiftOrRotate(genTreeOps gtOper) { - return OperIsShift(gtOper) || OperIsRotate(gtOper); + return OperIsShift(gtOper) || OperIsRotate(gtOper) || OperIsShiftLong(gtOper); } bool OperIsShiftOrRotate() const diff --git a/src/jit/lowerarmarch.cpp b/src/jit/lowerarmarch.cpp index c46809fe0a..f4e3bfc954 100644 --- a/src/jit/lowerarmarch.cpp +++ b/src/jit/lowerarmarch.cpp @@ -694,6 +694,7 @@ void Lowering::ContainCheckMul(GenTreeOp* node) void Lowering::ContainCheckShiftRotate(GenTreeOp* node) { GenTree* shiftBy = node->gtOp2; + assert(node->OperIsShiftOrRotate()); #ifdef _TARGET_ARM_ GenTree* source = node->gtOp1; @@ -702,9 +703,7 @@ void Lowering::ContainCheckShiftRotate(GenTreeOp* node) assert(source->OperGet() == GT_LONG); MakeSrcContained(node, source); } -#else // !_TARGET_ARM_ - assert(node->OperIsShiftOrRotate()); -#endif // !_TARGET_ARM_ +#endif // _TARGET_ARM_ if (shiftBy->IsCnsIntOrI()) { diff --git a/src/jit/lowerxarch.cpp b/src/jit/lowerxarch.cpp index 327eb2b8cc..6aa295111a 100644 --- a/src/jit/lowerxarch.cpp +++ b/src/jit/lowerxarch.cpp @@ -1693,18 +1693,15 @@ void Lowering::ContainCheckMul(GenTreeOp* node) // void Lowering::ContainCheckShiftRotate(GenTreeOp* node) { + assert(node->OperIsShiftOrRotate()); #ifdef _TARGET_X86_ GenTree* source = node->gtOp1; - if (node->OperIs(GT_LSH_HI, GT_RSH_LO)) + if (node->OperIsShiftLong()) { assert(source->OperGet() == GT_LONG); MakeSrcContained(node, source); } - else #endif // !_TARGET_X86_ - { - assert(node->OperIsShiftOrRotate()); - } GenTree* shiftBy = node->gtOp2; if (IsContainableImmed(node, shiftBy) && (shiftBy->gtIntConCommon.IconValue() <= 255) && |