diff options
author | Tanner Gooding <tagoo@outlook.com> | 2018-02-25 09:27:18 -0800 |
---|---|---|
committer | Tanner Gooding <tagoo@outlook.com> | 2018-02-28 07:19:27 -0800 |
commit | c23b4d6780095ac1e58f785e8f635d94120e1f64 (patch) | |
tree | 9e3673e005498bd34b080280a74cb70567dbf2a1 /src/jit/lsraxarch.cpp | |
parent | 7207e1b422de2d2ad451605d5753a7e7b1883a08 (diff) | |
download | coreclr-c23b4d6780095ac1e58f785e8f635d94120e1f64.tar.gz coreclr-c23b4d6780095ac1e58f785e8f635d94120e1f64.tar.bz2 coreclr-c23b4d6780095ac1e58f785e8f635d94120e1f64.zip |
Adding partial support for the SSE41 hardware intrinsics
Diffstat (limited to 'src/jit/lsraxarch.cpp')
-rw-r--r-- | src/jit/lsraxarch.cpp | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/src/jit/lsraxarch.cpp b/src/jit/lsraxarch.cpp index 6ff82a78ee..e5a74fdf84 100644 --- a/src/jit/lsraxarch.cpp +++ b/src/jit/lsraxarch.cpp @@ -2344,6 +2344,13 @@ void LinearScan::BuildHWIntrinsic(GenTreeHWIntrinsic* intrinsicTree) } break; + case NI_SSE41_TestAllOnes: + { + info->internalFloatCount = 1; + info->setInternalCandidates(this, allSIMDRegs()); + break; + } + #ifdef _TARGET_X86_ case NI_SSE42_Crc32: { |