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| author | Tanner Gooding <tagoo@outlook.com> | 2018-02-16 10:30:05 -0800 |
|---|---|---|
| committer | Tanner Gooding <tagoo@outlook.com> | 2018-02-21 22:42:13 -0800 |
| commit | 987f93399225199bdb3c53e00c9166fb37ca1396 (patch) | |
| tree | 8fa74fa0e4955a9e4cf63413e988997d0fa7ff69 /src/jit/lsraxarch.cpp | |
| parent | 7c90b467d072b11c08804a3bb33f3d71f67a6e49 (diff) | |
| download | coreclr-987f93399225199bdb3c53e00c9166fb37ca1396.tar.gz coreclr-987f93399225199bdb3c53e00c9166fb37ca1396.tar.bz2 coreclr-987f93399225199bdb3c53e00c9166fb37ca1396.zip | |
Adding support for the SSE3 and SSSE3 hardware intrinsics
Diffstat (limited to 'src/jit/lsraxarch.cpp')
| -rw-r--r-- | src/jit/lsraxarch.cpp | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/jit/lsraxarch.cpp b/src/jit/lsraxarch.cpp index 2164cfa2c9..365a658257 100644 --- a/src/jit/lsraxarch.cpp +++ b/src/jit/lsraxarch.cpp @@ -2302,6 +2302,7 @@ void LinearScan::BuildHWIntrinsic(GenTreeHWIntrinsic* intrinsicTree) break; case NI_SSE_Shuffle: + case NI_SSSE3_AlignRight: { assert(op1->OperIsList()); GenTree* op3 = op1->AsArgList()->Rest()->Rest()->Current(); |