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author | Tanner Gooding <tagoo@outlook.com> | 2018-03-08 19:36:21 -0800 |
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committer | Tanner Gooding <tagoo@outlook.com> | 2018-03-09 16:34:08 -0800 |
commit | 66d3e3f76630caed2071cdafcb74216bcd9b5732 (patch) | |
tree | e77acc64ac0c347d22f21d4e21017878d8d15e32 /src/jit/lsraxarch.cpp | |
parent | 0c0ae80321efc227d6c7f49044e5643d3d2ca0ff (diff) | |
download | coreclr-66d3e3f76630caed2071cdafcb74216bcd9b5732.tar.gz coreclr-66d3e3f76630caed2071cdafcb74216bcd9b5732.tar.bz2 coreclr-66d3e3f76630caed2071cdafcb74216bcd9b5732.zip |
Fix the RMW delay handling for hwintrinsic nodes with RMW semantics and more than 2 args
Diffstat (limited to 'src/jit/lsraxarch.cpp')
-rw-r--r-- | src/jit/lsraxarch.cpp | 13 |
1 files changed, 13 insertions, 0 deletions
diff --git a/src/jit/lsraxarch.cpp b/src/jit/lsraxarch.cpp index a9f0207d8d..bbd57352bb 100644 --- a/src/jit/lsraxarch.cpp +++ b/src/jit/lsraxarch.cpp @@ -2314,6 +2314,19 @@ void LinearScan::BuildHWIntrinsic(GenTreeHWIntrinsic* intrinsicTree) } } + // Check for "srcCount >= 2" to match against 3+ operand nodes where one is constant + if ((op2 == nullptr) && (info->srcCount >= 2) && intrinsicTree->isRMWHWIntrinsic(compiler)) + { + // TODO-XArch-CQ: This is currently done in order to handle intrinsics which have more than + // two arguments but which still have RMW semantics (such as NI_SSE41_Insert). We should make + // this handling more general and move it back out to LinearScan::BuildNode. + + assert(numArgs > 2); + LocationInfoListNode* op2Info = useList.Begin()->Next(); + op2Info->info.isDelayFree = true; + info->hasDelayFreeSrc = true; + } + switch (intrinsicID) { case NI_SSE_CompareEqualOrderedScalar: |