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| author | Carol Eidt <carol.eidt@microsoft.com> | 2018-07-10 13:33:02 -0700 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2018-07-10 13:33:02 -0700 |
| commit | eb405392acacf6f5b72601521ec4ac5106d1e2ba (patch) | |
| tree | 9bfdb32d277f5d5731719bcd6fa29281ce8ea0ab /src/jit/lsra.cpp | |
| parent | cb005bd771122d919587c646aaebfce7176b36db (diff) | |
| parent | 025a975e67b9069c62a62803ed5e51588db128bf (diff) | |
| download | coreclr-eb405392acacf6f5b72601521ec4ac5106d1e2ba.tar.gz coreclr-eb405392acacf6f5b72601521ec4ac5106d1e2ba.tar.bz2 coreclr-eb405392acacf6f5b72601521ec4ac5106d1e2ba.zip | |
Merge pull request #18805 from CarolEidt/Fix18746
Don't change PUTARG_REG spill type on arm64
Diffstat (limited to 'src/jit/lsra.cpp')
| -rw-r--r-- | src/jit/lsra.cpp | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/src/jit/lsra.cpp b/src/jit/lsra.cpp index 3338cbd2ae..c5afa1b409 100644 --- a/src/jit/lsra.cpp +++ b/src/jit/lsra.cpp @@ -6433,6 +6433,7 @@ void LinearScan::updateMaxSpill(RefPosition* refPosition) { typ = treeNode->AsPutArgSplit()->GetRegType(refPosition->getMultiRegIdx()); } +#if !defined(_TARGET_64BIT_) else if (treeNode->OperIsPutArgReg()) { // For double arg regs, the type is changed to long since they must be passed via `r0-r3`. @@ -6440,6 +6441,7 @@ void LinearScan::updateMaxSpill(RefPosition* refPosition) var_types typNode = treeNode->TypeGet(); typ = (typNode == TYP_LONG) ? TYP_INT : typNode; } +#endif // !_TARGET_64BIT_ #endif // FEATURE_ARG_SPLIT else { |