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authorCarol Eidt <carol.eidt@microsoft.com>2019-04-12 11:31:55 -0700
committerGitHub <noreply@github.com>2019-04-12 11:31:55 -0700
commit855491b895b187bdc396c491884a370b11d999e9 (patch)
tree4b570005f1bfdeebfd66c2724d783d4b9cafbb82 /src/jit/lsra.cpp
parent85f584b0ca94a547c03790d471b44c9e36e0fac5 (diff)
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Don't Free UpperVector (#23889)
* Don't Free UpperVector UpperVector regs are freed at their time of use, and shouldn't be freed when the last RefPosition is encountered. Also, we need to specify all 3 operands for vinsertf128 Fix #23861 Fix #23904 Fix #23804
Diffstat (limited to 'src/jit/lsra.cpp')
-rw-r--r--src/jit/lsra.cpp47
1 files changed, 26 insertions, 21 deletions
diff --git a/src/jit/lsra.cpp b/src/jit/lsra.cpp
index 9d4344f028..8a5323ced2 100644
--- a/src/jit/lsra.cpp
+++ b/src/jit/lsra.cpp
@@ -5774,36 +5774,41 @@ void LinearScan::allocateRegisters()
// The interval could be dead if this is a user variable, or if the
// node is being evaluated for side effects, or a call whose result
// is not used, etc.
- if (currentRefPosition->lastUse || currentRefPosition->nextRefPosition == nullptr)
+ // If this is an UpperVector we'll neither free it nor preference it
+ // (it will be freed when it is used).
+ if (!currentInterval->IsUpperVector())
{
- assert(currentRefPosition->isIntervalRef());
-
- if (refType != RefTypeExpUse && currentRefPosition->nextRefPosition == nullptr)
+ if (currentRefPosition->lastUse || currentRefPosition->nextRefPosition == nullptr)
{
- if (currentRefPosition->delayRegFree)
+ assert(currentRefPosition->isIntervalRef());
+
+ if (refType != RefTypeExpUse && currentRefPosition->nextRefPosition == nullptr)
{
- delayRegsToFree |= assignedRegBit;
+ if (currentRefPosition->delayRegFree)
+ {
+ delayRegsToFree |= assignedRegBit;
+
+ INDEBUG(dumpLsraAllocationEvent(LSRA_EVENT_LAST_USE_DELAYED));
+ }
+ else
+ {
+ regsToFree |= assignedRegBit;
- INDEBUG(dumpLsraAllocationEvent(LSRA_EVENT_LAST_USE_DELAYED));
+ INDEBUG(dumpLsraAllocationEvent(LSRA_EVENT_LAST_USE));
+ }
}
else
{
- regsToFree |= assignedRegBit;
-
- INDEBUG(dumpLsraAllocationEvent(LSRA_EVENT_LAST_USE));
+ currentInterval->isActive = false;
}
- }
- else
- {
- currentInterval->isActive = false;
- }
- // Update the register preferences for the relatedInterval, if this is 'preferencedToDef'.
- // Don't propagate to subsequent relatedIntervals; that will happen as they are allocated, and we
- // don't know yet whether the register will be retained.
- if (currentInterval->relatedInterval != nullptr)
- {
- currentInterval->relatedInterval->updateRegisterPreferences(assignedRegBit);
+ // Update the register preferences for the relatedInterval, if this is 'preferencedToDef'.
+ // Don't propagate to subsequent relatedIntervals; that will happen as they are allocated, and we
+ // don't know yet whether the register will be retained.
+ if (currentInterval->relatedInterval != nullptr)
+ {
+ currentInterval->relatedInterval->updateRegisterPreferences(assignedRegBit);
+ }
}
}