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author | Hanjoung Lee <hanjoung.lee@samsung.com> | 2017-06-19 16:50:02 +0900 |
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committer | Hanjoung Lee <hanjoung.lee@samsung.com> | 2017-06-29 13:59:10 +0900 |
commit | 55eede4c2ad0c5f4849fda9544138f9096847ba4 (patch) | |
tree | 51cbaf9a3f3b37f6c0a0a61bcdd4b78f80d4a012 /src/jit/codegenarmarch.cpp | |
parent | b38cfeb7b14de9ce182f06b8840f1ccd80ec0095 (diff) | |
download | coreclr-55eede4c2ad0c5f4849fda9544138f9096847ba4.tar.gz coreclr-55eede4c2ad0c5f4849fda9544138f9096847ba4.tar.bz2 coreclr-55eede4c2ad0c5f4849fda9544138f9096847ba4.zip |
[RyuJIT/armel] Support `double` argument passing
- Fix for putting `double` arguments between Lowering and Codegen phase
- Rename GenTreeMulLong to GenTreeMultiRegOp
GT_PUTARG_REG could be GenTreeMultiRegOp on RyuJIT/arm
Fix #12293
Diffstat (limited to 'src/jit/codegenarmarch.cpp')
-rw-r--r-- | src/jit/codegenarmarch.cpp | 10 |
1 files changed, 4 insertions, 6 deletions
diff --git a/src/jit/codegenarmarch.cpp b/src/jit/codegenarmarch.cpp index 86dec5ee66..5338a0415f 100644 --- a/src/jit/codegenarmarch.cpp +++ b/src/jit/codegenarmarch.cpp @@ -191,7 +191,7 @@ void CodeGen::genCodeForTreeNode(GenTreePtr treeNode) #ifdef _TARGET_ARM_ case GT_MUL_LONG: - genCodeForMulLong(treeNode->AsMulLong()); + genCodeForMulLong(treeNode->AsMultiRegOp()); break; #endif // _TARGET_ARM_ @@ -1661,11 +1661,9 @@ void CodeGen::genRegCopy(GenTree* treeNode) } else { - // TODO-Arm-Bug: We cannot assume the second destination be the next of targetReg - // since LSRA doesn't know that register is used. So we cannot write code like: - // - // inst_RV_RV_RV(INS_vmov_d2i, targetReg, REG_NEXT(targetReg), genConsumeReg(op1), EA_8BYTE); - NYI_ARM("genRegCopy from 'double' to 'int'+'int'"); + regNumber otherReg = (regNumber)treeNode->AsCopyOrReload()->gtOtherRegs[0]; + assert(otherReg != REG_NA); + inst_RV_RV_RV(INS_vmov_d2i, targetReg, otherReg, genConsumeReg(op1), EA_8BYTE); } } #endif // !_TARGET_ARM64_ |