From 55eede4c2ad0c5f4849fda9544138f9096847ba4 Mon Sep 17 00:00:00 2001 From: Hanjoung Lee Date: Mon, 19 Jun 2017 16:50:02 +0900 Subject: [RyuJIT/armel] Support `double` argument passing - Fix for putting `double` arguments between Lowering and Codegen phase - Rename GenTreeMulLong to GenTreeMultiRegOp GT_PUTARG_REG could be GenTreeMultiRegOp on RyuJIT/arm Fix #12293 --- src/jit/codegenarmarch.cpp | 10 ++++------ 1 file changed, 4 insertions(+), 6 deletions(-) (limited to 'src/jit/codegenarmarch.cpp') diff --git a/src/jit/codegenarmarch.cpp b/src/jit/codegenarmarch.cpp index 86dec5ee66..5338a0415f 100644 --- a/src/jit/codegenarmarch.cpp +++ b/src/jit/codegenarmarch.cpp @@ -191,7 +191,7 @@ void CodeGen::genCodeForTreeNode(GenTreePtr treeNode) #ifdef _TARGET_ARM_ case GT_MUL_LONG: - genCodeForMulLong(treeNode->AsMulLong()); + genCodeForMulLong(treeNode->AsMultiRegOp()); break; #endif // _TARGET_ARM_ @@ -1661,11 +1661,9 @@ void CodeGen::genRegCopy(GenTree* treeNode) } else { - // TODO-Arm-Bug: We cannot assume the second destination be the next of targetReg - // since LSRA doesn't know that register is used. So we cannot write code like: - // - // inst_RV_RV_RV(INS_vmov_d2i, targetReg, REG_NEXT(targetReg), genConsumeReg(op1), EA_8BYTE); - NYI_ARM("genRegCopy from 'double' to 'int'+'int'"); + regNumber otherReg = (regNumber)treeNode->AsCopyOrReload()->gtOtherRegs[0]; + assert(otherReg != REG_NA); + inst_RV_RV_RV(INS_vmov_d2i, targetReg, otherReg, genConsumeReg(op1), EA_8BYTE); } } #endif // !_TARGET_ARM64_ -- cgit v1.2.3