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| author | Steve MacLean <sdmaclea@qti.qualcomm.com> | 2017-04-27 22:03:49 -0400 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2017-04-27 22:03:49 -0400 |
| commit | 8df1748f28dab626ec40eaab9801053743b150cc (patch) | |
| tree | eb946e19842902900635d65fee506a2493000546 | |
| parent | 2d7edf2eb07b04f8839b676c045efb62d986ec41 (diff) | |
| download | coreclr-8df1748f28dab626ec40eaab9801053743b150cc.tar.gz coreclr-8df1748f28dab626ec40eaab9801053743b150cc.tar.bz2 coreclr-8df1748f28dab626ec40eaab9801053743b150cc.zip | |
Remove comment
| -rw-r--r-- | src/jit/emit.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/jit/emit.h b/src/jit/emit.h index 87444836f3..a63242f0b0 100644 --- a/src/jit/emit.h +++ b/src/jit/emit.h @@ -656,7 +656,7 @@ protected: // The instrDescCGCA struct's member keeping the GC-ness of the first return register is _idcSecondRetRegGCType. GCtype _idGCref : 2; // GCref operand? (value is a "GCtype") #ifdef _TARGET_ARM64_ - GCtype _idGCref2 : 2; // GCref operand fir register 2? (value is a "GCtype") + GCtype _idGCref2 : 2; #endif // Note that we use the _idReg1 and _idReg2 fields to hold |