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path: root/sim/rx/ChangeLog
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2014-08-19Fix --diable-shared --enable-plugins build breakageAlan Modra1-0/+4
2014-08-15Regenerate sim configury.Roland McGrath1-0/+5
2014-03-10sim: constify arg to sim_do_commandMike Frysinger1-0/+5
2014-03-05sim: constify prog_nameMike Frysinger1-0/+4
2014-02-17 Revise signal mapping function in GDB interface for RX sim.Kevin Buettner1-0/+6
2013-09-23Regenerate sim configure files to pick up support for powerpc64le inAlan Modra1-0/+4
2013-06-28* rx.c (SHIFT_OP): A shift by zero still sets the condition codes.Nick Clifton1-0/+5
2013-06-05sim: use AM_MAINTAINER_MODEMike Frysinger1-0/+4
2013-01-16 * rx.c (decode_opcode): Handle RXO_satr.Nick Clifton1-0/+4
2012-06-15Define PACKAGE macro in all sims' config.h.Joel Brobecker1-0/+4
2012-05-24gdb/Pedro Alves1-0/+6
2012-03-24[PATCH] sim: make sure to include strsignal prototypeMike Frysinger1-0/+4
2012-03-23sim: rx: fix warnings with AC_DEFINEMike Frysinger1-0/+5
2012-03-03Update rx sim so that it'll print load statistics.Kevin Buettner1-0/+13
2011-12-03sim: generate build dependencies on the flyMike Frysinger1-0/+5
2011-10-18sim: rename common/aclocal.m4 to common/acinclude.m4Mike Frysinger1-0/+4
2011-10-18sim: move from common.m4 to SIM_AC_COMMONMike Frysinger1-0/+6
2011-07-11sim: m32c/rx: rename configure.in to match rest of the treeMike Frysinger1-0/+4
2011-07-11sim: m32c/rx: fix typo in copyright updatingMike Frysinger1-0/+4
2011-04-16sim: add sim_complete_command stubs for non-common-using portsMike Frysinger1-0/+4
2011-01-11http://sourceware.org/ml/gdb-patches/2010-11/msg00112.htmlAndrew Burgess1-0/+5
2010-12-14(decode_opcode): RXO_branchrel is relative to the opcode's PC, notDJ Delorie1-0/+2
2010-12-14* rx.c (decode_opcode): For "MVFC PC,", use the address of theDJ Delorie1-0/+5
2010-11-12* rx.c (lsb_count): New.DJ Delorie1-0/+8
2010-09-30 * mem.c (rx_mem_ptr): When invalidating the decode cache, accountKevin Buettner1-0/+6
2010-09-29 * rx.c (decode_opcode: RXO_int): Only break out of the emulationNick Clifton1-0/+5
2010-09-24 * rx.c (decode_opcode): Add cycle information for RXO_smovu.Kevin Buettner1-0/+4
2010-09-24Fix typo in ChangeLog entry.Kevin Buettner1-1/+1
2010-09-23 * cpu.h (reset_decoder): Declare.Kevin Buettner1-0/+4
2010-09-23 * rx.c (decode_opcode): Declare `rx' as unsigned.Kevin Buettner1-0/+2
2010-09-23 * fpu.c, gdb-if.c, load.c, misc.c, syscalls.c (config.h): Include.Kevin Buettner1-0/+4
2010-07-29[include/opcode]DJ Delorie1-0/+27
2010-07-28[sim/rx]DJ Delorie1-0/+27
2010-07-07 * gdb-if.c (sim_store_register): Add case for sim_rx_acc_regnum.Kevin Buettner1-0/+4
2010-06-24Add "acc" register. Revise register order and names.Kevin Buettner1-0/+5
2010-06-08oops - omitted from previous deltaNick Clifton1-0/+5
2010-05-28 * gdb-if.c (sim_do_command): Add a "sim verbose noisy" command.Kevin Buettner1-0/+4
2010-04-14sim: constify sim_write source buffer (part 2)Mike Frysinger1-0/+4
2010-02-14 * configure.in: Check if the host has getopt.h.Masaki Muranaka1-0/+9
2009-12-23* rx/rx.c (decode_opcode): btst bit address mask fix.DJ Delorie1-0/+4
2009-11-30* rx/rx.c (decode_opcode): fix SWHILE logic.DJ Delorie1-0/+4
2009-11-24[sim]DJ Delorie1-0/+26
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