diff options
Diffstat (limited to 'gas')
41 files changed, 2934 insertions, 1 deletions
diff --git a/gas/ChangeLog b/gas/ChangeLog index ca3ee3feb05..ca7b9b92786 100644 --- a/gas/ChangeLog +++ b/gas/ChangeLog @@ -8,6 +8,26 @@ * config/obj-coff.c (coff_obj_symbol_new_hook): Set the is_sym field. +2014-11-17 Ilya Tocar <ilya.tocar@intel.com> + + * config/tc-i386.c (cpu_arch): Add .avx512vbmi. + * doc/c-i386.texi: Document it. + +2014-11-17 Ilya Tocar <ilya.tocar@intel.com> + + * config/tc-i386.c (cpu_arch): Add .avx512ifma. + * doc/c-i386.texi: Document it. + +2014-11-17 Ilya Tocar <ilya.tocar@intel.com> + + * config/tc-i386.c (cpu_arch): Add .pcommit. + * doc/c-i386.texi: Document it. + +2014-11-17 Ilya Tocar <ilya.tocar@intel.com> + + * config/tc-i386.c (cpu_arch): Add .clwb. + * doc/c-i386.texi: Document it. + 2014-11-14 H.J. Lu <hongjiu.lu@intel.com> * config/tc-i386.c (cpu_arch): Re-arrange avx512* and xsave* diff --git a/gas/config/tc-i386.c b/gas/config/tc-i386.c index 91db21527a0..b777360f680 100644 --- a/gas/config/tc-i386.c +++ b/gas/config/tc-i386.c @@ -929,6 +929,14 @@ static const arch_entry cpu_arch[] = CPU_PREFETCHWT1_FLAGS, 0, 0 }, { STRING_COMMA_LEN (".se1"), PROCESSOR_UNKNOWN, CPU_SE1_FLAGS, 0, 0 }, + { STRING_COMMA_LEN (".clwb"), PROCESSOR_UNKNOWN, + CPU_CLWB_FLAGS, 0, 0 }, + { STRING_COMMA_LEN (".pcommit"), PROCESSOR_UNKNOWN, + CPU_PCOMMIT_FLAGS, 0, 0 }, + { STRING_COMMA_LEN (".avx512ifma"), PROCESSOR_UNKNOWN, + CPU_AVX512IFMA_FLAGS, 0, 0 }, + { STRING_COMMA_LEN (".avx512vbmi"), PROCESSOR_UNKNOWN, + CPU_AVX512VBMI_FLAGS, 0, 0 }, }; #ifdef I386COFF diff --git a/gas/doc/c-i386.texi b/gas/doc/c-i386.texi index 440f3751b08..fd6c3804683 100644 --- a/gas/doc/c-i386.texi +++ b/gas/doc/c-i386.texi @@ -154,6 +154,8 @@ accept various extension mnemonics. For example, @code{prefetchwt1}, @code{clflushopt}, @code{se1}, +@code{clwb}, +@code{pcommit}, @code{avx512f}, @code{avx512cd}, @code{avx512er}, @@ -161,6 +163,8 @@ accept various extension mnemonics. For example, @code{avx512vl}, @code{avx512bw}, @code{avx512dq}, +@code{avx512ifma}, +@code{avx512vbmi}, @code{noavx}, @code{vmx}, @code{vmfunc}, @@ -1102,7 +1106,8 @@ supported on the CPU specified. The choices for @var{cpu_type} are: @item @samp{.smap} @tab @samp{.mpx} @tab @samp{.sha} @tab @samp{.prefetchwt1} @item @samp{.clflushopt} @tab @samp{.xsavec} @tab @samp{.xsaves} @tab @samp{.se1} @item @samp{.avx512f} @tab @samp{.avx512cd} @tab @samp{.avx512er} @tab @samp{.avx512pf} -@item @samp{.avx512vl} @tab @samp{.avx512bw} @tab @samp{.avx512dq} +@item @samp{.avx512vl} @tab @samp{.avx512bw} @tab @samp{.avx512dq} @tab @samp{.avx512ifma} +@item @samp{.avx512vbmi} @tab @samp{.clwb} @tab @samp{.pcommit} @item @samp{.3dnow} @tab @samp{.3dnowa} @tab @samp{.sse4a} @tab @samp{.sse5} @item @samp{.syscall} @tab @samp{.rdtscp} @tab @samp{.svme} @tab @samp{.abm} @item @samp{.lwp} @tab @samp{.fma4} @tab @samp{.xop} @tab @samp{.cx16} diff --git a/gas/testsuite/ChangeLog b/gas/testsuite/ChangeLog index 060002688a7..2c67e6ea937 100644 --- a/gas/testsuite/ChangeLog +++ b/gas/testsuite/ChangeLog @@ -1,3 +1,55 @@ +2014-11-17 Ilya Tocar <ilya.tocar@intel.com> + + * gas/i386/i386.exp: Run new tests. + * gas/i386/avx512vbmi-intel.d: New file. + * gas/i386/avx512vbmi.d: Likewise. + * gas/i386/avx512vbmi.s: Likewise. + * gas/i386/avx512vbmi_vl-intel.d: Likewise. + * gas/i386/avx512vbmi_vl.d: Likewise. + * gas/i386/avx512vbmi_vl.s: Likewise. + * gas/i386/x86-64-avx512vbmi-intel.d: Likewise. + * gas/i386/x86-64-avx512vbmi.d: Likewise. + * gas/i386/x86-64-avx512vbmi.s: Likewise. + * gas/i386/x86-64-avx512vbmi_vl-intel.d: Likewise. + * gas/i386/x86-64-avx512vbmi_vl.d: Likewise. + * gas/i386/x86-64-avx512vbmi_vl.s: Likewise. + +2014-11-17 Ilya Tocar <ilya.tocar@intel.com> + + * gas/i386/i386.exp: Run new tests. + * gas/i386/avx512ifma-intel.d: New file. + * gas/i386/avx512ifma.d: Likewise. + * gas/i386/avx512ifma.s: Likewise. + * gas/i386/avx512ifma_vl-intel.d: Likewise. + * gas/i386/avx512ifma_vl.d: Likewise. + * gas/i386/avx512ifma_vl.s: Likewise. + * gas/i386/x86-64-avx512ifma-intel.d: Likewise. + * gas/i386/x86-64-avx512ifma.d: Likewise. + * gas/i386/x86-64-avx512ifma.s: Likewise. + * gas/i386/x86-64-avx512ifma_vl-intel.d: Likewise. + * gas/i386/x86-64-avx512ifma_vl.d: Likewise. + * gas/i386/x86-64-avx512ifma_vl.s: Likewise. + +2014-11-17 Ilya Tocar <ilya.tocar@intel.com> + + * gas/i386/i386.exp: Run new tests. + * gas/i386/pcommit-intel.d: New file. + * gas/i386/pcommit.d: Likewise. + * gas/i386/pcommit.s: Likewise. + * gas/i386/x86-64-pcommit-intel.d: Likewise. + * gas/i386/x86-64-pcommit.d: Likewise. + * gas/i386/x86-64-pcommit.s: Likewise. + +2014-11-17 Ilya Tocar <ilya.tocar@intel.com> + + * gas/i386/i386.exp: Run new tests. + * gas/i386/clwb-intel.d: New file. + * gas/i386/clwb.d: Likewise. + * gas/i386/clwb.s: Likewise. + * gas/i386/x86-64-clwb-intel.d: Likewise. + * gas/i386/x86-64-clwb.d: Likewise. + * gas/i386/x86-64-clwb.s: Likewise. + 2014-11-10 Matthew Fortune <matthew.fortune@imgtec.com> Apply trunk patch: diff --git a/gas/testsuite/gas/i386/avx512ifma-intel.d b/gas/testsuite/gas/i386/avx512ifma-intel.d new file mode 100644 index 00000000000..533cc58ce20 --- /dev/null +++ b/gas/testsuite/gas/i386/avx512ifma-intel.d @@ -0,0 +1,68 @@ +#as: +#objdump: -dw -Mintel +#name: i386 AVX512IFMA insns (Intel disassembly) +#source: avx512ifma.s + +.*: +file format .* + + +Disassembly of section \.text: + +00000000 <_start>: +[ ]*[a-f0-9]+:[ ]*62 f2 d5 48 b4 f4[ ]*vpmadd52luq zmm6,zmm5,zmm4 +[ ]*[a-f0-9]+:[ ]*62 f2 d5 4f b4 f4[ ]*vpmadd52luq zmm6\{k7\},zmm5,zmm4 +[ ]*[a-f0-9]+:[ ]*62 f2 d5 cf b4 f4[ ]*vpmadd52luq zmm6\{k7\}\{z\},zmm5,zmm4 +[ ]*[a-f0-9]+:[ ]*62 f2 d5 48 b4 31[ ]*vpmadd52luq zmm6,zmm5,ZMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+:[ ]*62 f2 d5 48 b4 b4 f4 c0 1d fe ff[ ]*vpmadd52luq zmm6,zmm5,ZMMWORD PTR \[esp\+esi\*8-0x1e240\] +[ ]*[a-f0-9]+:[ ]*62 f2 d5 58 b4 30[ ]*vpmadd52luq zmm6,zmm5,QWORD PTR \[eax\]\{1to8\} +[ ]*[a-f0-9]+:[ ]*62 f2 d5 48 b4 72 7f[ ]*vpmadd52luq zmm6,zmm5,ZMMWORD PTR \[edx\+0x1fc0\] +[ ]*[a-f0-9]+:[ ]*62 f2 d5 48 b4 b2 00 20 00 00[ ]*vpmadd52luq zmm6,zmm5,ZMMWORD PTR \[edx\+0x2000\] +[ ]*[a-f0-9]+:[ ]*62 f2 d5 48 b4 72 80[ ]*vpmadd52luq zmm6,zmm5,ZMMWORD PTR \[edx-0x2000\] +[ ]*[a-f0-9]+:[ ]*62 f2 d5 48 b4 b2 c0 df ff ff[ ]*vpmadd52luq zmm6,zmm5,ZMMWORD PTR \[edx-0x2040\] +[ ]*[a-f0-9]+:[ ]*62 f2 d5 58 b4 72 7f[ ]*vpmadd52luq zmm6,zmm5,QWORD PTR \[edx\+0x3f8\]\{1to8\} +[ ]*[a-f0-9]+:[ ]*62 f2 d5 58 b4 b2 00 04 00 00[ ]*vpmadd52luq zmm6,zmm5,QWORD PTR \[edx\+0x400\]\{1to8\} +[ ]*[a-f0-9]+:[ ]*62 f2 d5 58 b4 72 80[ ]*vpmadd52luq zmm6,zmm5,QWORD PTR \[edx-0x400\]\{1to8\} +[ ]*[a-f0-9]+:[ ]*62 f2 d5 58 b4 b2 f8 fb ff ff[ ]*vpmadd52luq zmm6,zmm5,QWORD PTR \[edx-0x408\]\{1to8\} +[ ]*[a-f0-9]+:[ ]*62 f2 d5 48 b5 f4[ ]*vpmadd52huq zmm6,zmm5,zmm4 +[ ]*[a-f0-9]+:[ ]*62 f2 d5 4f b5 f4[ ]*vpmadd52huq zmm6\{k7\},zmm5,zmm4 +[ ]*[a-f0-9]+:[ ]*62 f2 d5 cf b5 f4[ ]*vpmadd52huq zmm6\{k7\}\{z\},zmm5,zmm4 +[ ]*[a-f0-9]+:[ ]*62 f2 d5 48 b5 31[ ]*vpmadd52huq zmm6,zmm5,ZMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+:[ ]*62 f2 d5 48 b5 b4 f4 c0 1d fe ff[ ]*vpmadd52huq zmm6,zmm5,ZMMWORD PTR \[esp\+esi\*8-0x1e240\] +[ ]*[a-f0-9]+:[ ]*62 f2 d5 58 b5 30[ ]*vpmadd52huq zmm6,zmm5,QWORD PTR \[eax\]\{1to8\} +[ ]*[a-f0-9]+:[ ]*62 f2 d5 48 b5 72 7f[ ]*vpmadd52huq zmm6,zmm5,ZMMWORD PTR \[edx\+0x1fc0\] +[ ]*[a-f0-9]+:[ ]*62 f2 d5 48 b5 b2 00 20 00 00[ ]*vpmadd52huq zmm6,zmm5,ZMMWORD PTR \[edx\+0x2000\] +[ ]*[a-f0-9]+:[ ]*62 f2 d5 48 b5 72 80[ ]*vpmadd52huq zmm6,zmm5,ZMMWORD PTR \[edx-0x2000\] +[ ]*[a-f0-9]+:[ ]*62 f2 d5 48 b5 b2 c0 df ff ff[ ]*vpmadd52huq zmm6,zmm5,ZMMWORD PTR \[edx-0x2040\] +[ ]*[a-f0-9]+:[ ]*62 f2 d5 58 b5 72 7f[ ]*vpmadd52huq zmm6,zmm5,QWORD PTR \[edx\+0x3f8\]\{1to8\} +[ ]*[a-f0-9]+:[ ]*62 f2 d5 58 b5 b2 00 04 00 00[ ]*vpmadd52huq zmm6,zmm5,QWORD PTR \[edx\+0x400\]\{1to8\} +[ ]*[a-f0-9]+:[ ]*62 f2 d5 58 b5 72 80[ ]*vpmadd52huq zmm6,zmm5,QWORD PTR \[edx-0x400\]\{1to8\} +[ ]*[a-f0-9]+:[ ]*62 f2 d5 58 b5 b2 f8 fb ff ff[ ]*vpmadd52huq zmm6,zmm5,QWORD PTR \[edx-0x408\]\{1to8\} +[ ]*[a-f0-9]+:[ ]*62 f2 d5 48 b4 f4[ ]*vpmadd52luq zmm6,zmm5,zmm4 +[ ]*[a-f0-9]+:[ ]*62 f2 d5 4f b4 f4[ ]*vpmadd52luq zmm6\{k7\},zmm5,zmm4 +[ ]*[a-f0-9]+:[ ]*62 f2 d5 cf b4 f4[ ]*vpmadd52luq zmm6\{k7\}\{z\},zmm5,zmm4 +[ ]*[a-f0-9]+:[ ]*62 f2 d5 48 b4 31[ ]*vpmadd52luq zmm6,zmm5,ZMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+:[ ]*62 f2 d5 48 b4 b4 f4 c0 1d fe ff[ ]*vpmadd52luq zmm6,zmm5,ZMMWORD PTR \[esp\+esi\*8-0x1e240\] +[ ]*[a-f0-9]+:[ ]*62 f2 d5 58 b4 30[ ]*vpmadd52luq zmm6,zmm5,QWORD PTR \[eax\]\{1to8\} +[ ]*[a-f0-9]+:[ ]*62 f2 d5 48 b4 72 7f[ ]*vpmadd52luq zmm6,zmm5,ZMMWORD PTR \[edx\+0x1fc0\] +[ ]*[a-f0-9]+:[ ]*62 f2 d5 48 b4 b2 00 20 00 00[ ]*vpmadd52luq zmm6,zmm5,ZMMWORD PTR \[edx\+0x2000\] +[ ]*[a-f0-9]+:[ ]*62 f2 d5 48 b4 72 80[ ]*vpmadd52luq zmm6,zmm5,ZMMWORD PTR \[edx-0x2000\] +[ ]*[a-f0-9]+:[ ]*62 f2 d5 48 b4 b2 c0 df ff ff[ ]*vpmadd52luq zmm6,zmm5,ZMMWORD PTR \[edx-0x2040\] +[ ]*[a-f0-9]+:[ ]*62 f2 d5 58 b4 72 7f[ ]*vpmadd52luq zmm6,zmm5,QWORD PTR \[edx\+0x3f8\]\{1to8\} +[ ]*[a-f0-9]+:[ ]*62 f2 d5 58 b4 b2 00 04 00 00[ ]*vpmadd52luq zmm6,zmm5,QWORD PTR \[edx\+0x400\]\{1to8\} +[ ]*[a-f0-9]+:[ ]*62 f2 d5 58 b4 72 80[ ]*vpmadd52luq zmm6,zmm5,QWORD PTR \[edx-0x400\]\{1to8\} +[ ]*[a-f0-9]+:[ ]*62 f2 d5 58 b4 b2 f8 fb ff ff[ ]*vpmadd52luq zmm6,zmm5,QWORD PTR \[edx-0x408\]\{1to8\} +[ ]*[a-f0-9]+:[ ]*62 f2 d5 48 b5 f4[ ]*vpmadd52huq zmm6,zmm5,zmm4 +[ ]*[a-f0-9]+:[ ]*62 f2 d5 4f b5 f4[ ]*vpmadd52huq zmm6\{k7\},zmm5,zmm4 +[ ]*[a-f0-9]+:[ ]*62 f2 d5 cf b5 f4[ ]*vpmadd52huq zmm6\{k7\}\{z\},zmm5,zmm4 +[ ]*[a-f0-9]+:[ ]*62 f2 d5 48 b5 31[ ]*vpmadd52huq zmm6,zmm5,ZMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+:[ ]*62 f2 d5 48 b5 b4 f4 c0 1d fe ff[ ]*vpmadd52huq zmm6,zmm5,ZMMWORD PTR \[esp\+esi\*8-0x1e240\] +[ ]*[a-f0-9]+:[ ]*62 f2 d5 58 b5 30[ ]*vpmadd52huq zmm6,zmm5,QWORD PTR \[eax\]\{1to8\} +[ ]*[a-f0-9]+:[ ]*62 f2 d5 48 b5 72 7f[ ]*vpmadd52huq zmm6,zmm5,ZMMWORD PTR \[edx\+0x1fc0\] +[ ]*[a-f0-9]+:[ ]*62 f2 d5 48 b5 b2 00 20 00 00[ ]*vpmadd52huq zmm6,zmm5,ZMMWORD PTR \[edx\+0x2000\] +[ ]*[a-f0-9]+:[ ]*62 f2 d5 48 b5 72 80[ ]*vpmadd52huq zmm6,zmm5,ZMMWORD PTR \[edx-0x2000\] +[ ]*[a-f0-9]+:[ ]*62 f2 d5 48 b5 b2 c0 df ff ff[ ]*vpmadd52huq zmm6,zmm5,ZMMWORD PTR \[edx-0x2040\] +[ ]*[a-f0-9]+:[ ]*62 f2 d5 58 b5 72 7f[ ]*vpmadd52huq zmm6,zmm5,QWORD PTR \[edx\+0x3f8\]\{1to8\} +[ ]*[a-f0-9]+:[ ]*62 f2 d5 58 b5 b2 00 04 00 00[ ]*vpmadd52huq zmm6,zmm5,QWORD PTR \[edx\+0x400\]\{1to8\} +[ ]*[a-f0-9]+:[ ]*62 f2 d5 58 b5 72 80[ ]*vpmadd52huq zmm6,zmm5,QWORD PTR \[edx-0x400\]\{1to8\} +[ ]*[a-f0-9]+:[ ]*62 f2 d5 58 b5 b2 f8 fb ff ff[ ]*vpmadd52huq zmm6,zmm5,QWORD PTR \[edx-0x408\]\{1to8\} +#pass diff --git a/gas/testsuite/gas/i386/avx512ifma.d b/gas/testsuite/gas/i386/avx512ifma.d new file mode 100644 index 00000000000..3204d537386 --- /dev/null +++ b/gas/testsuite/gas/i386/avx512ifma.d @@ -0,0 +1,68 @@ +#as: +#objdump: -dw +#name: i386 AVX512IFMA insns +#source: avx512ifma.s + +.*: +file format .* + + +Disassembly of section \.text: + +00000000 <_start>: +[ ]*[a-f0-9]+:[ ]*62 f2 d5 48 b4 f4[ ]*vpmadd52luq %zmm4,%zmm5,%zmm6 +[ ]*[a-f0-9]+:[ ]*62 f2 d5 4f b4 f4[ ]*vpmadd52luq %zmm4,%zmm5,%zmm6\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 f2 d5 cf b4 f4[ ]*vpmadd52luq %zmm4,%zmm5,%zmm6\{%k7\}\{z\} +[ ]*[a-f0-9]+:[ ]*62 f2 d5 48 b4 31[ ]*vpmadd52luq \(%ecx\),%zmm5,%zmm6 +[ ]*[a-f0-9]+:[ ]*62 f2 d5 48 b4 b4 f4 c0 1d fe ff[ ]*vpmadd52luq -0x1e240\(%esp,%esi,8\),%zmm5,%zmm6 +[ ]*[a-f0-9]+:[ ]*62 f2 d5 58 b4 30[ ]*vpmadd52luq \(%eax\)\{1to8\},%zmm5,%zmm6 +[ ]*[a-f0-9]+:[ ]*62 f2 d5 48 b4 72 7f[ ]*vpmadd52luq 0x1fc0\(%edx\),%zmm5,%zmm6 +[ ]*[a-f0-9]+:[ ]*62 f2 d5 48 b4 b2 00 20 00 00[ ]*vpmadd52luq 0x2000\(%edx\),%zmm5,%zmm6 +[ ]*[a-f0-9]+:[ ]*62 f2 d5 48 b4 72 80[ ]*vpmadd52luq -0x2000\(%edx\),%zmm5,%zmm6 +[ ]*[a-f0-9]+:[ ]*62 f2 d5 48 b4 b2 c0 df ff ff[ ]*vpmadd52luq -0x2040\(%edx\),%zmm5,%zmm6 +[ ]*[a-f0-9]+:[ ]*62 f2 d5 58 b4 72 7f[ ]*vpmadd52luq 0x3f8\(%edx\)\{1to8\},%zmm5,%zmm6 +[ ]*[a-f0-9]+:[ ]*62 f2 d5 58 b4 b2 00 04 00 00[ ]*vpmadd52luq 0x400\(%edx\)\{1to8\},%zmm5,%zmm6 +[ ]*[a-f0-9]+:[ ]*62 f2 d5 58 b4 72 80[ ]*vpmadd52luq -0x400\(%edx\)\{1to8\},%zmm5,%zmm6 +[ ]*[a-f0-9]+:[ ]*62 f2 d5 58 b4 b2 f8 fb ff ff[ ]*vpmadd52luq -0x408\(%edx\)\{1to8\},%zmm5,%zmm6 +[ ]*[a-f0-9]+:[ ]*62 f2 d5 48 b5 f4[ ]*vpmadd52huq %zmm4,%zmm5,%zmm6 +[ ]*[a-f0-9]+:[ ]*62 f2 d5 4f b5 f4[ ]*vpmadd52huq %zmm4,%zmm5,%zmm6\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 f2 d5 cf b5 f4[ ]*vpmadd52huq %zmm4,%zmm5,%zmm6\{%k7\}\{z\} +[ ]*[a-f0-9]+:[ ]*62 f2 d5 48 b5 31[ ]*vpmadd52huq \(%ecx\),%zmm5,%zmm6 +[ ]*[a-f0-9]+:[ ]*62 f2 d5 48 b5 b4 f4 c0 1d fe ff[ ]*vpmadd52huq -0x1e240\(%esp,%esi,8\),%zmm5,%zmm6 +[ ]*[a-f0-9]+:[ ]*62 f2 d5 58 b5 30[ ]*vpmadd52huq \(%eax\)\{1to8\},%zmm5,%zmm6 +[ ]*[a-f0-9]+:[ ]*62 f2 d5 48 b5 72 7f[ ]*vpmadd52huq 0x1fc0\(%edx\),%zmm5,%zmm6 +[ ]*[a-f0-9]+:[ ]*62 f2 d5 48 b5 b2 00 20 00 00[ ]*vpmadd52huq 0x2000\(%edx\),%zmm5,%zmm6 +[ ]*[a-f0-9]+:[ ]*62 f2 d5 48 b5 72 80[ ]*vpmadd52huq -0x2000\(%edx\),%zmm5,%zmm6 +[ ]*[a-f0-9]+:[ ]*62 f2 d5 48 b5 b2 c0 df ff ff[ ]*vpmadd52huq -0x2040\(%edx\),%zmm5,%zmm6 +[ ]*[a-f0-9]+:[ ]*62 f2 d5 58 b5 72 7f[ ]*vpmadd52huq 0x3f8\(%edx\)\{1to8\},%zmm5,%zmm6 +[ ]*[a-f0-9]+:[ ]*62 f2 d5 58 b5 b2 00 04 00 00[ ]*vpmadd52huq 0x400\(%edx\)\{1to8\},%zmm5,%zmm6 +[ ]*[a-f0-9]+:[ ]*62 f2 d5 58 b5 72 80[ ]*vpmadd52huq -0x400\(%edx\)\{1to8\},%zmm5,%zmm6 +[ ]*[a-f0-9]+:[ ]*62 f2 d5 58 b5 b2 f8 fb ff ff[ ]*vpmadd52huq -0x408\(%edx\)\{1to8\},%zmm5,%zmm6 +[ ]*[a-f0-9]+:[ ]*62 f2 d5 48 b4 f4[ ]*vpmadd52luq %zmm4,%zmm5,%zmm6 +[ ]*[a-f0-9]+:[ ]*62 f2 d5 4f b4 f4[ ]*vpmadd52luq %zmm4,%zmm5,%zmm6\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 f2 d5 cf b4 f4[ ]*vpmadd52luq %zmm4,%zmm5,%zmm6\{%k7\}\{z\} +[ ]*[a-f0-9]+:[ ]*62 f2 d5 48 b4 31[ ]*vpmadd52luq \(%ecx\),%zmm5,%zmm6 +[ ]*[a-f0-9]+:[ ]*62 f2 d5 48 b4 b4 f4 c0 1d fe ff[ ]*vpmadd52luq -0x1e240\(%esp,%esi,8\),%zmm5,%zmm6 +[ ]*[a-f0-9]+:[ ]*62 f2 d5 58 b4 30[ ]*vpmadd52luq \(%eax\)\{1to8\},%zmm5,%zmm6 +[ ]*[a-f0-9]+:[ ]*62 f2 d5 48 b4 72 7f[ ]*vpmadd52luq 0x1fc0\(%edx\),%zmm5,%zmm6 +[ ]*[a-f0-9]+:[ ]*62 f2 d5 48 b4 b2 00 20 00 00[ ]*vpmadd52luq 0x2000\(%edx\),%zmm5,%zmm6 +[ ]*[a-f0-9]+:[ ]*62 f2 d5 48 b4 72 80[ ]*vpmadd52luq -0x2000\(%edx\),%zmm5,%zmm6 +[ ]*[a-f0-9]+:[ ]*62 f2 d5 48 b4 b2 c0 df ff ff[ ]*vpmadd52luq -0x2040\(%edx\),%zmm5,%zmm6 +[ ]*[a-f0-9]+:[ ]*62 f2 d5 58 b4 72 7f[ ]*vpmadd52luq 0x3f8\(%edx\)\{1to8\},%zmm5,%zmm6 +[ ]*[a-f0-9]+:[ ]*62 f2 d5 58 b4 b2 00 04 00 00[ ]*vpmadd52luq 0x400\(%edx\)\{1to8\},%zmm5,%zmm6 +[ ]*[a-f0-9]+:[ ]*62 f2 d5 58 b4 72 80[ ]*vpmadd52luq -0x400\(%edx\)\{1to8\},%zmm5,%zmm6 +[ ]*[a-f0-9]+:[ ]*62 f2 d5 58 b4 b2 f8 fb ff ff[ ]*vpmadd52luq -0x408\(%edx\)\{1to8\},%zmm5,%zmm6 +[ ]*[a-f0-9]+:[ ]*62 f2 d5 48 b5 f4[ ]*vpmadd52huq %zmm4,%zmm5,%zmm6 +[ ]*[a-f0-9]+:[ ]*62 f2 d5 4f b5 f4[ ]*vpmadd52huq %zmm4,%zmm5,%zmm6\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 f2 d5 cf b5 f4[ ]*vpmadd52huq %zmm4,%zmm5,%zmm6\{%k7\}\{z\} +[ ]*[a-f0-9]+:[ ]*62 f2 d5 48 b5 31[ ]*vpmadd52huq \(%ecx\),%zmm5,%zmm6 +[ ]*[a-f0-9]+:[ ]*62 f2 d5 48 b5 b4 f4 c0 1d fe ff[ ]*vpmadd52huq -0x1e240\(%esp,%esi,8\),%zmm5,%zmm6 +[ ]*[a-f0-9]+:[ ]*62 f2 d5 58 b5 30[ ]*vpmadd52huq \(%eax\)\{1to8\},%zmm5,%zmm6 +[ ]*[a-f0-9]+:[ ]*62 f2 d5 48 b5 72 7f[ ]*vpmadd52huq 0x1fc0\(%edx\),%zmm5,%zmm6 +[ ]*[a-f0-9]+:[ ]*62 f2 d5 48 b5 b2 00 20 00 00[ ]*vpmadd52huq 0x2000\(%edx\),%zmm5,%zmm6 +[ ]*[a-f0-9]+:[ ]*62 f2 d5 48 b5 72 80[ ]*vpmadd52huq -0x2000\(%edx\),%zmm5,%zmm6 +[ ]*[a-f0-9]+:[ ]*62 f2 d5 48 b5 b2 c0 df ff ff[ ]*vpmadd52huq -0x2040\(%edx\),%zmm5,%zmm6 +[ ]*[a-f0-9]+:[ ]*62 f2 d5 58 b5 72 7f[ ]*vpmadd52huq 0x3f8\(%edx\)\{1to8\},%zmm5,%zmm6 +[ ]*[a-f0-9]+:[ ]*62 f2 d5 58 b5 b2 00 04 00 00[ ]*vpmadd52huq 0x400\(%edx\)\{1to8\},%zmm5,%zmm6 +[ ]*[a-f0-9]+:[ ]*62 f2 d5 58 b5 72 80[ ]*vpmadd52huq -0x400\(%edx\)\{1to8\},%zmm5,%zmm6 +[ ]*[a-f0-9]+:[ ]*62 f2 d5 58 b5 b2 f8 fb ff ff[ ]*vpmadd52huq -0x408\(%edx\)\{1to8\},%zmm5,%zmm6 +#pass diff --git a/gas/testsuite/gas/i386/avx512ifma.s b/gas/testsuite/gas/i386/avx512ifma.s new file mode 100644 index 00000000000..102f6b8c800 --- /dev/null +++ b/gas/testsuite/gas/i386/avx512ifma.s @@ -0,0 +1,63 @@ +# Check 32bit AVX512IFMA instructions + + .allow_index_reg + .text +_start: + vpmadd52luq %zmm4, %zmm5, %zmm6 # AVX512IFMA + vpmadd52luq %zmm4, %zmm5, %zmm6{%k7} # AVX512IFMA + vpmadd52luq %zmm4, %zmm5, %zmm6{%k7}{z} # AVX512IFMA + vpmadd52luq (%ecx), %zmm5, %zmm6 # AVX512IFMA + vpmadd52luq -123456(%esp,%esi,8), %zmm5, %zmm6 # AVX512IFMA + vpmadd52luq (%eax){1to8}, %zmm5, %zmm6 # AVX512IFMA + vpmadd52luq 8128(%edx), %zmm5, %zmm6 # AVX512IFMA Disp8 + vpmadd52luq 8192(%edx), %zmm5, %zmm6 # AVX512IFMA + vpmadd52luq -8192(%edx), %zmm5, %zmm6 # AVX512IFMA Disp8 + vpmadd52luq -8256(%edx), %zmm5, %zmm6 # AVX512IFMA + vpmadd52luq 1016(%edx){1to8}, %zmm5, %zmm6 # AVX512IFMA Disp8 + vpmadd52luq 1024(%edx){1to8}, %zmm5, %zmm6 # AVX512IFMA + vpmadd52luq -1024(%edx){1to8}, %zmm5, %zmm6 # AVX512IFMA Disp8 + vpmadd52luq -1032(%edx){1to8}, %zmm5, %zmm6 # AVX512IFMA + vpmadd52huq %zmm4, %zmm5, %zmm6 # AVX512IFMA + vpmadd52huq %zmm4, %zmm5, %zmm6{%k7} # AVX512IFMA + vpmadd52huq %zmm4, %zmm5, %zmm6{%k7}{z} # AVX512IFMA + vpmadd52huq (%ecx), %zmm5, %zmm6 # AVX512IFMA + vpmadd52huq -123456(%esp,%esi,8), %zmm5, %zmm6 # AVX512IFMA + vpmadd52huq (%eax){1to8}, %zmm5, %zmm6 # AVX512IFMA + vpmadd52huq 8128(%edx), %zmm5, %zmm6 # AVX512IFMA Disp8 + vpmadd52huq 8192(%edx), %zmm5, %zmm6 # AVX512IFMA + vpmadd52huq -8192(%edx), %zmm5, %zmm6 # AVX512IFMA Disp8 + vpmadd52huq -8256(%edx), %zmm5, %zmm6 # AVX512IFMA + vpmadd52huq 1016(%edx){1to8}, %zmm5, %zmm6 # AVX512IFMA Disp8 + vpmadd52huq 1024(%edx){1to8}, %zmm5, %zmm6 # AVX512IFMA + vpmadd52huq -1024(%edx){1to8}, %zmm5, %zmm6 # AVX512IFMA Disp8 + vpmadd52huq -1032(%edx){1to8}, %zmm5, %zmm6 # AVX512IFMA + + .intel_syntax noprefix + vpmadd52luq zmm6, zmm5, zmm4 # AVX512IFMA + vpmadd52luq zmm6{k7}, zmm5, zmm4 # AVX512IFMA + vpmadd52luq zmm6{k7}{z}, zmm5, zmm4 # AVX512IFMA + vpmadd52luq zmm6, zmm5, ZMMWORD PTR [ecx] # AVX512IFMA + vpmadd52luq zmm6, zmm5, ZMMWORD PTR [esp+esi*8-123456] # AVX512IFMA + vpmadd52luq zmm6, zmm5, [eax]{1to8} # AVX512IFMA + vpmadd52luq zmm6, zmm5, ZMMWORD PTR [edx+8128] # AVX512IFMA Disp8 + vpmadd52luq zmm6, zmm5, ZMMWORD PTR [edx+8192] # AVX512IFMA + vpmadd52luq zmm6, zmm5, ZMMWORD PTR [edx-8192] # AVX512IFMA Disp8 + vpmadd52luq zmm6, zmm5, ZMMWORD PTR [edx-8256] # AVX512IFMA + vpmadd52luq zmm6, zmm5, [edx+1016]{1to8} # AVX512IFMA Disp8 + vpmadd52luq zmm6, zmm5, [edx+1024]{1to8} # AVX512IFMA + vpmadd52luq zmm6, zmm5, [edx-1024]{1to8} # AVX512IFMA Disp8 + vpmadd52luq zmm6, zmm5, [edx-1032]{1to8} # AVX512IFMA + vpmadd52huq zmm6, zmm5, zmm4 # AVX512IFMA + vpmadd52huq zmm6{k7}, zmm5, zmm4 # AVX512IFMA + vpmadd52huq zmm6{k7}{z}, zmm5, zmm4 # AVX512IFMA + vpmadd52huq zmm6, zmm5, ZMMWORD PTR [ecx] # AVX512IFMA + vpmadd52huq zmm6, zmm5, ZMMWORD PTR [esp+esi*8-123456] # AVX512IFMA + vpmadd52huq zmm6, zmm5, [eax]{1to8} # AVX512IFMA + vpmadd52huq zmm6, zmm5, ZMMWORD PTR [edx+8128] # AVX512IFMA Disp8 + vpmadd52huq zmm6, zmm5, ZMMWORD PTR [edx+8192] # AVX512IFMA + vpmadd52huq zmm6, zmm5, ZMMWORD PTR [edx-8192] # AVX512IFMA Disp8 + vpmadd52huq zmm6, zmm5, ZMMWORD PTR [edx-8256] # AVX512IFMA + vpmadd52huq zmm6, zmm5, [edx+1016]{1to8} # AVX512IFMA Disp8 + vpmadd52huq zmm6, zmm5, [edx+1024]{1to8} # AVX512IFMA + vpmadd52huq zmm6, zmm5, [edx-1024]{1to8} # AVX512IFMA Disp8 + vpmadd52huq zmm6, zmm5, [edx-1032]{1to8} # AVX512IFMA diff --git a/gas/testsuite/gas/i386/avx512ifma_vl-intel.d b/gas/testsuite/gas/i386/avx512ifma_vl-intel.d new file mode 100644 index 00000000000..7fed4a4b985 --- /dev/null +++ b/gas/testsuite/gas/i386/avx512ifma_vl-intel.d @@ -0,0 +1,116 @@ +#as: +#objdump: -dw -Mintel +#name: i386 AVX512IFMA/VL insns (Intel disassembly) +#source: avx512ifma_vl.s + +.*: +file format .* + + +Disassembly of section \.text: + +00000000 <_start>: +[ ]*[a-f0-9]+:[ ]*62 f2 d5 0f b4 f4[ ]*vpmadd52luq xmm6\{k7\},xmm5,xmm4 +[ ]*[a-f0-9]+:[ ]*62 f2 d5 8f b4 f4[ ]*vpmadd52luq xmm6\{k7\}\{z\},xmm5,xmm4 +[ ]*[a-f0-9]+:[ ]*62 f2 d5 0f b4 31[ ]*vpmadd52luq xmm6\{k7\},xmm5,XMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+:[ ]*62 f2 d5 0f b4 b4 f4 c0 1d fe ff[ ]*vpmadd52luq xmm6\{k7\},xmm5,XMMWORD PTR \[esp\+esi\*8-0x1e240\] +[ ]*[a-f0-9]+:[ ]*62 f2 d5 1f b4 30[ ]*vpmadd52luq xmm6\{k7\},xmm5,QWORD PTR \[eax\]\{1to2\} +[ ]*[a-f0-9]+:[ ]*62 f2 d5 0f b4 72 7f[ ]*vpmadd52luq xmm6\{k7\},xmm5,XMMWORD PTR \[edx\+0x7f0\] +[ ]*[a-f0-9]+:[ ]*62 f2 d5 0f b4 b2 00 08 00 00[ ]*vpmadd52luq xmm6\{k7\},xmm5,XMMWORD PTR \[edx\+0x800\] +[ ]*[a-f0-9]+:[ ]*62 f2 d5 0f b4 72 80[ ]*vpmadd52luq xmm6\{k7\},xmm5,XMMWORD PTR \[edx-0x800\] +[ ]*[a-f0-9]+:[ ]*62 f2 d5 0f b4 b2 f0 f7 ff ff[ ]*vpmadd52luq xmm6\{k7\},xmm5,XMMWORD PTR \[edx-0x810\] +[ ]*[a-f0-9]+:[ ]*62 f2 d5 1f b4 72 7f[ ]*vpmadd52luq xmm6\{k7\},xmm5,QWORD PTR \[edx\+0x3f8\]\{1to2\} +[ ]*[a-f0-9]+:[ ]*62 f2 d5 1f b4 b2 00 04 00 00[ ]*vpmadd52luq xmm6\{k7\},xmm5,QWORD PTR \[edx\+0x400\]\{1to2\} +[ ]*[a-f0-9]+:[ ]*62 f2 d5 1f b4 72 80[ ]*vpmadd52luq xmm6\{k7\},xmm5,QWORD PTR \[edx-0x400\]\{1to2\} +[ ]*[a-f0-9]+:[ ]*62 f2 d5 1f b4 b2 f8 fb ff ff[ ]*vpmadd52luq xmm6\{k7\},xmm5,QWORD PTR \[edx-0x408\]\{1to2\} +[ ]*[a-f0-9]+:[ ]*62 f2 d5 2f b4 f4[ ]*vpmadd52luq ymm6\{k7\},ymm5,ymm4 +[ ]*[a-f0-9]+:[ ]*62 f2 d5 af b4 f4[ ]*vpmadd52luq ymm6\{k7\}\{z\},ymm5,ymm4 +[ ]*[a-f0-9]+:[ ]*62 f2 d5 2f b4 31[ ]*vpmadd52luq ymm6\{k7\},ymm5,YMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+:[ ]*62 f2 d5 2f b4 b4 f4 c0 1d fe ff[ ]*vpmadd52luq ymm6\{k7\},ymm5,YMMWORD PTR \[esp\+esi\*8-0x1e240\] +[ ]*[a-f0-9]+:[ ]*62 f2 d5 3f b4 30[ ]*vpmadd52luq ymm6\{k7\},ymm5,QWORD PTR \[eax\]\{1to4\} +[ ]*[a-f0-9]+:[ ]*62 f2 d5 2f b4 72 7f[ ]*vpmadd52luq ymm6\{k7\},ymm5,YMMWORD PTR \[edx\+0xfe0\] +[ ]*[a-f0-9]+:[ ]*62 f2 d5 2f b4 b2 00 10 00 00[ ]*vpmadd52luq ymm6\{k7\},ymm5,YMMWORD PTR \[edx\+0x1000\] +[ ]*[a-f0-9]+:[ ]*62 f2 d5 2f b4 72 80[ ]*vpmadd52luq ymm6\{k7\},ymm5,YMMWORD PTR \[edx-0x1000\] +[ ]*[a-f0-9]+:[ ]*62 f2 d5 2f b4 b2 e0 ef ff ff[ ]*vpmadd52luq ymm6\{k7\},ymm5,YMMWORD PTR \[edx-0x1020\] +[ ]*[a-f0-9]+:[ ]*62 f2 d5 3f b4 72 7f[ ]*vpmadd52luq ymm6\{k7\},ymm5,QWORD PTR \[edx\+0x3f8\]\{1to4\} +[ ]*[a-f0-9]+:[ ]*62 f2 d5 3f b4 b2 00 04 00 00[ ]*vpmadd52luq ymm6\{k7\},ymm5,QWORD PTR \[edx\+0x400\]\{1to4\} +[ ]*[a-f0-9]+:[ ]*62 f2 d5 3f b4 72 80[ ]*vpmadd52luq ymm6\{k7\},ymm5,QWORD PTR \[edx-0x400\]\{1to4\} +[ ]*[a-f0-9]+:[ ]*62 f2 d5 3f b4 b2 f8 fb ff ff[ ]*vpmadd52luq ymm6\{k7\},ymm5,QWORD PTR \[edx-0x408\]\{1to4\} +[ ]*[a-f0-9]+:[ ]*62 f2 d5 0f b5 f4[ ]*vpmadd52huq xmm6\{k7\},xmm5,xmm4 +[ ]*[a-f0-9]+:[ ]*62 f2 d5 8f b5 f4[ ]*vpmadd52huq xmm6\{k7\}\{z\},xmm5,xmm4 +[ ]*[a-f0-9]+:[ ]*62 f2 d5 0f b5 31[ ]*vpmadd52huq xmm6\{k7\},xmm5,XMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+:[ ]*62 f2 d5 0f b5 b4 f4 c0 1d fe ff[ ]*vpmadd52huq xmm6\{k7\},xmm5,XMMWORD PTR \[esp\+esi\*8-0x1e240\] +[ ]*[a-f0-9]+:[ ]*62 f2 d5 1f b5 30[ ]*vpmadd52huq xmm6\{k7\},xmm5,QWORD PTR \[eax\]\{1to2\} +[ ]*[a-f0-9]+:[ ]*62 f2 d5 0f b5 72 7f[ ]*vpmadd52huq xmm6\{k7\},xmm5,XMMWORD PTR \[edx\+0x7f0\] +[ ]*[a-f0-9]+:[ ]*62 f2 d5 0f b5 b2 00 08 00 00[ ]*vpmadd52huq xmm6\{k7\},xmm5,XMMWORD PTR \[edx\+0x800\] +[ ]*[a-f0-9]+:[ ]*62 f2 d5 0f b5 72 80[ ]*vpmadd52huq xmm6\{k7\},xmm5,XMMWORD PTR \[edx-0x800\] +[ ]*[a-f0-9]+:[ ]*62 f2 d5 0f b5 b2 f0 f7 ff ff[ ]*vpmadd52huq xmm6\{k7\},xmm5,XMMWORD PTR \[edx-0x810\] +[ ]*[a-f0-9]+:[ ]*62 f2 d5 1f b5 72 7f[ ]*vpmadd52huq xmm6\{k7\},xmm5,QWORD PTR \[edx\+0x3f8\]\{1to2\} +[ ]*[a-f0-9]+:[ ]*62 f2 d5 1f b5 b2 00 04 00 00[ ]*vpmadd52huq xmm6\{k7\},xmm5,QWORD PTR \[edx\+0x400\]\{1to2\} +[ ]*[a-f0-9]+:[ ]*62 f2 d5 1f b5 72 80[ ]*vpmadd52huq xmm6\{k7\},xmm5,QWORD PTR \[edx-0x400\]\{1to2\} +[ ]*[a-f0-9]+:[ ]*62 f2 d5 1f b5 b2 f8 fb ff ff[ ]*vpmadd52huq xmm6\{k7\},xmm5,QWORD PTR \[edx-0x408\]\{1to2\} +[ ]*[a-f0-9]+:[ ]*62 f2 d5 2f b5 f4[ ]*vpmadd52huq ymm6\{k7\},ymm5,ymm4 +[ ]*[a-f0-9]+:[ ]*62 f2 d5 af b5 f4[ ]*vpmadd52huq ymm6\{k7\}\{z\},ymm5,ymm4 +[ ]*[a-f0-9]+:[ ]*62 f2 d5 2f b5 31[ ]*vpmadd52huq ymm6\{k7\},ymm5,YMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+:[ ]*62 f2 d5 2f b5 b4 f4 c0 1d fe ff[ ]*vpmadd52huq ymm6\{k7\},ymm5,YMMWORD PTR \[esp\+esi\*8-0x1e240\] +[ ]*[a-f0-9]+:[ ]*62 f2 d5 3f b5 30[ ]*vpmadd52huq ymm6\{k7\},ymm5,QWORD PTR \[eax\]\{1to4\} +[ ]*[a-f0-9]+:[ ]*62 f2 d5 2f b5 72 7f[ ]*vpmadd52huq ymm6\{k7\},ymm5,YMMWORD PTR \[edx\+0xfe0\] +[ ]*[a-f0-9]+:[ ]*62 f2 d5 2f b5 b2 00 10 00 00[ ]*vpmadd52huq ymm6\{k7\},ymm5,YMMWORD PTR \[edx\+0x1000\] +[ ]*[a-f0-9]+:[ ]*62 f2 d5 2f b5 72 80[ ]*vpmadd52huq ymm6\{k7\},ymm5,YMMWORD PTR \[edx-0x1000\] +[ ]*[a-f0-9]+:[ ]*62 f2 d5 2f b5 b2 e0 ef ff ff[ ]*vpmadd52huq ymm6\{k7\},ymm5,YMMWORD PTR \[edx-0x1020\] +[ ]*[a-f0-9]+:[ ]*62 f2 d5 3f b5 72 7f[ ]*vpmadd52huq ymm6\{k7\},ymm5,QWORD PTR \[edx\+0x3f8\]\{1to4\} +[ ]*[a-f0-9]+:[ ]*62 f2 d5 3f b5 b2 00 04 00 00[ ]*vpmadd52huq ymm6\{k7\},ymm5,QWORD PTR \[edx\+0x400\]\{1to4\} +[ ]*[a-f0-9]+:[ ]*62 f2 d5 3f b5 72 80[ ]*vpmadd52huq ymm6\{k7\},ymm5,QWORD PTR \[edx-0x400\]\{1to4\} +[ ]*[a-f0-9]+:[ ]*62 f2 d5 3f b5 b2 f8 fb ff ff[ ]*vpmadd52huq ymm6\{k7\},ymm5,QWORD PTR \[edx-0x408\]\{1to4\} +[ ]*[a-f0-9]+:[ ]*62 f2 d5 0f b4 f4[ ]*vpmadd52luq xmm6\{k7\},xmm5,xmm4 +[ ]*[a-f0-9]+:[ ]*62 f2 d5 8f b4 f4[ ]*vpmadd52luq xmm6\{k7\}\{z\},xmm5,xmm4 +[ ]*[a-f0-9]+:[ ]*62 f2 d5 0f b4 31[ ]*vpmadd52luq xmm6\{k7\},xmm5,XMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+:[ ]*62 f2 d5 0f b4 b4 f4 c0 1d fe ff[ ]*vpmadd52luq xmm6\{k7\},xmm5,XMMWORD PTR \[esp\+esi\*8-0x1e240\] +[ ]*[a-f0-9]+:[ ]*62 f2 d5 1f b4 30[ ]*vpmadd52luq xmm6\{k7\},xmm5,QWORD PTR \[eax\]\{1to2\} +[ ]*[a-f0-9]+:[ ]*62 f2 d5 0f b4 72 7f[ ]*vpmadd52luq xmm6\{k7\},xmm5,XMMWORD PTR \[edx\+0x7f0\] +[ ]*[a-f0-9]+:[ ]*62 f2 d5 0f b4 b2 00 08 00 00[ ]*vpmadd52luq xmm6\{k7\},xmm5,XMMWORD PTR \[edx\+0x800\] +[ ]*[a-f0-9]+:[ ]*62 f2 d5 0f b4 72 80[ ]*vpmadd52luq xmm6\{k7\},xmm5,XMMWORD PTR \[edx-0x800\] +[ ]*[a-f0-9]+:[ ]*62 f2 d5 0f b4 b2 f0 f7 ff ff[ ]*vpmadd52luq xmm6\{k7\},xmm5,XMMWORD PTR \[edx-0x810\] +[ ]*[a-f0-9]+:[ ]*62 f2 d5 1f b4 72 7f[ ]*vpmadd52luq xmm6\{k7\},xmm5,QWORD PTR \[edx\+0x3f8\]\{1to2\} +[ ]*[a-f0-9]+:[ ]*62 f2 d5 1f b4 b2 00 04 00 00[ ]*vpmadd52luq xmm6\{k7\},xmm5,QWORD PTR \[edx\+0x400\]\{1to2\} +[ ]*[a-f0-9]+:[ ]*62 f2 d5 1f b4 72 80[ ]*vpmadd52luq xmm6\{k7\},xmm5,QWORD PTR \[edx-0x400\]\{1to2\} +[ ]*[a-f0-9]+:[ ]*62 f2 d5 1f b4 b2 f8 fb ff ff[ ]*vpmadd52luq xmm6\{k7\},xmm5,QWORD PTR \[edx-0x408\]\{1to2\} +[ ]*[a-f0-9]+:[ ]*62 f2 d5 2f b4 f4[ ]*vpmadd52luq ymm6\{k7\},ymm5,ymm4 +[ ]*[a-f0-9]+:[ ]*62 f2 d5 af b4 f4[ ]*vpmadd52luq ymm6\{k7\}\{z\},ymm5,ymm4 +[ ]*[a-f0-9]+:[ ]*62 f2 d5 2f b4 31[ ]*vpmadd52luq ymm6\{k7\},ymm5,YMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+:[ ]*62 f2 d5 2f b4 b4 f4 c0 1d fe ff[ ]*vpmadd52luq ymm6\{k7\},ymm5,YMMWORD PTR \[esp\+esi\*8-0x1e240\] +[ ]*[a-f0-9]+:[ ]*62 f2 d5 3f b4 30[ ]*vpmadd52luq ymm6\{k7\},ymm5,QWORD PTR \[eax\]\{1to4\} +[ ]*[a-f0-9]+:[ ]*62 f2 d5 2f b4 72 7f[ ]*vpmadd52luq ymm6\{k7\},ymm5,YMMWORD PTR \[edx\+0xfe0\] +[ ]*[a-f0-9]+:[ ]*62 f2 d5 2f b4 b2 00 10 00 00[ ]*vpmadd52luq ymm6\{k7\},ymm5,YMMWORD PTR \[edx\+0x1000\] +[ ]*[a-f0-9]+:[ ]*62 f2 d5 2f b4 72 80[ ]*vpmadd52luq ymm6\{k7\},ymm5,YMMWORD PTR \[edx-0x1000\] +[ ]*[a-f0-9]+:[ ]*62 f2 d5 2f b4 b2 e0 ef ff ff[ ]*vpmadd52luq ymm6\{k7\},ymm5,YMMWORD PTR \[edx-0x1020\] +[ ]*[a-f0-9]+:[ ]*62 f2 d5 3f b4 72 7f[ ]*vpmadd52luq ymm6\{k7\},ymm5,QWORD PTR \[edx\+0x3f8\]\{1to4\} +[ ]*[a-f0-9]+:[ ]*62 f2 d5 3f b4 b2 00 04 00 00[ ]*vpmadd52luq ymm6\{k7\},ymm5,QWORD PTR \[edx\+0x400\]\{1to4\} +[ ]*[a-f0-9]+:[ ]*62 f2 d5 3f b4 72 80[ ]*vpmadd52luq ymm6\{k7\},ymm5,QWORD PTR \[edx-0x400\]\{1to4\} +[ ]*[a-f0-9]+:[ ]*62 f2 d5 3f b4 b2 f8 fb ff ff[ ]*vpmadd52luq ymm6\{k7\},ymm5,QWORD PTR \[edx-0x408\]\{1to4\} +[ ]*[a-f0-9]+:[ ]*62 f2 d5 0f b5 f4[ ]*vpmadd52huq xmm6\{k7\},xmm5,xmm4 +[ ]*[a-f0-9]+:[ ]*62 f2 d5 8f b5 f4[ ]*vpmadd52huq xmm6\{k7\}\{z\},xmm5,xmm4 +[ ]*[a-f0-9]+:[ ]*62 f2 d5 0f b5 31[ ]*vpmadd52huq xmm6\{k7\},xmm5,XMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+:[ ]*62 f2 d5 0f b5 b4 f4 c0 1d fe ff[ ]*vpmadd52huq xmm6\{k7\},xmm5,XMMWORD PTR \[esp\+esi\*8-0x1e240\] +[ ]*[a-f0-9]+:[ ]*62 f2 d5 1f b5 30[ ]*vpmadd52huq xmm6\{k7\},xmm5,QWORD PTR \[eax\]\{1to2\} +[ ]*[a-f0-9]+:[ ]*62 f2 d5 0f b5 72 7f[ ]*vpmadd52huq xmm6\{k7\},xmm5,XMMWORD PTR \[edx\+0x7f0\] +[ ]*[a-f0-9]+:[ ]*62 f2 d5 0f b5 b2 00 08 00 00[ ]*vpmadd52huq xmm6\{k7\},xmm5,XMMWORD PTR \[edx\+0x800\] +[ ]*[a-f0-9]+:[ ]*62 f2 d5 0f b5 72 80[ ]*vpmadd52huq xmm6\{k7\},xmm5,XMMWORD PTR \[edx-0x800\] +[ ]*[a-f0-9]+:[ ]*62 f2 d5 0f b5 b2 f0 f7 ff ff[ ]*vpmadd52huq xmm6\{k7\},xmm5,XMMWORD PTR \[edx-0x810\] +[ ]*[a-f0-9]+:[ ]*62 f2 d5 1f b5 72 7f[ ]*vpmadd52huq xmm6\{k7\},xmm5,QWORD PTR \[edx\+0x3f8\]\{1to2\} +[ ]*[a-f0-9]+:[ ]*62 f2 d5 1f b5 b2 00 04 00 00[ ]*vpmadd52huq xmm6\{k7\},xmm5,QWORD PTR \[edx\+0x400\]\{1to2\} +[ ]*[a-f0-9]+:[ ]*62 f2 d5 1f b5 72 80[ ]*vpmadd52huq xmm6\{k7\},xmm5,QWORD PTR \[edx-0x400\]\{1to2\} +[ ]*[a-f0-9]+:[ ]*62 f2 d5 1f b5 b2 f8 fb ff ff[ ]*vpmadd52huq xmm6\{k7\},xmm5,QWORD PTR \[edx-0x408\]\{1to2\} +[ ]*[a-f0-9]+:[ ]*62 f2 d5 2f b5 f4[ ]*vpmadd52huq ymm6\{k7\},ymm5,ymm4 +[ ]*[a-f0-9]+:[ ]*62 f2 d5 af b5 f4[ ]*vpmadd52huq ymm6\{k7\}\{z\},ymm5,ymm4 +[ ]*[a-f0-9]+:[ ]*62 f2 d5 2f b5 31[ ]*vpmadd52huq ymm6\{k7\},ymm5,YMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+:[ ]*62 f2 d5 2f b5 b4 f4 c0 1d fe ff[ ]*vpmadd52huq ymm6\{k7\},ymm5,YMMWORD PTR \[esp\+esi\*8-0x1e240\] +[ ]*[a-f0-9]+:[ ]*62 f2 d5 3f b5 30[ ]*vpmadd52huq ymm6\{k7\},ymm5,QWORD PTR \[eax\]\{1to4\} +[ ]*[a-f0-9]+:[ ]*62 f2 d5 2f b5 72 7f[ ]*vpmadd52huq ymm6\{k7\},ymm5,YMMWORD PTR \[edx\+0xfe0\] +[ ]*[a-f0-9]+:[ ]*62 f2 d5 2f b5 b2 00 10 00 00[ ]*vpmadd52huq ymm6\{k7\},ymm5,YMMWORD PTR \[edx\+0x1000\] +[ ]*[a-f0-9]+:[ ]*62 f2 d5 2f b5 72 80[ ]*vpmadd52huq ymm6\{k7\},ymm5,YMMWORD PTR \[edx-0x1000\] +[ ]*[a-f0-9]+:[ ]*62 f2 d5 2f b5 b2 e0 ef ff ff[ ]*vpmadd52huq ymm6\{k7\},ymm5,YMMWORD PTR \[edx-0x1020\] +[ ]*[a-f0-9]+:[ ]*62 f2 d5 3f b5 72 7f[ ]*vpmadd52huq ymm6\{k7\},ymm5,QWORD PTR \[edx\+0x3f8\]\{1to4\} +[ ]*[a-f0-9]+:[ ]*62 f2 d5 3f b5 b2 00 04 00 00[ ]*vpmadd52huq ymm6\{k7\},ymm5,QWORD PTR \[edx\+0x400\]\{1to4\} +[ ]*[a-f0-9]+:[ ]*62 f2 d5 3f b5 72 80[ ]*vpmadd52huq ymm6\{k7\},ymm5,QWORD PTR \[edx-0x400\]\{1to4\} +[ ]*[a-f0-9]+:[ ]*62 f2 d5 3f b5 b2 f8 fb ff ff[ ]*vpmadd52huq ymm6\{k7\},ymm5,QWORD PTR \[edx-0x408\]\{1to4\} +#pass diff --git a/gas/testsuite/gas/i386/avx512ifma_vl.d b/gas/testsuite/gas/i386/avx512ifma_vl.d new file mode 100644 index 00000000000..0c16c009993 --- /dev/null +++ b/gas/testsuite/gas/i386/avx512ifma_vl.d @@ -0,0 +1,116 @@ +#as: +#objdump: -dw +#name: i386 AVX512IFMA/VL insns +#source: avx512ifma_vl.s + +.*: +file format .* + + +Disassembly of section \.text: + +00000000 <_start>: +[ ]*[a-f0-9]+:[ ]*62 f2 d5 0f b4 f4[ ]*vpmadd52luq %xmm4,%xmm5,%xmm6\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 f2 d5 8f b4 f4[ ]*vpmadd52luq %xmm4,%xmm5,%xmm6\{%k7\}\{z\} +[ ]*[a-f0-9]+:[ ]*62 f2 d5 0f b4 31[ ]*vpmadd52luq \(%ecx\),%xmm5,%xmm6\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 f2 d5 0f b4 b4 f4 c0 1d fe ff[ ]*vpmadd52luq -0x1e240\(%esp,%esi,8\),%xmm5,%xmm6\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 f2 d5 1f b4 30[ ]*vpmadd52luq \(%eax\)\{1to2\},%xmm5,%xmm6\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 f2 d5 0f b4 72 7f[ ]*vpmadd52luq 0x7f0\(%edx\),%xmm5,%xmm6\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 f2 d5 0f b4 b2 00 08 00 00[ ]*vpmadd52luq 0x800\(%edx\),%xmm5,%xmm6\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 f2 d5 0f b4 72 80[ ]*vpmadd52luq -0x800\(%edx\),%xmm5,%xmm6\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 f2 d5 0f b4 b2 f0 f7 ff ff[ ]*vpmadd52luq -0x810\(%edx\),%xmm5,%xmm6\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 f2 d5 1f b4 72 7f[ ]*vpmadd52luq 0x3f8\(%edx\)\{1to2\},%xmm5,%xmm6\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 f2 d5 1f b4 b2 00 04 00 00[ ]*vpmadd52luq 0x400\(%edx\)\{1to2\},%xmm5,%xmm6\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 f2 d5 1f b4 72 80[ ]*vpmadd52luq -0x400\(%edx\)\{1to2\},%xmm5,%xmm6\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 f2 d5 1f b4 b2 f8 fb ff ff[ ]*vpmadd52luq -0x408\(%edx\)\{1to2\},%xmm5,%xmm6\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 f2 d5 2f b4 f4[ ]*vpmadd52luq %ymm4,%ymm5,%ymm6\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 f2 d5 af b4 f4[ ]*vpmadd52luq %ymm4,%ymm5,%ymm6\{%k7\}\{z\} +[ ]*[a-f0-9]+:[ ]*62 f2 d5 2f b4 31[ ]*vpmadd52luq \(%ecx\),%ymm5,%ymm6\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 f2 d5 2f b4 b4 f4 c0 1d fe ff[ ]*vpmadd52luq -0x1e240\(%esp,%esi,8\),%ymm5,%ymm6\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 f2 d5 3f b4 30[ ]*vpmadd52luq \(%eax\)\{1to4\},%ymm5,%ymm6\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 f2 d5 2f b4 72 7f[ ]*vpmadd52luq 0xfe0\(%edx\),%ymm5,%ymm6\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 f2 d5 2f b4 b2 00 10 00 00[ ]*vpmadd52luq 0x1000\(%edx\),%ymm5,%ymm6\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 f2 d5 2f b4 72 80[ ]*vpmadd52luq -0x1000\(%edx\),%ymm5,%ymm6\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 f2 d5 2f b4 b2 e0 ef ff ff[ ]*vpmadd52luq -0x1020\(%edx\),%ymm5,%ymm6\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 f2 d5 3f b4 72 7f[ ]*vpmadd52luq 0x3f8\(%edx\)\{1to4\},%ymm5,%ymm6\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 f2 d5 3f b4 b2 00 04 00 00[ ]*vpmadd52luq 0x400\(%edx\)\{1to4\},%ymm5,%ymm6\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 f2 d5 3f b4 72 80[ ]*vpmadd52luq -0x400\(%edx\)\{1to4\},%ymm5,%ymm6\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 f2 d5 3f b4 b2 f8 fb ff ff[ ]*vpmadd52luq -0x408\(%edx\)\{1to4\},%ymm5,%ymm6\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 f2 d5 0f b5 f4[ ]*vpmadd52huq %xmm4,%xmm5,%xmm6\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 f2 d5 8f b5 f4[ ]*vpmadd52huq %xmm4,%xmm5,%xmm6\{%k7\}\{z\} +[ ]*[a-f0-9]+:[ ]*62 f2 d5 0f b5 31[ ]*vpmadd52huq \(%ecx\),%xmm5,%xmm6\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 f2 d5 0f b5 b4 f4 c0 1d fe ff[ ]*vpmadd52huq -0x1e240\(%esp,%esi,8\),%xmm5,%xmm6\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 f2 d5 1f b5 30[ ]*vpmadd52huq \(%eax\)\{1to2\},%xmm5,%xmm6\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 f2 d5 0f b5 72 7f[ ]*vpmadd52huq 0x7f0\(%edx\),%xmm5,%xmm6\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 f2 d5 0f b5 b2 00 08 00 00[ ]*vpmadd52huq 0x800\(%edx\),%xmm5,%xmm6\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 f2 d5 0f b5 72 80[ ]*vpmadd52huq -0x800\(%edx\),%xmm5,%xmm6\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 f2 d5 0f b5 b2 f0 f7 ff ff[ ]*vpmadd52huq -0x810\(%edx\),%xmm5,%xmm6\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 f2 d5 1f b5 72 7f[ ]*vpmadd52huq 0x3f8\(%edx\)\{1to2\},%xmm5,%xmm6\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 f2 d5 1f b5 b2 00 04 00 00[ ]*vpmadd52huq 0x400\(%edx\)\{1to2\},%xmm5,%xmm6\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 f2 d5 1f b5 72 80[ ]*vpmadd52huq -0x400\(%edx\)\{1to2\},%xmm5,%xmm6\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 f2 d5 1f b5 b2 f8 fb ff ff[ ]*vpmadd52huq -0x408\(%edx\)\{1to2\},%xmm5,%xmm6\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 f2 d5 2f b5 f4[ ]*vpmadd52huq %ymm4,%ymm5,%ymm6\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 f2 d5 af b5 f4[ ]*vpmadd52huq %ymm4,%ymm5,%ymm6\{%k7\}\{z\} +[ ]*[a-f0-9]+:[ ]*62 f2 d5 2f b5 31[ ]*vpmadd52huq \(%ecx\),%ymm5,%ymm6\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 f2 d5 2f b5 b4 f4 c0 1d fe ff[ ]*vpmadd52huq -0x1e240\(%esp,%esi,8\),%ymm5,%ymm6\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 f2 d5 3f b5 30[ ]*vpmadd52huq \(%eax\)\{1to4\},%ymm5,%ymm6\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 f2 d5 2f b5 72 7f[ ]*vpmadd52huq 0xfe0\(%edx\),%ymm5,%ymm6\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 f2 d5 2f b5 b2 00 10 00 00[ ]*vpmadd52huq 0x1000\(%edx\),%ymm5,%ymm6\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 f2 d5 2f b5 72 80[ ]*vpmadd52huq -0x1000\(%edx\),%ymm5,%ymm6\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 f2 d5 2f b5 b2 e0 ef ff ff[ ]*vpmadd52huq -0x1020\(%edx\),%ymm5,%ymm6\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 f2 d5 3f b5 72 7f[ ]*vpmadd52huq 0x3f8\(%edx\)\{1to4\},%ymm5,%ymm6\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 f2 d5 3f b5 b2 00 04 00 00[ ]*vpmadd52huq 0x400\(%edx\)\{1to4\},%ymm5,%ymm6\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 f2 d5 3f b5 72 80[ ]*vpmadd52huq -0x400\(%edx\)\{1to4\},%ymm5,%ymm6\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 f2 d5 3f b5 b2 f8 fb ff ff[ ]*vpmadd52huq -0x408\(%edx\)\{1to4\},%ymm5,%ymm6\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 f2 d5 0f b4 f4[ ]*vpmadd52luq %xmm4,%xmm5,%xmm6\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 f2 d5 8f b4 f4[ ]*vpmadd52luq %xmm4,%xmm5,%xmm6\{%k7\}\{z\} +[ ]*[a-f0-9]+:[ ]*62 f2 d5 0f b4 31[ ]*vpmadd52luq \(%ecx\),%xmm5,%xmm6\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 f2 d5 0f b4 b4 f4 c0 1d fe ff[ ]*vpmadd52luq -0x1e240\(%esp,%esi,8\),%xmm5,%xmm6\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 f2 d5 1f b4 30[ ]*vpmadd52luq \(%eax\)\{1to2\},%xmm5,%xmm6\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 f2 d5 0f b4 72 7f[ ]*vpmadd52luq 0x7f0\(%edx\),%xmm5,%xmm6\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 f2 d5 0f b4 b2 00 08 00 00[ ]*vpmadd52luq 0x800\(%edx\),%xmm5,%xmm6\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 f2 d5 0f b4 72 80[ ]*vpmadd52luq -0x800\(%edx\),%xmm5,%xmm6\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 f2 d5 0f b4 b2 f0 f7 ff ff[ ]*vpmadd52luq -0x810\(%edx\),%xmm5,%xmm6\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 f2 d5 1f b4 72 7f[ ]*vpmadd52luq 0x3f8\(%edx\)\{1to2\},%xmm5,%xmm6\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 f2 d5 1f b4 b2 00 04 00 00[ ]*vpmadd52luq 0x400\(%edx\)\{1to2\},%xmm5,%xmm6\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 f2 d5 1f b4 72 80[ ]*vpmadd52luq -0x400\(%edx\)\{1to2\},%xmm5,%xmm6\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 f2 d5 1f b4 b2 f8 fb ff ff[ ]*vpmadd52luq -0x408\(%edx\)\{1to2\},%xmm5,%xmm6\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 f2 d5 2f b4 f4[ ]*vpmadd52luq %ymm4,%ymm5,%ymm6\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 f2 d5 af b4 f4[ ]*vpmadd52luq %ymm4,%ymm5,%ymm6\{%k7\}\{z\} +[ ]*[a-f0-9]+:[ ]*62 f2 d5 2f b4 31[ ]*vpmadd52luq \(%ecx\),%ymm5,%ymm6\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 f2 d5 2f b4 b4 f4 c0 1d fe ff[ ]*vpmadd52luq -0x1e240\(%esp,%esi,8\),%ymm5,%ymm6\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 f2 d5 3f b4 30[ ]*vpmadd52luq \(%eax\)\{1to4\},%ymm5,%ymm6\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 f2 d5 2f b4 72 7f[ ]*vpmadd52luq 0xfe0\(%edx\),%ymm5,%ymm6\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 f2 d5 2f b4 b2 00 10 00 00[ ]*vpmadd52luq 0x1000\(%edx\),%ymm5,%ymm6\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 f2 d5 2f b4 72 80[ ]*vpmadd52luq -0x1000\(%edx\),%ymm5,%ymm6\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 f2 d5 2f b4 b2 e0 ef ff ff[ ]*vpmadd52luq -0x1020\(%edx\),%ymm5,%ymm6\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 f2 d5 3f b4 72 7f[ ]*vpmadd52luq 0x3f8\(%edx\)\{1to4\},%ymm5,%ymm6\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 f2 d5 3f b4 b2 00 04 00 00[ ]*vpmadd52luq 0x400\(%edx\)\{1to4\},%ymm5,%ymm6\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 f2 d5 3f b4 72 80[ ]*vpmadd52luq -0x400\(%edx\)\{1to4\},%ymm5,%ymm6\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 f2 d5 3f b4 b2 f8 fb ff ff[ ]*vpmadd52luq -0x408\(%edx\)\{1to4\},%ymm5,%ymm6\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 f2 d5 0f b5 f4[ ]*vpmadd52huq %xmm4,%xmm5,%xmm6\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 f2 d5 8f b5 f4[ ]*vpmadd52huq %xmm4,%xmm5,%xmm6\{%k7\}\{z\} +[ ]*[a-f0-9]+:[ ]*62 f2 d5 0f b5 31[ ]*vpmadd52huq \(%ecx\),%xmm5,%xmm6\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 f2 d5 0f b5 b4 f4 c0 1d fe ff[ ]*vpmadd52huq -0x1e240\(%esp,%esi,8\),%xmm5,%xmm6\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 f2 d5 1f b5 30[ ]*vpmadd52huq \(%eax\)\{1to2\},%xmm5,%xmm6\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 f2 d5 0f b5 72 7f[ ]*vpmadd52huq 0x7f0\(%edx\),%xmm5,%xmm6\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 f2 d5 0f b5 b2 00 08 00 00[ ]*vpmadd52huq 0x800\(%edx\),%xmm5,%xmm6\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 f2 d5 0f b5 72 80[ ]*vpmadd52huq -0x800\(%edx\),%xmm5,%xmm6\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 f2 d5 0f b5 b2 f0 f7 ff ff[ ]*vpmadd52huq -0x810\(%edx\),%xmm5,%xmm6\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 f2 d5 1f b5 72 7f[ ]*vpmadd52huq 0x3f8\(%edx\)\{1to2\},%xmm5,%xmm6\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 f2 d5 1f b5 b2 00 04 00 00[ ]*vpmadd52huq 0x400\(%edx\)\{1to2\},%xmm5,%xmm6\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 f2 d5 1f b5 72 80[ ]*vpmadd52huq -0x400\(%edx\)\{1to2\},%xmm5,%xmm6\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 f2 d5 1f b5 b2 f8 fb ff ff[ ]*vpmadd52huq -0x408\(%edx\)\{1to2\},%xmm5,%xmm6\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 f2 d5 2f b5 f4[ ]*vpmadd52huq %ymm4,%ymm5,%ymm6\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 f2 d5 af b5 f4[ ]*vpmadd52huq %ymm4,%ymm5,%ymm6\{%k7\}\{z\} +[ ]*[a-f0-9]+:[ ]*62 f2 d5 2f b5 31[ ]*vpmadd52huq \(%ecx\),%ymm5,%ymm6\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 f2 d5 2f b5 b4 f4 c0 1d fe ff[ ]*vpmadd52huq -0x1e240\(%esp,%esi,8\),%ymm5,%ymm6\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 f2 d5 3f b5 30[ ]*vpmadd52huq \(%eax\)\{1to4\},%ymm5,%ymm6\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 f2 d5 2f b5 72 7f[ ]*vpmadd52huq 0xfe0\(%edx\),%ymm5,%ymm6\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 f2 d5 2f b5 b2 00 10 00 00[ ]*vpmadd52huq 0x1000\(%edx\),%ymm5,%ymm6\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 f2 d5 2f b5 72 80[ ]*vpmadd52huq -0x1000\(%edx\),%ymm5,%ymm6\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 f2 d5 2f b5 b2 e0 ef ff ff[ ]*vpmadd52huq -0x1020\(%edx\),%ymm5,%ymm6\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 f2 d5 3f b5 72 7f[ ]*vpmadd52huq 0x3f8\(%edx\)\{1to4\},%ymm5,%ymm6\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 f2 d5 3f b5 b2 00 04 00 00[ ]*vpmadd52huq 0x400\(%edx\)\{1to4\},%ymm5,%ymm6\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 f2 d5 3f b5 72 80[ ]*vpmadd52huq -0x400\(%edx\)\{1to4\},%ymm5,%ymm6\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 f2 d5 3f b5 b2 f8 fb ff ff[ ]*vpmadd52huq -0x408\(%edx\)\{1to4\},%ymm5,%ymm6\{%k7\} +#pass diff --git a/gas/testsuite/gas/i386/avx512ifma_vl.s b/gas/testsuite/gas/i386/avx512ifma_vl.s new file mode 100644 index 00000000000..e3dd8d73414 --- /dev/null +++ b/gas/testsuite/gas/i386/avx512ifma_vl.s @@ -0,0 +1,111 @@ +# Check 32bit AVX512{IFMA,VL} instructions + + .allow_index_reg + .text +_start: + vpmadd52luq %xmm4, %xmm5, %xmm6{%k7} # AVX512{IFMA,VL} + vpmadd52luq %xmm4, %xmm5, %xmm6{%k7}{z} # AVX512{IFMA,VL} + vpmadd52luq (%ecx), %xmm5, %xmm6{%k7} # AVX512{IFMA,VL} + vpmadd52luq -123456(%esp,%esi,8), %xmm5, %xmm6{%k7} # AVX512{IFMA,VL} + vpmadd52luq (%eax){1to2}, %xmm5, %xmm6{%k7} # AVX512{IFMA,VL} + vpmadd52luq 2032(%edx), %xmm5, %xmm6{%k7} # AVX512{IFMA,VL} Disp8 + vpmadd52luq 2048(%edx), %xmm5, %xmm6{%k7} # AVX512{IFMA,VL} + vpmadd52luq -2048(%edx), %xmm5, %xmm6{%k7} # AVX512{IFMA,VL} Disp8 + vpmadd52luq -2064(%edx), %xmm5, %xmm6{%k7} # AVX512{IFMA,VL} + vpmadd52luq 1016(%edx){1to2}, %xmm5, %xmm6{%k7} # AVX512{IFMA,VL} Disp8 + vpmadd52luq 1024(%edx){1to2}, %xmm5, %xmm6{%k7} # AVX512{IFMA,VL} + vpmadd52luq -1024(%edx){1to2}, %xmm5, %xmm6{%k7} # AVX512{IFMA,VL} Disp8 + vpmadd52luq -1032(%edx){1to2}, %xmm5, %xmm6{%k7} # AVX512{IFMA,VL} + vpmadd52luq %ymm4, %ymm5, %ymm6{%k7} # AVX512{IFMA,VL} + vpmadd52luq %ymm4, %ymm5, %ymm6{%k7}{z} # AVX512{IFMA,VL} + vpmadd52luq (%ecx), %ymm5, %ymm6{%k7} # AVX512{IFMA,VL} + vpmadd52luq -123456(%esp,%esi,8), %ymm5, %ymm6{%k7} # AVX512{IFMA,VL} + vpmadd52luq (%eax){1to4}, %ymm5, %ymm6{%k7} # AVX512{IFMA,VL} + vpmadd52luq 4064(%edx), %ymm5, %ymm6{%k7} # AVX512{IFMA,VL} Disp8 + vpmadd52luq 4096(%edx), %ymm5, %ymm6{%k7} # AVX512{IFMA,VL} + vpmadd52luq -4096(%edx), %ymm5, %ymm6{%k7} # AVX512{IFMA,VL} Disp8 + vpmadd52luq -4128(%edx), %ymm5, %ymm6{%k7} # AVX512{IFMA,VL} + vpmadd52luq 1016(%edx){1to4}, %ymm5, %ymm6{%k7} # AVX512{IFMA,VL} Disp8 + vpmadd52luq 1024(%edx){1to4}, %ymm5, %ymm6{%k7} # AVX512{IFMA,VL} + vpmadd52luq -1024(%edx){1to4}, %ymm5, %ymm6{%k7} # AVX512{IFMA,VL} Disp8 + vpmadd52luq -1032(%edx){1to4}, %ymm5, %ymm6{%k7} # AVX512{IFMA,VL} + vpmadd52huq %xmm4, %xmm5, %xmm6{%k7} # AVX512{IFMA,VL} + vpmadd52huq %xmm4, %xmm5, %xmm6{%k7}{z} # AVX512{IFMA,VL} + vpmadd52huq (%ecx), %xmm5, %xmm6{%k7} # AVX512{IFMA,VL} + vpmadd52huq -123456(%esp,%esi,8), %xmm5, %xmm6{%k7} # AVX512{IFMA,VL} + vpmadd52huq (%eax){1to2}, %xmm5, %xmm6{%k7} # AVX512{IFMA,VL} + vpmadd52huq 2032(%edx), %xmm5, %xmm6{%k7} # AVX512{IFMA,VL} Disp8 + vpmadd52huq 2048(%edx), %xmm5, %xmm6{%k7} # AVX512{IFMA,VL} + vpmadd52huq -2048(%edx), %xmm5, %xmm6{%k7} # AVX512{IFMA,VL} Disp8 + vpmadd52huq -2064(%edx), %xmm5, %xmm6{%k7} # AVX512{IFMA,VL} + vpmadd52huq 1016(%edx){1to2}, %xmm5, %xmm6{%k7} # AVX512{IFMA,VL} Disp8 + vpmadd52huq 1024(%edx){1to2}, %xmm5, %xmm6{%k7} # AVX512{IFMA,VL} + vpmadd52huq -1024(%edx){1to2}, %xmm5, %xmm6{%k7} # AVX512{IFMA,VL} Disp8 + vpmadd52huq -1032(%edx){1to2}, %xmm5, %xmm6{%k7} # AVX512{IFMA,VL} + vpmadd52huq %ymm4, %ymm5, %ymm6{%k7} # AVX512{IFMA,VL} + vpmadd52huq %ymm4, %ymm5, %ymm6{%k7}{z} # AVX512{IFMA,VL} + vpmadd52huq (%ecx), %ymm5, %ymm6{%k7} # AVX512{IFMA,VL} + vpmadd52huq -123456(%esp,%esi,8), %ymm5, %ymm6{%k7} # AVX512{IFMA,VL} + vpmadd52huq (%eax){1to4}, %ymm5, %ymm6{%k7} # AVX512{IFMA,VL} + vpmadd52huq 4064(%edx), %ymm5, %ymm6{%k7} # AVX512{IFMA,VL} Disp8 + vpmadd52huq 4096(%edx), %ymm5, %ymm6{%k7} # AVX512{IFMA,VL} + vpmadd52huq -4096(%edx), %ymm5, %ymm6{%k7} # AVX512{IFMA,VL} Disp8 + vpmadd52huq -4128(%edx), %ymm5, %ymm6{%k7} # AVX512{IFMA,VL} + vpmadd52huq 1016(%edx){1to4}, %ymm5, %ymm6{%k7} # AVX512{IFMA,VL} Disp8 + vpmadd52huq 1024(%edx){1to4}, %ymm5, %ymm6{%k7} # AVX512{IFMA,VL} + vpmadd52huq -1024(%edx){1to4}, %ymm5, %ymm6{%k7} # AVX512{IFMA,VL} Disp8 + vpmadd52huq -1032(%edx){1to4}, %ymm5, %ymm6{%k7} # AVX512{IFMA,VL} + + .intel_syntax noprefix + vpmadd52luq xmm6{k7}, xmm5, xmm4 # AVX512{IFMA,VL} + vpmadd52luq xmm6{k7}{z}, xmm5, xmm4 # AVX512{IFMA,VL} + vpmadd52luq xmm6{k7}, xmm5, XMMWORD PTR [ecx] # AVX512{IFMA,VL} + vpmadd52luq xmm6{k7}, xmm5, XMMWORD PTR [esp+esi*8-123456] # AVX512{IFMA,VL} + vpmadd52luq xmm6{k7}, xmm5, [eax]{1to2} # AVX512{IFMA,VL} + vpmadd52luq xmm6{k7}, xmm5, XMMWORD PTR [edx+2032] # AVX512{IFMA,VL} Disp8 + vpmadd52luq xmm6{k7}, xmm5, XMMWORD PTR [edx+2048] # AVX512{IFMA,VL} + vpmadd52luq xmm6{k7}, xmm5, XMMWORD PTR [edx-2048] # AVX512{IFMA,VL} Disp8 + vpmadd52luq xmm6{k7}, xmm5, XMMWORD PTR [edx-2064] # AVX512{IFMA,VL} + vpmadd52luq xmm6{k7}, xmm5, [edx+1016]{1to2} # AVX512{IFMA,VL} Disp8 + vpmadd52luq xmm6{k7}, xmm5, [edx+1024]{1to2} # AVX512{IFMA,VL} + vpmadd52luq xmm6{k7}, xmm5, [edx-1024]{1to2} # AVX512{IFMA,VL} Disp8 + vpmadd52luq xmm6{k7}, xmm5, [edx-1032]{1to2} # AVX512{IFMA,VL} + vpmadd52luq ymm6{k7}, ymm5, ymm4 # AVX512{IFMA,VL} + vpmadd52luq ymm6{k7}{z}, ymm5, ymm4 # AVX512{IFMA,VL} + vpmadd52luq ymm6{k7}, ymm5, YMMWORD PTR [ecx] # AVX512{IFMA,VL} + vpmadd52luq ymm6{k7}, ymm5, YMMWORD PTR [esp+esi*8-123456] # AVX512{IFMA,VL} + vpmadd52luq ymm6{k7}, ymm5, [eax]{1to4} # AVX512{IFMA,VL} + vpmadd52luq ymm6{k7}, ymm5, YMMWORD PTR [edx+4064] # AVX512{IFMA,VL} Disp8 + vpmadd52luq ymm6{k7}, ymm5, YMMWORD PTR [edx+4096] # AVX512{IFMA,VL} + vpmadd52luq ymm6{k7}, ymm5, YMMWORD PTR [edx-4096] # AVX512{IFMA,VL} Disp8 + vpmadd52luq ymm6{k7}, ymm5, YMMWORD PTR [edx-4128] # AVX512{IFMA,VL} + vpmadd52luq ymm6{k7}, ymm5, [edx+1016]{1to4} # AVX512{IFMA,VL} Disp8 + vpmadd52luq ymm6{k7}, ymm5, [edx+1024]{1to4} # AVX512{IFMA,VL} + vpmadd52luq ymm6{k7}, ymm5, [edx-1024]{1to4} # AVX512{IFMA,VL} Disp8 + vpmadd52luq ymm6{k7}, ymm5, [edx-1032]{1to4} # AVX512{IFMA,VL} + vpmadd52huq xmm6{k7}, xmm5, xmm4 # AVX512{IFMA,VL} + vpmadd52huq xmm6{k7}{z}, xmm5, xmm4 # AVX512{IFMA,VL} + vpmadd52huq xmm6{k7}, xmm5, XMMWORD PTR [ecx] # AVX512{IFMA,VL} + vpmadd52huq xmm6{k7}, xmm5, XMMWORD PTR [esp+esi*8-123456] # AVX512{IFMA,VL} + vpmadd52huq xmm6{k7}, xmm5, [eax]{1to2} # AVX512{IFMA,VL} + vpmadd52huq xmm6{k7}, xmm5, XMMWORD PTR [edx+2032] # AVX512{IFMA,VL} Disp8 + vpmadd52huq xmm6{k7}, xmm5, XMMWORD PTR [edx+2048] # AVX512{IFMA,VL} + vpmadd52huq xmm6{k7}, xmm5, XMMWORD PTR [edx-2048] # AVX512{IFMA,VL} Disp8 + vpmadd52huq xmm6{k7}, xmm5, XMMWORD PTR [edx-2064] # AVX512{IFMA,VL} + vpmadd52huq xmm6{k7}, xmm5, [edx+1016]{1to2} # AVX512{IFMA,VL} Disp8 + vpmadd52huq xmm6{k7}, xmm5, [edx+1024]{1to2} # AVX512{IFMA,VL} + vpmadd52huq xmm6{k7}, xmm5, [edx-1024]{1to2} # AVX512{IFMA,VL} Disp8 + vpmadd52huq xmm6{k7}, xmm5, [edx-1032]{1to2} # AVX512{IFMA,VL} + vpmadd52huq ymm6{k7}, ymm5, ymm4 # AVX512{IFMA,VL} + vpmadd52huq ymm6{k7}{z}, ymm5, ymm4 # AVX512{IFMA,VL} + vpmadd52huq ymm6{k7}, ymm5, YMMWORD PTR [ecx] # AVX512{IFMA,VL} + vpmadd52huq ymm6{k7}, ymm5, YMMWORD PTR [esp+esi*8-123456] # AVX512{IFMA,VL} + vpmadd52huq ymm6{k7}, ymm5, [eax]{1to4} # AVX512{IFMA,VL} + vpmadd52huq ymm6{k7}, ymm5, YMMWORD PTR [edx+4064] # AVX512{IFMA,VL} Disp8 + vpmadd52huq ymm6{k7}, ymm5, YMMWORD PTR [edx+4096] # AVX512{IFMA,VL} + vpmadd52huq ymm6{k7}, ymm5, YMMWORD PTR [edx-4096] # AVX512{IFMA,VL} Disp8 + vpmadd52huq ymm6{k7}, ymm5, YMMWORD PTR [edx-4128] # AVX512{IFMA,VL} + vpmadd52huq ymm6{k7}, ymm5, [edx+1016]{1to4} # AVX512{IFMA,VL} Disp8 + vpmadd52huq ymm6{k7}, ymm5, [edx+1024]{1to4} # AVX512{IFMA,VL} + vpmadd52huq ymm6{k7}, ymm5, [edx-1024]{1to4} # AVX512{IFMA,VL} Disp8 + vpmadd52huq ymm6{k7}, ymm5, [edx-1032]{1to4} # AVX512{IFMA,VL} diff --git a/gas/testsuite/gas/i386/avx512vbmi-intel.d b/gas/testsuite/gas/i386/avx512vbmi-intel.d new file mode 100644 index 00000000000..78e26bc5a34 --- /dev/null +++ b/gas/testsuite/gas/i386/avx512vbmi-intel.d @@ -0,0 +1,94 @@ +#as: +#objdump: -dw -Mintel +#name: i386 AVX512VBMI insns (Intel disassembly) +#source: avx512vbmi.s + +.*: +file format .* + + +Disassembly of section \.text: + +00000000 <_start>: +[ ]*[a-f0-9]+:[ ]*62 f2 55 48 8d f4[ ]*vpermb zmm6,zmm5,zmm4 +[ ]*[a-f0-9]+:[ ]*62 f2 55 4f 8d f4[ ]*vpermb zmm6\{k7\},zmm5,zmm4 +[ ]*[a-f0-9]+:[ ]*62 f2 55 cf 8d f4[ ]*vpermb zmm6\{k7\}\{z\},zmm5,zmm4 +[ ]*[a-f0-9]+:[ ]*62 f2 55 48 8d 31[ ]*vpermb zmm6,zmm5,ZMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+:[ ]*62 f2 55 48 8d b4 f4 c0 1d fe ff[ ]*vpermb zmm6,zmm5,ZMMWORD PTR \[esp\+esi\*8-0x1e240\] +[ ]*[a-f0-9]+:[ ]*62 f2 55 48 8d 72 7f[ ]*vpermb zmm6,zmm5,ZMMWORD PTR \[edx\+0x1fc0\] +[ ]*[a-f0-9]+:[ ]*62 f2 55 48 8d b2 00 20 00 00[ ]*vpermb zmm6,zmm5,ZMMWORD PTR \[edx\+0x2000\] +[ ]*[a-f0-9]+:[ ]*62 f2 55 48 8d 72 80[ ]*vpermb zmm6,zmm5,ZMMWORD PTR \[edx-0x2000\] +[ ]*[a-f0-9]+:[ ]*62 f2 55 48 8d b2 c0 df ff ff[ ]*vpermb zmm6,zmm5,ZMMWORD PTR \[edx-0x2040\] +[ ]*[a-f0-9]+:[ ]*62 f2 55 48 75 f4[ ]*vpermi2b zmm6,zmm5,zmm4 +[ ]*[a-f0-9]+:[ ]*62 f2 55 4f 75 f4[ ]*vpermi2b zmm6\{k7\},zmm5,zmm4 +[ ]*[a-f0-9]+:[ ]*62 f2 55 cf 75 f4[ ]*vpermi2b zmm6\{k7\}\{z\},zmm5,zmm4 +[ ]*[a-f0-9]+:[ ]*62 f2 55 48 75 31[ ]*vpermi2b zmm6,zmm5,ZMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+:[ ]*62 f2 55 48 75 b4 f4 c0 1d fe ff[ ]*vpermi2b zmm6,zmm5,ZMMWORD PTR \[esp\+esi\*8-0x1e240\] +[ ]*[a-f0-9]+:[ ]*62 f2 55 48 75 72 7f[ ]*vpermi2b zmm6,zmm5,ZMMWORD PTR \[edx\+0x1fc0\] +[ ]*[a-f0-9]+:[ ]*62 f2 55 48 75 b2 00 20 00 00[ ]*vpermi2b zmm6,zmm5,ZMMWORD PTR \[edx\+0x2000\] +[ ]*[a-f0-9]+:[ ]*62 f2 55 48 75 72 80[ ]*vpermi2b zmm6,zmm5,ZMMWORD PTR \[edx-0x2000\] +[ ]*[a-f0-9]+:[ ]*62 f2 55 48 75 b2 c0 df ff ff[ ]*vpermi2b zmm6,zmm5,ZMMWORD PTR \[edx-0x2040\] +[ ]*[a-f0-9]+:[ ]*62 f2 55 48 7d f4[ ]*vpermt2b zmm6,zmm5,zmm4 +[ ]*[a-f0-9]+:[ ]*62 f2 55 4f 7d f4[ ]*vpermt2b zmm6\{k7\},zmm5,zmm4 +[ ]*[a-f0-9]+:[ ]*62 f2 55 cf 7d f4[ ]*vpermt2b zmm6\{k7\}\{z\},zmm5,zmm4 +[ ]*[a-f0-9]+:[ ]*62 f2 55 48 7d 31[ ]*vpermt2b zmm6,zmm5,ZMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+:[ ]*62 f2 55 48 7d b4 f4 c0 1d fe ff[ ]*vpermt2b zmm6,zmm5,ZMMWORD PTR \[esp\+esi\*8-0x1e240\] +[ ]*[a-f0-9]+:[ ]*62 f2 55 48 7d 72 7f[ ]*vpermt2b zmm6,zmm5,ZMMWORD PTR \[edx\+0x1fc0\] +[ ]*[a-f0-9]+:[ ]*62 f2 55 48 7d b2 00 20 00 00[ ]*vpermt2b zmm6,zmm5,ZMMWORD PTR \[edx\+0x2000\] +[ ]*[a-f0-9]+:[ ]*62 f2 55 48 7d 72 80[ ]*vpermt2b zmm6,zmm5,ZMMWORD PTR \[edx-0x2000\] +[ ]*[a-f0-9]+:[ ]*62 f2 55 48 7d b2 c0 df ff ff[ ]*vpermt2b zmm6,zmm5,ZMMWORD PTR \[edx-0x2040\] +[ ]*[a-f0-9]+:[ ]*62 f2 d5 48 83 f4[ ]*vpmultishiftqb zmm6,zmm5,zmm4 +[ ]*[a-f0-9]+:[ ]*62 f2 d5 4f 83 f4[ ]*vpmultishiftqb zmm6\{k7\},zmm5,zmm4 +[ ]*[a-f0-9]+:[ ]*62 f2 d5 cf 83 f4[ ]*vpmultishiftqb zmm6\{k7\}\{z\},zmm5,zmm4 +[ ]*[a-f0-9]+:[ ]*62 f2 d5 48 83 31[ ]*vpmultishiftqb zmm6,zmm5,ZMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+:[ ]*62 f2 d5 48 83 b4 f4 c0 1d fe ff[ ]*vpmultishiftqb zmm6,zmm5,ZMMWORD PTR \[esp\+esi\*8-0x1e240\] +[ ]*[a-f0-9]+:[ ]*62 f2 d5 58 83 30[ ]*vpmultishiftqb zmm6,zmm5,QWORD PTR \[eax\]\{1to8\} +[ ]*[a-f0-9]+:[ ]*62 f2 d5 48 83 72 7f[ ]*vpmultishiftqb zmm6,zmm5,ZMMWORD PTR \[edx\+0x1fc0\] +[ ]*[a-f0-9]+:[ ]*62 f2 d5 48 83 b2 00 20 00 00[ ]*vpmultishiftqb zmm6,zmm5,ZMMWORD PTR \[edx\+0x2000\] +[ ]*[a-f0-9]+:[ ]*62 f2 d5 48 83 72 80[ ]*vpmultishiftqb zmm6,zmm5,ZMMWORD PTR \[edx-0x2000\] +[ ]*[a-f0-9]+:[ ]*62 f2 d5 48 83 b2 c0 df ff ff[ ]*vpmultishiftqb zmm6,zmm5,ZMMWORD PTR \[edx-0x2040\] +[ ]*[a-f0-9]+:[ ]*62 f2 d5 58 83 72 7f[ ]*vpmultishiftqb zmm6,zmm5,QWORD PTR \[edx\+0x3f8\]\{1to8\} +[ ]*[a-f0-9]+:[ ]*62 f2 d5 58 83 b2 00 04 00 00[ ]*vpmultishiftqb zmm6,zmm5,QWORD PTR \[edx\+0x400\]\{1to8\} +[ ]*[a-f0-9]+:[ ]*62 f2 d5 58 83 72 80[ ]*vpmultishiftqb zmm6,zmm5,QWORD PTR \[edx-0x400\]\{1to8\} +[ ]*[a-f0-9]+:[ ]*62 f2 d5 58 83 b2 f8 fb ff ff[ ]*vpmultishiftqb zmm6,zmm5,QWORD PTR \[edx-0x408\]\{1to8\} +[ ]*[a-f0-9]+:[ ]*62 f2 55 48 8d f4[ ]*vpermb zmm6,zmm5,zmm4 +[ ]*[a-f0-9]+:[ ]*62 f2 55 4f 8d f4[ ]*vpermb zmm6\{k7\},zmm5,zmm4 +[ ]*[a-f0-9]+:[ ]*62 f2 55 cf 8d f4[ ]*vpermb zmm6\{k7\}\{z\},zmm5,zmm4 +[ ]*[a-f0-9]+:[ ]*62 f2 55 48 8d 31[ ]*vpermb zmm6,zmm5,ZMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+:[ ]*62 f2 55 48 8d b4 f4 c0 1d fe ff[ ]*vpermb zmm6,zmm5,ZMMWORD PTR \[esp\+esi\*8-0x1e240\] +[ ]*[a-f0-9]+:[ ]*62 f2 55 48 8d 72 7f[ ]*vpermb zmm6,zmm5,ZMMWORD PTR \[edx\+0x1fc0\] +[ ]*[a-f0-9]+:[ ]*62 f2 55 48 8d b2 00 20 00 00[ ]*vpermb zmm6,zmm5,ZMMWORD PTR \[edx\+0x2000\] +[ ]*[a-f0-9]+:[ ]*62 f2 55 48 8d 72 80[ ]*vpermb zmm6,zmm5,ZMMWORD PTR \[edx-0x2000\] +[ ]*[a-f0-9]+:[ ]*62 f2 55 48 8d b2 c0 df ff ff[ ]*vpermb zmm6,zmm5,ZMMWORD PTR \[edx-0x2040\] +[ ]*[a-f0-9]+:[ ]*62 f2 55 48 75 f4[ ]*vpermi2b zmm6,zmm5,zmm4 +[ ]*[a-f0-9]+:[ ]*62 f2 55 4f 75 f4[ ]*vpermi2b zmm6\{k7\},zmm5,zmm4 +[ ]*[a-f0-9]+:[ ]*62 f2 55 cf 75 f4[ ]*vpermi2b zmm6\{k7\}\{z\},zmm5,zmm4 +[ ]*[a-f0-9]+:[ ]*62 f2 55 48 75 31[ ]*vpermi2b zmm6,zmm5,ZMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+:[ ]*62 f2 55 48 75 b4 f4 c0 1d fe ff[ ]*vpermi2b zmm6,zmm5,ZMMWORD PTR \[esp\+esi\*8-0x1e240\] +[ ]*[a-f0-9]+:[ ]*62 f2 55 48 75 72 7f[ ]*vpermi2b zmm6,zmm5,ZMMWORD PTR \[edx\+0x1fc0\] +[ ]*[a-f0-9]+:[ ]*62 f2 55 48 75 b2 00 20 00 00[ ]*vpermi2b zmm6,zmm5,ZMMWORD PTR \[edx\+0x2000\] +[ ]*[a-f0-9]+:[ ]*62 f2 55 48 75 72 80[ ]*vpermi2b zmm6,zmm5,ZMMWORD PTR \[edx-0x2000\] +[ ]*[a-f0-9]+:[ ]*62 f2 55 48 75 b2 c0 df ff ff[ ]*vpermi2b zmm6,zmm5,ZMMWORD PTR \[edx-0x2040\] +[ ]*[a-f0-9]+:[ ]*62 f2 55 48 7d f4[ ]*vpermt2b zmm6,zmm5,zmm4 +[ ]*[a-f0-9]+:[ ]*62 f2 55 4f 7d f4[ ]*vpermt2b zmm6\{k7\},zmm5,zmm4 +[ ]*[a-f0-9]+:[ ]*62 f2 55 cf 7d f4[ ]*vpermt2b zmm6\{k7\}\{z\},zmm5,zmm4 +[ ]*[a-f0-9]+:[ ]*62 f2 55 48 7d 31[ ]*vpermt2b zmm6,zmm5,ZMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+:[ ]*62 f2 55 48 7d b4 f4 c0 1d fe ff[ ]*vpermt2b zmm6,zmm5,ZMMWORD PTR \[esp\+esi\*8-0x1e240\] +[ ]*[a-f0-9]+:[ ]*62 f2 55 48 7d 72 7f[ ]*vpermt2b zmm6,zmm5,ZMMWORD PTR \[edx\+0x1fc0\] +[ ]*[a-f0-9]+:[ ]*62 f2 55 48 7d b2 00 20 00 00[ ]*vpermt2b zmm6,zmm5,ZMMWORD PTR \[edx\+0x2000\] +[ ]*[a-f0-9]+:[ ]*62 f2 55 48 7d 72 80[ ]*vpermt2b zmm6,zmm5,ZMMWORD PTR \[edx-0x2000\] +[ ]*[a-f0-9]+:[ ]*62 f2 55 48 7d b2 c0 df ff ff[ ]*vpermt2b zmm6,zmm5,ZMMWORD PTR \[edx-0x2040\] +[ ]*[a-f0-9]+:[ ]*62 f2 d5 48 83 f4[ ]*vpmultishiftqb zmm6,zmm5,zmm4 +[ ]*[a-f0-9]+:[ ]*62 f2 d5 4f 83 f4[ ]*vpmultishiftqb zmm6\{k7\},zmm5,zmm4 +[ ]*[a-f0-9]+:[ ]*62 f2 d5 cf 83 f4[ ]*vpmultishiftqb zmm6\{k7\}\{z\},zmm5,zmm4 +[ ]*[a-f0-9]+:[ ]*62 f2 d5 48 83 31[ ]*vpmultishiftqb zmm6,zmm5,ZMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+:[ ]*62 f2 d5 48 83 b4 f4 c0 1d fe ff[ ]*vpmultishiftqb zmm6,zmm5,ZMMWORD PTR \[esp\+esi\*8-0x1e240\] +[ ]*[a-f0-9]+:[ ]*62 f2 d5 58 83 30[ ]*vpmultishiftqb zmm6,zmm5,QWORD PTR \[eax\]\{1to8\} +[ ]*[a-f0-9]+:[ ]*62 f2 d5 48 83 72 7f[ ]*vpmultishiftqb zmm6,zmm5,ZMMWORD PTR \[edx\+0x1fc0\] +[ ]*[a-f0-9]+:[ ]*62 f2 d5 48 83 b2 00 20 00 00[ ]*vpmultishiftqb zmm6,zmm5,ZMMWORD PTR \[edx\+0x2000\] +[ ]*[a-f0-9]+:[ ]*62 f2 d5 48 83 72 80[ ]*vpmultishiftqb zmm6,zmm5,ZMMWORD PTR \[edx-0x2000\] +[ ]*[a-f0-9]+:[ ]*62 f2 d5 48 83 b2 c0 df ff ff[ ]*vpmultishiftqb zmm6,zmm5,ZMMWORD PTR \[edx-0x2040\] +[ ]*[a-f0-9]+:[ ]*62 f2 d5 58 83 72 7f[ ]*vpmultishiftqb zmm6,zmm5,QWORD PTR \[edx\+0x3f8\]\{1to8\} +[ ]*[a-f0-9]+:[ ]*62 f2 d5 58 83 b2 00 04 00 00[ ]*vpmultishiftqb zmm6,zmm5,QWORD PTR \[edx\+0x400\]\{1to8\} +[ ]*[a-f0-9]+:[ ]*62 f2 d5 58 83 72 80[ ]*vpmultishiftqb zmm6,zmm5,QWORD PTR \[edx-0x400\]\{1to8\} +[ ]*[a-f0-9]+:[ ]*62 f2 d5 58 83 b2 f8 fb ff ff[ ]*vpmultishiftqb zmm6,zmm5,QWORD PTR \[edx-0x408\]\{1to8\} +#pass diff --git a/gas/testsuite/gas/i386/avx512vbmi.d b/gas/testsuite/gas/i386/avx512vbmi.d new file mode 100644 index 00000000000..2d23cd56e3c --- /dev/null +++ b/gas/testsuite/gas/i386/avx512vbmi.d @@ -0,0 +1,94 @@ +#as: +#objdump: -dw +#name: i386 AVX512VBMI insns +#source: avx512vbmi.s + +.*: +file format .* + + +Disassembly of section \.text: + +00000000 <_start>: +[ ]*[a-f0-9]+:[ ]*62 f2 55 48 8d f4[ ]*vpermb %zmm4,%zmm5,%zmm6 +[ ]*[a-f0-9]+:[ ]*62 f2 55 4f 8d f4[ ]*vpermb %zmm4,%zmm5,%zmm6\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 f2 55 cf 8d f4[ ]*vpermb %zmm4,%zmm5,%zmm6\{%k7\}\{z\} +[ ]*[a-f0-9]+:[ ]*62 f2 55 48 8d 31[ ]*vpermb \(%ecx\),%zmm5,%zmm6 +[ ]*[a-f0-9]+:[ ]*62 f2 55 48 8d b4 f4 c0 1d fe ff[ ]*vpermb -0x1e240\(%esp,%esi,8\),%zmm5,%zmm6 +[ ]*[a-f0-9]+:[ ]*62 f2 55 48 8d 72 7f[ ]*vpermb 0x1fc0\(%edx\),%zmm5,%zmm6 +[ ]*[a-f0-9]+:[ ]*62 f2 55 48 8d b2 00 20 00 00[ ]*vpermb 0x2000\(%edx\),%zmm5,%zmm6 +[ ]*[a-f0-9]+:[ ]*62 f2 55 48 8d 72 80[ ]*vpermb -0x2000\(%edx\),%zmm5,%zmm6 +[ ]*[a-f0-9]+:[ ]*62 f2 55 48 8d b2 c0 df ff ff[ ]*vpermb -0x2040\(%edx\),%zmm5,%zmm6 +[ ]*[a-f0-9]+:[ ]*62 f2 55 48 75 f4[ ]*vpermi2b %zmm4,%zmm5,%zmm6 +[ ]*[a-f0-9]+:[ ]*62 f2 55 4f 75 f4[ ]*vpermi2b %zmm4,%zmm5,%zmm6\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 f2 55 cf 75 f4[ ]*vpermi2b %zmm4,%zmm5,%zmm6\{%k7\}\{z\} +[ ]*[a-f0-9]+:[ ]*62 f2 55 48 75 31[ ]*vpermi2b \(%ecx\),%zmm5,%zmm6 +[ ]*[a-f0-9]+:[ ]*62 f2 55 48 75 b4 f4 c0 1d fe ff[ ]*vpermi2b -0x1e240\(%esp,%esi,8\),%zmm5,%zmm6 +[ ]*[a-f0-9]+:[ ]*62 f2 55 48 75 72 7f[ ]*vpermi2b 0x1fc0\(%edx\),%zmm5,%zmm6 +[ ]*[a-f0-9]+:[ ]*62 f2 55 48 75 b2 00 20 00 00[ ]*vpermi2b 0x2000\(%edx\),%zmm5,%zmm6 +[ ]*[a-f0-9]+:[ ]*62 f2 55 48 75 72 80[ ]*vpermi2b -0x2000\(%edx\),%zmm5,%zmm6 +[ ]*[a-f0-9]+:[ ]*62 f2 55 48 75 b2 c0 df ff ff[ ]*vpermi2b -0x2040\(%edx\),%zmm5,%zmm6 +[ ]*[a-f0-9]+:[ ]*62 f2 55 48 7d f4[ ]*vpermt2b %zmm4,%zmm5,%zmm6 +[ ]*[a-f0-9]+:[ ]*62 f2 55 4f 7d f4[ ]*vpermt2b %zmm4,%zmm5,%zmm6\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 f2 55 cf 7d f4[ ]*vpermt2b %zmm4,%zmm5,%zmm6\{%k7\}\{z\} +[ ]*[a-f0-9]+:[ ]*62 f2 55 48 7d 31[ ]*vpermt2b \(%ecx\),%zmm5,%zmm6 +[ ]*[a-f0-9]+:[ ]*62 f2 55 48 7d b4 f4 c0 1d fe ff[ ]*vpermt2b -0x1e240\(%esp,%esi,8\),%zmm5,%zmm6 +[ ]*[a-f0-9]+:[ ]*62 f2 55 48 7d 72 7f[ ]*vpermt2b 0x1fc0\(%edx\),%zmm5,%zmm6 +[ ]*[a-f0-9]+:[ ]*62 f2 55 48 7d b2 00 20 00 00[ ]*vpermt2b 0x2000\(%edx\),%zmm5,%zmm6 +[ ]*[a-f0-9]+:[ ]*62 f2 55 48 7d 72 80[ ]*vpermt2b -0x2000\(%edx\),%zmm5,%zmm6 +[ ]*[a-f0-9]+:[ ]*62 f2 55 48 7d b2 c0 df ff ff[ ]*vpermt2b -0x2040\(%edx\),%zmm5,%zmm6 +[ ]*[a-f0-9]+:[ ]*62 f2 d5 48 83 f4[ ]*vpmultishiftqb %zmm4,%zmm5,%zmm6 +[ ]*[a-f0-9]+:[ ]*62 f2 d5 4f 83 f4[ ]*vpmultishiftqb %zmm4,%zmm5,%zmm6\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 f2 d5 cf 83 f4[ ]*vpmultishiftqb %zmm4,%zmm5,%zmm6\{%k7\}\{z\} +[ ]*[a-f0-9]+:[ ]*62 f2 d5 48 83 31[ ]*vpmultishiftqb \(%ecx\),%zmm5,%zmm6 +[ ]*[a-f0-9]+:[ ]*62 f2 d5 48 83 b4 f4 c0 1d fe ff[ ]*vpmultishiftqb -0x1e240\(%esp,%esi,8\),%zmm5,%zmm6 +[ ]*[a-f0-9]+:[ ]*62 f2 d5 58 83 30[ ]*vpmultishiftqb \(%eax\)\{1to8\},%zmm5,%zmm6 +[ ]*[a-f0-9]+:[ ]*62 f2 d5 48 83 72 7f[ ]*vpmultishiftqb 0x1fc0\(%edx\),%zmm5,%zmm6 +[ ]*[a-f0-9]+:[ ]*62 f2 d5 48 83 b2 00 20 00 00[ ]*vpmultishiftqb 0x2000\(%edx\),%zmm5,%zmm6 +[ ]*[a-f0-9]+:[ ]*62 f2 d5 48 83 72 80[ ]*vpmultishiftqb -0x2000\(%edx\),%zmm5,%zmm6 +[ ]*[a-f0-9]+:[ ]*62 f2 d5 48 83 b2 c0 df ff ff[ ]*vpmultishiftqb -0x2040\(%edx\),%zmm5,%zmm6 +[ ]*[a-f0-9]+:[ ]*62 f2 d5 58 83 72 7f[ ]*vpmultishiftqb 0x3f8\(%edx\)\{1to8\},%zmm5,%zmm6 +[ ]*[a-f0-9]+:[ ]*62 f2 d5 58 83 b2 00 04 00 00[ ]*vpmultishiftqb 0x400\(%edx\)\{1to8\},%zmm5,%zmm6 +[ ]*[a-f0-9]+:[ ]*62 f2 d5 58 83 72 80[ ]*vpmultishiftqb -0x400\(%edx\)\{1to8\},%zmm5,%zmm6 +[ ]*[a-f0-9]+:[ ]*62 f2 d5 58 83 b2 f8 fb ff ff[ ]*vpmultishiftqb -0x408\(%edx\)\{1to8\},%zmm5,%zmm6 +[ ]*[a-f0-9]+:[ ]*62 f2 55 48 8d f4[ ]*vpermb %zmm4,%zmm5,%zmm6 +[ ]*[a-f0-9]+:[ ]*62 f2 55 4f 8d f4[ ]*vpermb %zmm4,%zmm5,%zmm6\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 f2 55 cf 8d f4[ ]*vpermb %zmm4,%zmm5,%zmm6\{%k7\}\{z\} +[ ]*[a-f0-9]+:[ ]*62 f2 55 48 8d 31[ ]*vpermb \(%ecx\),%zmm5,%zmm6 +[ ]*[a-f0-9]+:[ ]*62 f2 55 48 8d b4 f4 c0 1d fe ff[ ]*vpermb -0x1e240\(%esp,%esi,8\),%zmm5,%zmm6 +[ ]*[a-f0-9]+:[ ]*62 f2 55 48 8d 72 7f[ ]*vpermb 0x1fc0\(%edx\),%zmm5,%zmm6 +[ ]*[a-f0-9]+:[ ]*62 f2 55 48 8d b2 00 20 00 00[ ]*vpermb 0x2000\(%edx\),%zmm5,%zmm6 +[ ]*[a-f0-9]+:[ ]*62 f2 55 48 8d 72 80[ ]*vpermb -0x2000\(%edx\),%zmm5,%zmm6 +[ ]*[a-f0-9]+:[ ]*62 f2 55 48 8d b2 c0 df ff ff[ ]*vpermb -0x2040\(%edx\),%zmm5,%zmm6 +[ ]*[a-f0-9]+:[ ]*62 f2 55 48 75 f4[ ]*vpermi2b %zmm4,%zmm5,%zmm6 +[ ]*[a-f0-9]+:[ ]*62 f2 55 4f 75 f4[ ]*vpermi2b %zmm4,%zmm5,%zmm6\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 f2 55 cf 75 f4[ ]*vpermi2b %zmm4,%zmm5,%zmm6\{%k7\}\{z\} +[ ]*[a-f0-9]+:[ ]*62 f2 55 48 75 31[ ]*vpermi2b \(%ecx\),%zmm5,%zmm6 +[ ]*[a-f0-9]+:[ ]*62 f2 55 48 75 b4 f4 c0 1d fe ff[ ]*vpermi2b -0x1e240\(%esp,%esi,8\),%zmm5,%zmm6 +[ ]*[a-f0-9]+:[ ]*62 f2 55 48 75 72 7f[ ]*vpermi2b 0x1fc0\(%edx\),%zmm5,%zmm6 +[ ]*[a-f0-9]+:[ ]*62 f2 55 48 75 b2 00 20 00 00[ ]*vpermi2b 0x2000\(%edx\),%zmm5,%zmm6 +[ ]*[a-f0-9]+:[ ]*62 f2 55 48 75 72 80[ ]*vpermi2b -0x2000\(%edx\),%zmm5,%zmm6 +[ ]*[a-f0-9]+:[ ]*62 f2 55 48 75 b2 c0 df ff ff[ ]*vpermi2b -0x2040\(%edx\),%zmm5,%zmm6 +[ ]*[a-f0-9]+:[ ]*62 f2 55 48 7d f4[ ]*vpermt2b %zmm4,%zmm5,%zmm6 +[ ]*[a-f0-9]+:[ ]*62 f2 55 4f 7d f4[ ]*vpermt2b %zmm4,%zmm5,%zmm6\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 f2 55 cf 7d f4[ ]*vpermt2b %zmm4,%zmm5,%zmm6\{%k7\}\{z\} +[ ]*[a-f0-9]+:[ ]*62 f2 55 48 7d 31[ ]*vpermt2b \(%ecx\),%zmm5,%zmm6 +[ ]*[a-f0-9]+:[ ]*62 f2 55 48 7d b4 f4 c0 1d fe ff[ ]*vpermt2b -0x1e240\(%esp,%esi,8\),%zmm5,%zmm6 +[ ]*[a-f0-9]+:[ ]*62 f2 55 48 7d 72 7f[ ]*vpermt2b 0x1fc0\(%edx\),%zmm5,%zmm6 +[ ]*[a-f0-9]+:[ ]*62 f2 55 48 7d b2 00 20 00 00[ ]*vpermt2b 0x2000\(%edx\),%zmm5,%zmm6 +[ ]*[a-f0-9]+:[ ]*62 f2 55 48 7d 72 80[ ]*vpermt2b -0x2000\(%edx\),%zmm5,%zmm6 +[ ]*[a-f0-9]+:[ ]*62 f2 55 48 7d b2 c0 df ff ff[ ]*vpermt2b -0x2040\(%edx\),%zmm5,%zmm6 +[ ]*[a-f0-9]+:[ ]*62 f2 d5 48 83 f4[ ]*vpmultishiftqb %zmm4,%zmm5,%zmm6 +[ ]*[a-f0-9]+:[ ]*62 f2 d5 4f 83 f4[ ]*vpmultishiftqb %zmm4,%zmm5,%zmm6\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 f2 d5 cf 83 f4[ ]*vpmultishiftqb %zmm4,%zmm5,%zmm6\{%k7\}\{z\} +[ ]*[a-f0-9]+:[ ]*62 f2 d5 48 83 31[ ]*vpmultishiftqb \(%ecx\),%zmm5,%zmm6 +[ ]*[a-f0-9]+:[ ]*62 f2 d5 48 83 b4 f4 c0 1d fe ff[ ]*vpmultishiftqb -0x1e240\(%esp,%esi,8\),%zmm5,%zmm6 +[ ]*[a-f0-9]+:[ ]*62 f2 d5 58 83 30[ ]*vpmultishiftqb \(%eax\)\{1to8\},%zmm5,%zmm6 +[ ]*[a-f0-9]+:[ ]*62 f2 d5 48 83 72 7f[ ]*vpmultishiftqb 0x1fc0\(%edx\),%zmm5,%zmm6 +[ ]*[a-f0-9]+:[ ]*62 f2 d5 48 83 b2 00 20 00 00[ ]*vpmultishiftqb 0x2000\(%edx\),%zmm5,%zmm6 +[ ]*[a-f0-9]+:[ ]*62 f2 d5 48 83 72 80[ ]*vpmultishiftqb -0x2000\(%edx\),%zmm5,%zmm6 +[ ]*[a-f0-9]+:[ ]*62 f2 d5 48 83 b2 c0 df ff ff[ ]*vpmultishiftqb -0x2040\(%edx\),%zmm5,%zmm6 +[ ]*[a-f0-9]+:[ ]*62 f2 d5 58 83 72 7f[ ]*vpmultishiftqb 0x3f8\(%edx\)\{1to8\},%zmm5,%zmm6 +[ ]*[a-f0-9]+:[ ]*62 f2 d5 58 83 b2 00 04 00 00[ ]*vpmultishiftqb 0x400\(%edx\)\{1to8\},%zmm5,%zmm6 +[ ]*[a-f0-9]+:[ ]*62 f2 d5 58 83 72 80[ ]*vpmultishiftqb -0x400\(%edx\)\{1to8\},%zmm5,%zmm6 +[ ]*[a-f0-9]+:[ ]*62 f2 d5 58 83 b2 f8 fb ff ff[ ]*vpmultishiftqb -0x408\(%edx\)\{1to8\},%zmm5,%zmm6 +#pass diff --git a/gas/testsuite/gas/i386/avx512vbmi.s b/gas/testsuite/gas/i386/avx512vbmi.s new file mode 100644 index 00000000000..0e6eb06610d --- /dev/null +++ b/gas/testsuite/gas/i386/avx512vbmi.s @@ -0,0 +1,89 @@ +# Check 32bit AVX512VBMI instructions + + .allow_index_reg + .text +_start: + vpermb %zmm4, %zmm5, %zmm6 # AVX512VBMI + vpermb %zmm4, %zmm5, %zmm6{%k7} # AVX512VBMI + vpermb %zmm4, %zmm5, %zmm6{%k7}{z} # AVX512VBMI + vpermb (%ecx), %zmm5, %zmm6 # AVX512VBMI + vpermb -123456(%esp,%esi,8), %zmm5, %zmm6 # AVX512VBMI + vpermb 8128(%edx), %zmm5, %zmm6 # AVX512VBMI Disp8 + vpermb 8192(%edx), %zmm5, %zmm6 # AVX512VBMI + vpermb -8192(%edx), %zmm5, %zmm6 # AVX512VBMI Disp8 + vpermb -8256(%edx), %zmm5, %zmm6 # AVX512VBMI + vpermi2b %zmm4, %zmm5, %zmm6 # AVX512VBMI + vpermi2b %zmm4, %zmm5, %zmm6{%k7} # AVX512VBMI + vpermi2b %zmm4, %zmm5, %zmm6{%k7}{z} # AVX512VBMI + vpermi2b (%ecx), %zmm5, %zmm6 # AVX512VBMI + vpermi2b -123456(%esp,%esi,8), %zmm5, %zmm6 # AVX512VBMI + vpermi2b 8128(%edx), %zmm5, %zmm6 # AVX512VBMI Disp8 + vpermi2b 8192(%edx), %zmm5, %zmm6 # AVX512VBMI + vpermi2b -8192(%edx), %zmm5, %zmm6 # AVX512VBMI Disp8 + vpermi2b -8256(%edx), %zmm5, %zmm6 # AVX512VBMI + vpermt2b %zmm4, %zmm5, %zmm6 # AVX512VBMI + vpermt2b %zmm4, %zmm5, %zmm6{%k7} # AVX512VBMI + vpermt2b %zmm4, %zmm5, %zmm6{%k7}{z} # AVX512VBMI + vpermt2b (%ecx), %zmm5, %zmm6 # AVX512VBMI + vpermt2b -123456(%esp,%esi,8), %zmm5, %zmm6 # AVX512VBMI + vpermt2b 8128(%edx), %zmm5, %zmm6 # AVX512VBMI Disp8 + vpermt2b 8192(%edx), %zmm5, %zmm6 # AVX512VBMI + vpermt2b -8192(%edx), %zmm5, %zmm6 # AVX512VBMI Disp8 + vpermt2b -8256(%edx), %zmm5, %zmm6 # AVX512VBMI + vpmultishiftqb %zmm4, %zmm5, %zmm6 # AVX512VBMI + vpmultishiftqb %zmm4, %zmm5, %zmm6{%k7} # AVX512VBMI + vpmultishiftqb %zmm4, %zmm5, %zmm6{%k7}{z} # AVX512VBMI + vpmultishiftqb (%ecx), %zmm5, %zmm6 # AVX512VBMI + vpmultishiftqb -123456(%esp,%esi,8), %zmm5, %zmm6 # AVX512VBMI + vpmultishiftqb (%eax){1to8}, %zmm5, %zmm6 # AVX512VBMI + vpmultishiftqb 8128(%edx), %zmm5, %zmm6 # AVX512VBMI Disp8 + vpmultishiftqb 8192(%edx), %zmm5, %zmm6 # AVX512VBMI + vpmultishiftqb -8192(%edx), %zmm5, %zmm6 # AVX512VBMI Disp8 + vpmultishiftqb -8256(%edx), %zmm5, %zmm6 # AVX512VBMI + vpmultishiftqb 1016(%edx){1to8}, %zmm5, %zmm6 # AVX512VBMI Disp8 + vpmultishiftqb 1024(%edx){1to8}, %zmm5, %zmm6 # AVX512VBMI + vpmultishiftqb -1024(%edx){1to8}, %zmm5, %zmm6 # AVX512VBMI Disp8 + vpmultishiftqb -1032(%edx){1to8}, %zmm5, %zmm6 # AVX512VBMI + + .intel_syntax noprefix + vpermb zmm6, zmm5, zmm4 # AVX512VBMI + vpermb zmm6{k7}, zmm5, zmm4 # AVX512VBMI + vpermb zmm6{k7}{z}, zmm5, zmm4 # AVX512VBMI + vpermb zmm6, zmm5, ZMMWORD PTR [ecx] # AVX512VBMI + vpermb zmm6, zmm5, ZMMWORD PTR [esp+esi*8-123456] # AVX512VBMI + vpermb zmm6, zmm5, ZMMWORD PTR [edx+8128] # AVX512VBMI Disp8 + vpermb zmm6, zmm5, ZMMWORD PTR [edx+8192] # AVX512VBMI + vpermb zmm6, zmm5, ZMMWORD PTR [edx-8192] # AVX512VBMI Disp8 + vpermb zmm6, zmm5, ZMMWORD PTR [edx-8256] # AVX512VBMI + vpermi2b zmm6, zmm5, zmm4 # AVX512VBMI + vpermi2b zmm6{k7}, zmm5, zmm4 # AVX512VBMI + vpermi2b zmm6{k7}{z}, zmm5, zmm4 # AVX512VBMI + vpermi2b zmm6, zmm5, ZMMWORD PTR [ecx] # AVX512VBMI + vpermi2b zmm6, zmm5, ZMMWORD PTR [esp+esi*8-123456] # AVX512VBMI + vpermi2b zmm6, zmm5, ZMMWORD PTR [edx+8128] # AVX512VBMI Disp8 + vpermi2b zmm6, zmm5, ZMMWORD PTR [edx+8192] # AVX512VBMI + vpermi2b zmm6, zmm5, ZMMWORD PTR [edx-8192] # AVX512VBMI Disp8 + vpermi2b zmm6, zmm5, ZMMWORD PTR [edx-8256] # AVX512VBMI + vpermt2b zmm6, zmm5, zmm4 # AVX512VBMI + vpermt2b zmm6{k7}, zmm5, zmm4 # AVX512VBMI + vpermt2b zmm6{k7}{z}, zmm5, zmm4 # AVX512VBMI + vpermt2b zmm6, zmm5, ZMMWORD PTR [ecx] # AVX512VBMI + vpermt2b zmm6, zmm5, ZMMWORD PTR [esp+esi*8-123456] # AVX512VBMI + vpermt2b zmm6, zmm5, ZMMWORD PTR [edx+8128] # AVX512VBMI Disp8 + vpermt2b zmm6, zmm5, ZMMWORD PTR [edx+8192] # AVX512VBMI + vpermt2b zmm6, zmm5, ZMMWORD PTR [edx-8192] # AVX512VBMI Disp8 + vpermt2b zmm6, zmm5, ZMMWORD PTR [edx-8256] # AVX512VBMI + vpmultishiftqb zmm6, zmm5, zmm4 # AVX512VBMI + vpmultishiftqb zmm6{k7}, zmm5, zmm4 # AVX512VBMI + vpmultishiftqb zmm6{k7}{z}, zmm5, zmm4 # AVX512VBMI + vpmultishiftqb zmm6, zmm5, ZMMWORD PTR [ecx] # AVX512VBMI + vpmultishiftqb zmm6, zmm5, ZMMWORD PTR [esp+esi*8-123456] # AVX512VBMI + vpmultishiftqb zmm6, zmm5, [eax]{1to8} # AVX512VBMI + vpmultishiftqb zmm6, zmm5, ZMMWORD PTR [edx+8128] # AVX512VBMI Disp8 + vpmultishiftqb zmm6, zmm5, ZMMWORD PTR [edx+8192] # AVX512VBMI + vpmultishiftqb zmm6, zmm5, ZMMWORD PTR [edx-8192] # AVX512VBMI Disp8 + vpmultishiftqb zmm6, zmm5, ZMMWORD PTR [edx-8256] # AVX512VBMI + vpmultishiftqb zmm6, zmm5, [edx+1016]{1to8} # AVX512VBMI Disp8 + vpmultishiftqb zmm6, zmm5, [edx+1024]{1to8} # AVX512VBMI + vpmultishiftqb zmm6, zmm5, [edx-1024]{1to8} # AVX512VBMI Disp8 + vpmultishiftqb zmm6, zmm5, [edx-1032]{1to8} # AVX512VBMI diff --git a/gas/testsuite/gas/i386/avx512vbmi_vl-intel.d b/gas/testsuite/gas/i386/avx512vbmi_vl-intel.d new file mode 100644 index 00000000000..cd552382798 --- /dev/null +++ b/gas/testsuite/gas/i386/avx512vbmi_vl-intel.d @@ -0,0 +1,160 @@ +#as: +#objdump: -dw -Mintel +#name: i386 AVX512VBMI/VL insns (Intel disassembly) +#source: avx512vbmi_vl.s + +.*: +file format .* + + +Disassembly of section \.text: + +00000000 <_start>: +[ ]*[a-f0-9]+:[ ]*62 f2 55 0f 8d f4[ ]*vpermb xmm6\{k7\},xmm5,xmm4 +[ ]*[a-f0-9]+:[ ]*62 f2 55 8f 8d f4[ ]*vpermb xmm6\{k7\}\{z\},xmm5,xmm4 +[ ]*[a-f0-9]+:[ ]*62 f2 55 0f 8d 31[ ]*vpermb xmm6\{k7\},xmm5,XMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+:[ ]*62 f2 55 0f 8d b4 f4 c0 1d fe ff[ ]*vpermb xmm6\{k7\},xmm5,XMMWORD PTR \[esp\+esi\*8-0x1e240\] +[ ]*[a-f0-9]+:[ ]*62 f2 55 0f 8d 72 7f[ ]*vpermb xmm6\{k7\},xmm5,XMMWORD PTR \[edx\+0x7f0\] +[ ]*[a-f0-9]+:[ ]*62 f2 55 0f 8d b2 00 08 00 00[ ]*vpermb xmm6\{k7\},xmm5,XMMWORD PTR \[edx\+0x800\] +[ ]*[a-f0-9]+:[ ]*62 f2 55 0f 8d 72 80[ ]*vpermb xmm6\{k7\},xmm5,XMMWORD PTR \[edx-0x800\] +[ ]*[a-f0-9]+:[ ]*62 f2 55 0f 8d b2 f0 f7 ff ff[ ]*vpermb xmm6\{k7\},xmm5,XMMWORD PTR \[edx-0x810\] +[ ]*[a-f0-9]+:[ ]*62 f2 55 2f 8d f4[ ]*vpermb ymm6\{k7\},ymm5,ymm4 +[ ]*[a-f0-9]+:[ ]*62 f2 55 af 8d f4[ ]*vpermb ymm6\{k7\}\{z\},ymm5,ymm4 +[ ]*[a-f0-9]+:[ ]*62 f2 55 2f 8d 31[ ]*vpermb ymm6\{k7\},ymm5,YMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+:[ ]*62 f2 55 2f 8d b4 f4 c0 1d fe ff[ ]*vpermb ymm6\{k7\},ymm5,YMMWORD PTR \[esp\+esi\*8-0x1e240\] +[ ]*[a-f0-9]+:[ ]*62 f2 55 2f 8d 72 7f[ ]*vpermb ymm6\{k7\},ymm5,YMMWORD PTR \[edx\+0xfe0\] +[ ]*[a-f0-9]+:[ ]*62 f2 55 2f 8d b2 00 10 00 00[ ]*vpermb ymm6\{k7\},ymm5,YMMWORD PTR \[edx\+0x1000\] +[ ]*[a-f0-9]+:[ ]*62 f2 55 2f 8d 72 80[ ]*vpermb ymm6\{k7\},ymm5,YMMWORD PTR \[edx-0x1000\] +[ ]*[a-f0-9]+:[ ]*62 f2 55 2f 8d b2 e0 ef ff ff[ ]*vpermb ymm6\{k7\},ymm5,YMMWORD PTR \[edx-0x1020\] +[ ]*[a-f0-9]+:[ ]*62 f2 55 0f 75 f4[ ]*vpermi2b xmm6\{k7\},xmm5,xmm4 +[ ]*[a-f0-9]+:[ ]*62 f2 55 8f 75 f4[ ]*vpermi2b xmm6\{k7\}\{z\},xmm5,xmm4 +[ ]*[a-f0-9]+:[ ]*62 f2 55 0f 75 31[ ]*vpermi2b xmm6\{k7\},xmm5,XMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+:[ ]*62 f2 55 0f 75 b4 f4 c0 1d fe ff[ ]*vpermi2b xmm6\{k7\},xmm5,XMMWORD PTR \[esp\+esi\*8-0x1e240\] +[ ]*[a-f0-9]+:[ ]*62 f2 55 0f 75 72 7f[ ]*vpermi2b xmm6\{k7\},xmm5,XMMWORD PTR \[edx\+0x7f0\] +[ ]*[a-f0-9]+:[ ]*62 f2 55 0f 75 b2 00 08 00 00[ ]*vpermi2b xmm6\{k7\},xmm5,XMMWORD PTR \[edx\+0x800\] +[ ]*[a-f0-9]+:[ ]*62 f2 55 0f 75 72 80[ ]*vpermi2b xmm6\{k7\},xmm5,XMMWORD PTR \[edx-0x800\] +[ ]*[a-f0-9]+:[ ]*62 f2 55 0f 75 b2 f0 f7 ff ff[ ]*vpermi2b xmm6\{k7\},xmm5,XMMWORD PTR \[edx-0x810\] +[ ]*[a-f0-9]+:[ ]*62 f2 55 2f 75 f4[ ]*vpermi2b ymm6\{k7\},ymm5,ymm4 +[ ]*[a-f0-9]+:[ ]*62 f2 55 af 75 f4[ ]*vpermi2b ymm6\{k7\}\{z\},ymm5,ymm4 +[ ]*[a-f0-9]+:[ ]*62 f2 55 2f 75 31[ ]*vpermi2b ymm6\{k7\},ymm5,YMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+:[ ]*62 f2 55 2f 75 b4 f4 c0 1d fe ff[ ]*vpermi2b ymm6\{k7\},ymm5,YMMWORD PTR \[esp\+esi\*8-0x1e240\] +[ ]*[a-f0-9]+:[ ]*62 f2 55 2f 75 72 7f[ ]*vpermi2b ymm6\{k7\},ymm5,YMMWORD PTR \[edx\+0xfe0\] +[ ]*[a-f0-9]+:[ ]*62 f2 55 2f 75 b2 00 10 00 00[ ]*vpermi2b ymm6\{k7\},ymm5,YMMWORD PTR \[edx\+0x1000\] +[ ]*[a-f0-9]+:[ ]*62 f2 55 2f 75 72 80[ ]*vpermi2b ymm6\{k7\},ymm5,YMMWORD PTR \[edx-0x1000\] +[ ]*[a-f0-9]+:[ ]*62 f2 55 2f 75 b2 e0 ef ff ff[ ]*vpermi2b ymm6\{k7\},ymm5,YMMWORD PTR \[edx-0x1020\] +[ ]*[a-f0-9]+:[ ]*62 f2 55 0f 7d f4[ ]*vpermt2b xmm6\{k7\},xmm5,xmm4 +[ ]*[a-f0-9]+:[ ]*62 f2 55 8f 7d f4[ ]*vpermt2b xmm6\{k7\}\{z\},xmm5,xmm4 +[ ]*[a-f0-9]+:[ ]*62 f2 55 0f 7d 31[ ]*vpermt2b xmm6\{k7\},xmm5,XMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+:[ ]*62 f2 55 0f 7d b4 f4 c0 1d fe ff[ ]*vpermt2b xmm6\{k7\},xmm5,XMMWORD PTR \[esp\+esi\*8-0x1e240\] +[ ]*[a-f0-9]+:[ ]*62 f2 55 0f 7d 72 7f[ ]*vpermt2b xmm6\{k7\},xmm5,XMMWORD PTR \[edx\+0x7f0\] +[ ]*[a-f0-9]+:[ ]*62 f2 55 0f 7d b2 00 08 00 00[ ]*vpermt2b xmm6\{k7\},xmm5,XMMWORD PTR \[edx\+0x800\] +[ ]*[a-f0-9]+:[ ]*62 f2 55 0f 7d 72 80[ ]*vpermt2b xmm6\{k7\},xmm5,XMMWORD PTR \[edx-0x800\] +[ ]*[a-f0-9]+:[ ]*62 f2 55 0f 7d b2 f0 f7 ff ff[ ]*vpermt2b xmm6\{k7\},xmm5,XMMWORD PTR \[edx-0x810\] +[ ]*[a-f0-9]+:[ ]*62 f2 55 2f 7d f4[ ]*vpermt2b ymm6\{k7\},ymm5,ymm4 +[ ]*[a-f0-9]+:[ ]*62 f2 55 af 7d f4[ ]*vpermt2b ymm6\{k7\}\{z\},ymm5,ymm4 +[ ]*[a-f0-9]+:[ ]*62 f2 55 2f 7d 31[ ]*vpermt2b ymm6\{k7\},ymm5,YMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+:[ ]*62 f2 55 2f 7d b4 f4 c0 1d fe ff[ ]*vpermt2b ymm6\{k7\},ymm5,YMMWORD PTR \[esp\+esi\*8-0x1e240\] +[ ]*[a-f0-9]+:[ ]*62 f2 55 2f 7d 72 7f[ ]*vpermt2b ymm6\{k7\},ymm5,YMMWORD PTR \[edx\+0xfe0\] +[ ]*[a-f0-9]+:[ ]*62 f2 55 2f 7d b2 00 10 00 00[ ]*vpermt2b ymm6\{k7\},ymm5,YMMWORD PTR \[edx\+0x1000\] +[ ]*[a-f0-9]+:[ ]*62 f2 55 2f 7d 72 80[ ]*vpermt2b ymm6\{k7\},ymm5,YMMWORD PTR \[edx-0x1000\] +[ ]*[a-f0-9]+:[ ]*62 f2 55 2f 7d b2 e0 ef ff ff[ ]*vpermt2b ymm6\{k7\},ymm5,YMMWORD PTR \[edx-0x1020\] +[ ]*[a-f0-9]+:[ ]*62 f2 d5 0f 83 f4[ ]*vpmultishiftqb xmm6\{k7\},xmm5,xmm4 +[ ]*[a-f0-9]+:[ ]*62 f2 d5 8f 83 f4[ ]*vpmultishiftqb xmm6\{k7\}\{z\},xmm5,xmm4 +[ ]*[a-f0-9]+:[ ]*62 f2 d5 0f 83 31[ ]*vpmultishiftqb xmm6\{k7\},xmm5,XMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+:[ ]*62 f2 d5 0f 83 b4 f4 c0 1d fe ff[ ]*vpmultishiftqb xmm6\{k7\},xmm5,XMMWORD PTR \[esp\+esi\*8-0x1e240\] +[ ]*[a-f0-9]+:[ ]*62 f2 d5 1f 83 30[ ]*vpmultishiftqb xmm6\{k7\},xmm5,QWORD PTR \[eax\]\{1to2\} +[ ]*[a-f0-9]+:[ ]*62 f2 d5 0f 83 72 7f[ ]*vpmultishiftqb xmm6\{k7\},xmm5,XMMWORD PTR \[edx\+0x7f0\] +[ ]*[a-f0-9]+:[ ]*62 f2 d5 0f 83 b2 00 08 00 00[ ]*vpmultishiftqb xmm6\{k7\},xmm5,XMMWORD PTR \[edx\+0x800\] +[ ]*[a-f0-9]+:[ ]*62 f2 d5 0f 83 72 80[ ]*vpmultishiftqb xmm6\{k7\},xmm5,XMMWORD PTR \[edx-0x800\] +[ ]*[a-f0-9]+:[ ]*62 f2 d5 0f 83 b2 f0 f7 ff ff[ ]*vpmultishiftqb xmm6\{k7\},xmm5,XMMWORD PTR \[edx-0x810\] +[ ]*[a-f0-9]+:[ ]*62 f2 d5 1f 83 72 7f[ ]*vpmultishiftqb xmm6\{k7\},xmm5,QWORD PTR \[edx\+0x3f8\]\{1to2\} +[ ]*[a-f0-9]+:[ ]*62 f2 d5 1f 83 b2 00 04 00 00[ ]*vpmultishiftqb xmm6\{k7\},xmm5,QWORD PTR \[edx\+0x400\]\{1to2\} +[ ]*[a-f0-9]+:[ ]*62 f2 d5 1f 83 72 80[ ]*vpmultishiftqb xmm6\{k7\},xmm5,QWORD PTR \[edx-0x400\]\{1to2\} +[ ]*[a-f0-9]+:[ ]*62 f2 d5 1f 83 b2 f8 fb ff ff[ ]*vpmultishiftqb xmm6\{k7\},xmm5,QWORD PTR \[edx-0x408\]\{1to2\} +[ ]*[a-f0-9]+:[ ]*62 f2 d5 2f 83 f4[ ]*vpmultishiftqb ymm6\{k7\},ymm5,ymm4 +[ ]*[a-f0-9]+:[ ]*62 f2 d5 af 83 f4[ ]*vpmultishiftqb ymm6\{k7\}\{z\},ymm5,ymm4 +[ ]*[a-f0-9]+:[ ]*62 f2 d5 2f 83 31[ ]*vpmultishiftqb ymm6\{k7\},ymm5,YMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+:[ ]*62 f2 d5 2f 83 b4 f4 c0 1d fe ff[ ]*vpmultishiftqb ymm6\{k7\},ymm5,YMMWORD PTR \[esp\+esi\*8-0x1e240\] +[ ]*[a-f0-9]+:[ ]*62 f2 d5 3f 83 30[ ]*vpmultishiftqb ymm6\{k7\},ymm5,QWORD PTR \[eax\]\{1to4\} +[ ]*[a-f0-9]+:[ ]*62 f2 d5 2f 83 72 7f[ ]*vpmultishiftqb ymm6\{k7\},ymm5,YMMWORD PTR \[edx\+0xfe0\] +[ ]*[a-f0-9]+:[ ]*62 f2 d5 2f 83 b2 00 10 00 00[ ]*vpmultishiftqb ymm6\{k7\},ymm5,YMMWORD PTR \[edx\+0x1000\] +[ ]*[a-f0-9]+:[ ]*62 f2 d5 2f 83 72 80[ ]*vpmultishiftqb ymm6\{k7\},ymm5,YMMWORD PTR \[edx-0x1000\] +[ ]*[a-f0-9]+:[ ]*62 f2 d5 2f 83 b2 e0 ef ff ff[ ]*vpmultishiftqb ymm6\{k7\},ymm5,YMMWORD PTR \[edx-0x1020\] +[ ]*[a-f0-9]+:[ ]*62 f2 d5 3f 83 72 7f[ ]*vpmultishiftqb ymm6\{k7\},ymm5,QWORD PTR \[edx\+0x3f8\]\{1to4\} +[ ]*[a-f0-9]+:[ ]*62 f2 d5 3f 83 b2 00 04 00 00[ ]*vpmultishiftqb ymm6\{k7\},ymm5,QWORD PTR \[edx\+0x400\]\{1to4\} +[ ]*[a-f0-9]+:[ ]*62 f2 d5 3f 83 72 80[ ]*vpmultishiftqb ymm6\{k7\},ymm5,QWORD PTR \[edx-0x400\]\{1to4\} +[ ]*[a-f0-9]+:[ ]*62 f2 d5 3f 83 b2 f8 fb ff ff[ ]*vpmultishiftqb ymm6\{k7\},ymm5,QWORD PTR \[edx-0x408\]\{1to4\} +[ ]*[a-f0-9]+:[ ]*62 f2 55 0f 8d f4[ ]*vpermb xmm6\{k7\},xmm5,xmm4 +[ ]*[a-f0-9]+:[ ]*62 f2 55 8f 8d f4[ ]*vpermb xmm6\{k7\}\{z\},xmm5,xmm4 +[ ]*[a-f0-9]+:[ ]*62 f2 55 0f 8d 31[ ]*vpermb xmm6\{k7\},xmm5,XMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+:[ ]*62 f2 55 0f 8d b4 f4 c0 1d fe ff[ ]*vpermb xmm6\{k7\},xmm5,XMMWORD PTR \[esp\+esi\*8-0x1e240\] +[ ]*[a-f0-9]+:[ ]*62 f2 55 0f 8d 72 7f[ ]*vpermb xmm6\{k7\},xmm5,XMMWORD PTR \[edx\+0x7f0\] +[ ]*[a-f0-9]+:[ ]*62 f2 55 0f 8d b2 00 08 00 00[ ]*vpermb xmm6\{k7\},xmm5,XMMWORD PTR \[edx\+0x800\] +[ ]*[a-f0-9]+:[ ]*62 f2 55 0f 8d 72 80[ ]*vpermb xmm6\{k7\},xmm5,XMMWORD PTR \[edx-0x800\] +[ ]*[a-f0-9]+:[ ]*62 f2 55 0f 8d b2 f0 f7 ff ff[ ]*vpermb xmm6\{k7\},xmm5,XMMWORD PTR \[edx-0x810\] +[ ]*[a-f0-9]+:[ ]*62 f2 55 2f 8d f4[ ]*vpermb ymm6\{k7\},ymm5,ymm4 +[ ]*[a-f0-9]+:[ ]*62 f2 55 af 8d f4[ ]*vpermb ymm6\{k7\}\{z\},ymm5,ymm4 +[ ]*[a-f0-9]+:[ ]*62 f2 55 2f 8d 31[ ]*vpermb ymm6\{k7\},ymm5,YMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+:[ ]*62 f2 55 2f 8d b4 f4 c0 1d fe ff[ ]*vpermb ymm6\{k7\},ymm5,YMMWORD PTR \[esp\+esi\*8-0x1e240\] +[ ]*[a-f0-9]+:[ ]*62 f2 55 2f 8d 72 7f[ ]*vpermb ymm6\{k7\},ymm5,YMMWORD PTR \[edx\+0xfe0\] +[ ]*[a-f0-9]+:[ ]*62 f2 55 2f 8d b2 00 10 00 00[ ]*vpermb ymm6\{k7\},ymm5,YMMWORD PTR \[edx\+0x1000\] +[ ]*[a-f0-9]+:[ ]*62 f2 55 2f 8d 72 80[ ]*vpermb ymm6\{k7\},ymm5,YMMWORD PTR \[edx-0x1000\] +[ ]*[a-f0-9]+:[ ]*62 f2 55 2f 8d b2 e0 ef ff ff[ ]*vpermb ymm6\{k7\},ymm5,YMMWORD PTR \[edx-0x1020\] +[ ]*[a-f0-9]+:[ ]*62 f2 55 0f 75 f4[ ]*vpermi2b xmm6\{k7\},xmm5,xmm4 +[ ]*[a-f0-9]+:[ ]*62 f2 55 8f 75 f4[ ]*vpermi2b xmm6\{k7\}\{z\},xmm5,xmm4 +[ ]*[a-f0-9]+:[ ]*62 f2 55 0f 75 31[ ]*vpermi2b xmm6\{k7\},xmm5,XMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+:[ ]*62 f2 55 0f 75 b4 f4 c0 1d fe ff[ ]*vpermi2b xmm6\{k7\},xmm5,XMMWORD PTR \[esp\+esi\*8-0x1e240\] +[ ]*[a-f0-9]+:[ ]*62 f2 55 0f 75 72 7f[ ]*vpermi2b xmm6\{k7\},xmm5,XMMWORD PTR \[edx\+0x7f0\] +[ ]*[a-f0-9]+:[ ]*62 f2 55 0f 75 b2 00 08 00 00[ ]*vpermi2b xmm6\{k7\},xmm5,XMMWORD PTR \[edx\+0x800\] +[ ]*[a-f0-9]+:[ ]*62 f2 55 0f 75 72 80[ ]*vpermi2b xmm6\{k7\},xmm5,XMMWORD PTR \[edx-0x800\] +[ ]*[a-f0-9]+:[ ]*62 f2 55 0f 75 b2 f0 f7 ff ff[ ]*vpermi2b xmm6\{k7\},xmm5,XMMWORD PTR \[edx-0x810\] +[ ]*[a-f0-9]+:[ ]*62 f2 55 2f 75 f4[ ]*vpermi2b ymm6\{k7\},ymm5,ymm4 +[ ]*[a-f0-9]+:[ ]*62 f2 55 af 75 f4[ ]*vpermi2b ymm6\{k7\}\{z\},ymm5,ymm4 +[ ]*[a-f0-9]+:[ ]*62 f2 55 2f 75 31[ ]*vpermi2b ymm6\{k7\},ymm5,YMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+:[ ]*62 f2 55 2f 75 b4 f4 c0 1d fe ff[ ]*vpermi2b ymm6\{k7\},ymm5,YMMWORD PTR \[esp\+esi\*8-0x1e240\] +[ ]*[a-f0-9]+:[ ]*62 f2 55 2f 75 72 7f[ ]*vpermi2b ymm6\{k7\},ymm5,YMMWORD PTR \[edx\+0xfe0\] +[ ]*[a-f0-9]+:[ ]*62 f2 55 2f 75 b2 00 10 00 00[ ]*vpermi2b ymm6\{k7\},ymm5,YMMWORD PTR \[edx\+0x1000\] +[ ]*[a-f0-9]+:[ ]*62 f2 55 2f 75 72 80[ ]*vpermi2b ymm6\{k7\},ymm5,YMMWORD PTR \[edx-0x1000\] +[ ]*[a-f0-9]+:[ ]*62 f2 55 2f 75 b2 e0 ef ff ff[ ]*vpermi2b ymm6\{k7\},ymm5,YMMWORD PTR \[edx-0x1020\] +[ ]*[a-f0-9]+:[ ]*62 f2 55 0f 7d f4[ ]*vpermt2b xmm6\{k7\},xmm5,xmm4 +[ ]*[a-f0-9]+:[ ]*62 f2 55 8f 7d f4[ ]*vpermt2b xmm6\{k7\}\{z\},xmm5,xmm4 +[ ]*[a-f0-9]+:[ ]*62 f2 55 0f 7d 31[ ]*vpermt2b xmm6\{k7\},xmm5,XMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+:[ ]*62 f2 55 0f 7d b4 f4 c0 1d fe ff[ ]*vpermt2b xmm6\{k7\},xmm5,XMMWORD PTR \[esp\+esi\*8-0x1e240\] +[ ]*[a-f0-9]+:[ ]*62 f2 55 0f 7d 72 7f[ ]*vpermt2b xmm6\{k7\},xmm5,XMMWORD PTR \[edx\+0x7f0\] +[ ]*[a-f0-9]+:[ ]*62 f2 55 0f 7d b2 00 08 00 00[ ]*vpermt2b xmm6\{k7\},xmm5,XMMWORD PTR \[edx\+0x800\] +[ ]*[a-f0-9]+:[ ]*62 f2 55 0f 7d 72 80[ ]*vpermt2b xmm6\{k7\},xmm5,XMMWORD PTR \[edx-0x800\] +[ ]*[a-f0-9]+:[ ]*62 f2 55 0f 7d b2 f0 f7 ff ff[ ]*vpermt2b xmm6\{k7\},xmm5,XMMWORD PTR \[edx-0x810\] +[ ]*[a-f0-9]+:[ ]*62 f2 55 2f 7d f4[ ]*vpermt2b ymm6\{k7\},ymm5,ymm4 +[ ]*[a-f0-9]+:[ ]*62 f2 55 af 7d f4[ ]*vpermt2b ymm6\{k7\}\{z\},ymm5,ymm4 +[ ]*[a-f0-9]+:[ ]*62 f2 55 2f 7d 31[ ]*vpermt2b ymm6\{k7\},ymm5,YMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+:[ ]*62 f2 55 2f 7d b4 f4 c0 1d fe ff[ ]*vpermt2b ymm6\{k7\},ymm5,YMMWORD PTR \[esp\+esi\*8-0x1e240\] +[ ]*[a-f0-9]+:[ ]*62 f2 55 2f 7d 72 7f[ ]*vpermt2b ymm6\{k7\},ymm5,YMMWORD PTR \[edx\+0xfe0\] +[ ]*[a-f0-9]+:[ ]*62 f2 55 2f 7d b2 00 10 00 00[ ]*vpermt2b ymm6\{k7\},ymm5,YMMWORD PTR \[edx\+0x1000\] +[ ]*[a-f0-9]+:[ ]*62 f2 55 2f 7d 72 80[ ]*vpermt2b ymm6\{k7\},ymm5,YMMWORD PTR \[edx-0x1000\] +[ ]*[a-f0-9]+:[ ]*62 f2 55 2f 7d b2 e0 ef ff ff[ ]*vpermt2b ymm6\{k7\},ymm5,YMMWORD PTR \[edx-0x1020\] +[ ]*[a-f0-9]+:[ ]*62 f2 d5 0f 83 f4[ ]*vpmultishiftqb xmm6\{k7\},xmm5,xmm4 +[ ]*[a-f0-9]+:[ ]*62 f2 d5 8f 83 f4[ ]*vpmultishiftqb xmm6\{k7\}\{z\},xmm5,xmm4 +[ ]*[a-f0-9]+:[ ]*62 f2 d5 0f 83 31[ ]*vpmultishiftqb xmm6\{k7\},xmm5,XMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+:[ ]*62 f2 d5 0f 83 b4 f4 c0 1d fe ff[ ]*vpmultishiftqb xmm6\{k7\},xmm5,XMMWORD PTR \[esp\+esi\*8-0x1e240\] +[ ]*[a-f0-9]+:[ ]*62 f2 d5 1f 83 30[ ]*vpmultishiftqb xmm6\{k7\},xmm5,QWORD PTR \[eax\]\{1to2\} +[ ]*[a-f0-9]+:[ ]*62 f2 d5 0f 83 72 7f[ ]*vpmultishiftqb xmm6\{k7\},xmm5,XMMWORD PTR \[edx\+0x7f0\] +[ ]*[a-f0-9]+:[ ]*62 f2 d5 0f 83 b2 00 08 00 00[ ]*vpmultishiftqb xmm6\{k7\},xmm5,XMMWORD PTR \[edx\+0x800\] +[ ]*[a-f0-9]+:[ ]*62 f2 d5 0f 83 72 80[ ]*vpmultishiftqb xmm6\{k7\},xmm5,XMMWORD PTR \[edx-0x800\] +[ ]*[a-f0-9]+:[ ]*62 f2 d5 0f 83 b2 f0 f7 ff ff[ ]*vpmultishiftqb xmm6\{k7\},xmm5,XMMWORD PTR \[edx-0x810\] +[ ]*[a-f0-9]+:[ ]*62 f2 d5 1f 83 72 7f[ ]*vpmultishiftqb xmm6\{k7\},xmm5,QWORD PTR \[edx\+0x3f8\]\{1to2\} +[ ]*[a-f0-9]+:[ ]*62 f2 d5 1f 83 b2 00 04 00 00[ ]*vpmultishiftqb xmm6\{k7\},xmm5,QWORD PTR \[edx\+0x400\]\{1to2\} +[ ]*[a-f0-9]+:[ ]*62 f2 d5 1f 83 72 80[ ]*vpmultishiftqb xmm6\{k7\},xmm5,QWORD PTR \[edx-0x400\]\{1to2\} +[ ]*[a-f0-9]+:[ ]*62 f2 d5 1f 83 b2 f8 fb ff ff[ ]*vpmultishiftqb xmm6\{k7\},xmm5,QWORD PTR \[edx-0x408\]\{1to2\} +[ ]*[a-f0-9]+:[ ]*62 f2 d5 2f 83 f4[ ]*vpmultishiftqb ymm6\{k7\},ymm5,ymm4 +[ ]*[a-f0-9]+:[ ]*62 f2 d5 af 83 f4[ ]*vpmultishiftqb ymm6\{k7\}\{z\},ymm5,ymm4 +[ ]*[a-f0-9]+:[ ]*62 f2 d5 2f 83 31[ ]*vpmultishiftqb ymm6\{k7\},ymm5,YMMWORD PTR \[ecx\] +[ ]*[a-f0-9]+:[ ]*62 f2 d5 2f 83 b4 f4 c0 1d fe ff[ ]*vpmultishiftqb ymm6\{k7\},ymm5,YMMWORD PTR \[esp\+esi\*8-0x1e240\] +[ ]*[a-f0-9]+:[ ]*62 f2 d5 3f 83 30[ ]*vpmultishiftqb ymm6\{k7\},ymm5,QWORD PTR \[eax\]\{1to4\} +[ ]*[a-f0-9]+:[ ]*62 f2 d5 2f 83 72 7f[ ]*vpmultishiftqb ymm6\{k7\},ymm5,YMMWORD PTR \[edx\+0xfe0\] +[ ]*[a-f0-9]+:[ ]*62 f2 d5 2f 83 b2 00 10 00 00[ ]*vpmultishiftqb ymm6\{k7\},ymm5,YMMWORD PTR \[edx\+0x1000\] +[ ]*[a-f0-9]+:[ ]*62 f2 d5 2f 83 72 80[ ]*vpmultishiftqb ymm6\{k7\},ymm5,YMMWORD PTR \[edx-0x1000\] +[ ]*[a-f0-9]+:[ ]*62 f2 d5 2f 83 b2 e0 ef ff ff[ ]*vpmultishiftqb ymm6\{k7\},ymm5,YMMWORD PTR \[edx-0x1020\] +[ ]*[a-f0-9]+:[ ]*62 f2 d5 3f 83 72 7f[ ]*vpmultishiftqb ymm6\{k7\},ymm5,QWORD PTR \[edx\+0x3f8\]\{1to4\} +[ ]*[a-f0-9]+:[ ]*62 f2 d5 3f 83 b2 00 04 00 00[ ]*vpmultishiftqb ymm6\{k7\},ymm5,QWORD PTR \[edx\+0x400\]\{1to4\} +[ ]*[a-f0-9]+:[ ]*62 f2 d5 3f 83 72 80[ ]*vpmultishiftqb ymm6\{k7\},ymm5,QWORD PTR \[edx-0x400\]\{1to4\} +[ ]*[a-f0-9]+:[ ]*62 f2 d5 3f 83 b2 f8 fb ff ff[ ]*vpmultishiftqb ymm6\{k7\},ymm5,QWORD PTR \[edx-0x408\]\{1to4\} +#pass diff --git a/gas/testsuite/gas/i386/avx512vbmi_vl.d b/gas/testsuite/gas/i386/avx512vbmi_vl.d new file mode 100644 index 00000000000..f0326241da1 --- /dev/null +++ b/gas/testsuite/gas/i386/avx512vbmi_vl.d @@ -0,0 +1,160 @@ +#as: +#objdump: -dw +#name: i386 AVX512VBMI/VL insns +#source: avx512vbmi_vl.s + +.*: +file format .* + + +Disassembly of section \.text: + +00000000 <_start>: +[ ]*[a-f0-9]+:[ ]*62 f2 55 0f 8d f4[ ]*vpermb %xmm4,%xmm5,%xmm6\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 f2 55 8f 8d f4[ ]*vpermb %xmm4,%xmm5,%xmm6\{%k7\}\{z\} +[ ]*[a-f0-9]+:[ ]*62 f2 55 0f 8d 31[ ]*vpermb \(%ecx\),%xmm5,%xmm6\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 f2 55 0f 8d b4 f4 c0 1d fe ff[ ]*vpermb -0x1e240\(%esp,%esi,8\),%xmm5,%xmm6\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 f2 55 0f 8d 72 7f[ ]*vpermb 0x7f0\(%edx\),%xmm5,%xmm6\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 f2 55 0f 8d b2 00 08 00 00[ ]*vpermb 0x800\(%edx\),%xmm5,%xmm6\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 f2 55 0f 8d 72 80[ ]*vpermb -0x800\(%edx\),%xmm5,%xmm6\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 f2 55 0f 8d b2 f0 f7 ff ff[ ]*vpermb -0x810\(%edx\),%xmm5,%xmm6\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 f2 55 2f 8d f4[ ]*vpermb %ymm4,%ymm5,%ymm6\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 f2 55 af 8d f4[ ]*vpermb %ymm4,%ymm5,%ymm6\{%k7\}\{z\} +[ ]*[a-f0-9]+:[ ]*62 f2 55 2f 8d 31[ ]*vpermb \(%ecx\),%ymm5,%ymm6\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 f2 55 2f 8d b4 f4 c0 1d fe ff[ ]*vpermb -0x1e240\(%esp,%esi,8\),%ymm5,%ymm6\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 f2 55 2f 8d 72 7f[ ]*vpermb 0xfe0\(%edx\),%ymm5,%ymm6\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 f2 55 2f 8d b2 00 10 00 00[ ]*vpermb 0x1000\(%edx\),%ymm5,%ymm6\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 f2 55 2f 8d 72 80[ ]*vpermb -0x1000\(%edx\),%ymm5,%ymm6\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 f2 55 2f 8d b2 e0 ef ff ff[ ]*vpermb -0x1020\(%edx\),%ymm5,%ymm6\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 f2 55 0f 75 f4[ ]*vpermi2b %xmm4,%xmm5,%xmm6\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 f2 55 8f 75 f4[ ]*vpermi2b %xmm4,%xmm5,%xmm6\{%k7\}\{z\} +[ ]*[a-f0-9]+:[ ]*62 f2 55 0f 75 31[ ]*vpermi2b \(%ecx\),%xmm5,%xmm6\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 f2 55 0f 75 b4 f4 c0 1d fe ff[ ]*vpermi2b -0x1e240\(%esp,%esi,8\),%xmm5,%xmm6\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 f2 55 0f 75 72 7f[ ]*vpermi2b 0x7f0\(%edx\),%xmm5,%xmm6\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 f2 55 0f 75 b2 00 08 00 00[ ]*vpermi2b 0x800\(%edx\),%xmm5,%xmm6\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 f2 55 0f 75 72 80[ ]*vpermi2b -0x800\(%edx\),%xmm5,%xmm6\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 f2 55 0f 75 b2 f0 f7 ff ff[ ]*vpermi2b -0x810\(%edx\),%xmm5,%xmm6\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 f2 55 2f 75 f4[ ]*vpermi2b %ymm4,%ymm5,%ymm6\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 f2 55 af 75 f4[ ]*vpermi2b %ymm4,%ymm5,%ymm6\{%k7\}\{z\} +[ ]*[a-f0-9]+:[ ]*62 f2 55 2f 75 31[ ]*vpermi2b \(%ecx\),%ymm5,%ymm6\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 f2 55 2f 75 b4 f4 c0 1d fe ff[ ]*vpermi2b -0x1e240\(%esp,%esi,8\),%ymm5,%ymm6\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 f2 55 2f 75 72 7f[ ]*vpermi2b 0xfe0\(%edx\),%ymm5,%ymm6\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 f2 55 2f 75 b2 00 10 00 00[ ]*vpermi2b 0x1000\(%edx\),%ymm5,%ymm6\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 f2 55 2f 75 72 80[ ]*vpermi2b -0x1000\(%edx\),%ymm5,%ymm6\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 f2 55 2f 75 b2 e0 ef ff ff[ ]*vpermi2b -0x1020\(%edx\),%ymm5,%ymm6\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 f2 55 0f 7d f4[ ]*vpermt2b %xmm4,%xmm5,%xmm6\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 f2 55 8f 7d f4[ ]*vpermt2b %xmm4,%xmm5,%xmm6\{%k7\}\{z\} +[ ]*[a-f0-9]+:[ ]*62 f2 55 0f 7d 31[ ]*vpermt2b \(%ecx\),%xmm5,%xmm6\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 f2 55 0f 7d b4 f4 c0 1d fe ff[ ]*vpermt2b -0x1e240\(%esp,%esi,8\),%xmm5,%xmm6\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 f2 55 0f 7d 72 7f[ ]*vpermt2b 0x7f0\(%edx\),%xmm5,%xmm6\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 f2 55 0f 7d b2 00 08 00 00[ ]*vpermt2b 0x800\(%edx\),%xmm5,%xmm6\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 f2 55 0f 7d 72 80[ ]*vpermt2b -0x800\(%edx\),%xmm5,%xmm6\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 f2 55 0f 7d b2 f0 f7 ff ff[ ]*vpermt2b -0x810\(%edx\),%xmm5,%xmm6\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 f2 55 2f 7d f4[ ]*vpermt2b %ymm4,%ymm5,%ymm6\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 f2 55 af 7d f4[ ]*vpermt2b %ymm4,%ymm5,%ymm6\{%k7\}\{z\} +[ ]*[a-f0-9]+:[ ]*62 f2 55 2f 7d 31[ ]*vpermt2b \(%ecx\),%ymm5,%ymm6\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 f2 55 2f 7d b4 f4 c0 1d fe ff[ ]*vpermt2b -0x1e240\(%esp,%esi,8\),%ymm5,%ymm6\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 f2 55 2f 7d 72 7f[ ]*vpermt2b 0xfe0\(%edx\),%ymm5,%ymm6\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 f2 55 2f 7d b2 00 10 00 00[ ]*vpermt2b 0x1000\(%edx\),%ymm5,%ymm6\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 f2 55 2f 7d 72 80[ ]*vpermt2b -0x1000\(%edx\),%ymm5,%ymm6\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 f2 55 2f 7d b2 e0 ef ff ff[ ]*vpermt2b -0x1020\(%edx\),%ymm5,%ymm6\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 f2 d5 0f 83 f4[ ]*vpmultishiftqb %xmm4,%xmm5,%xmm6\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 f2 d5 8f 83 f4[ ]*vpmultishiftqb %xmm4,%xmm5,%xmm6\{%k7\}\{z\} +[ ]*[a-f0-9]+:[ ]*62 f2 d5 0f 83 31[ ]*vpmultishiftqb \(%ecx\),%xmm5,%xmm6\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 f2 d5 0f 83 b4 f4 c0 1d fe ff[ ]*vpmultishiftqb -0x1e240\(%esp,%esi,8\),%xmm5,%xmm6\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 f2 d5 1f 83 30[ ]*vpmultishiftqb \(%eax\)\{1to2\},%xmm5,%xmm6\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 f2 d5 0f 83 72 7f[ ]*vpmultishiftqb 0x7f0\(%edx\),%xmm5,%xmm6\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 f2 d5 0f 83 b2 00 08 00 00[ ]*vpmultishiftqb 0x800\(%edx\),%xmm5,%xmm6\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 f2 d5 0f 83 72 80[ ]*vpmultishiftqb -0x800\(%edx\),%xmm5,%xmm6\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 f2 d5 0f 83 b2 f0 f7 ff ff[ ]*vpmultishiftqb -0x810\(%edx\),%xmm5,%xmm6\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 f2 d5 1f 83 72 7f[ ]*vpmultishiftqb 0x3f8\(%edx\)\{1to2\},%xmm5,%xmm6\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 f2 d5 1f 83 b2 00 04 00 00[ ]*vpmultishiftqb 0x400\(%edx\)\{1to2\},%xmm5,%xmm6\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 f2 d5 1f 83 72 80[ ]*vpmultishiftqb -0x400\(%edx\)\{1to2\},%xmm5,%xmm6\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 f2 d5 1f 83 b2 f8 fb ff ff[ ]*vpmultishiftqb -0x408\(%edx\)\{1to2\},%xmm5,%xmm6\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 f2 d5 2f 83 f4[ ]*vpmultishiftqb %ymm4,%ymm5,%ymm6\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 f2 d5 af 83 f4[ ]*vpmultishiftqb %ymm4,%ymm5,%ymm6\{%k7\}\{z\} +[ ]*[a-f0-9]+:[ ]*62 f2 d5 2f 83 31[ ]*vpmultishiftqb \(%ecx\),%ymm5,%ymm6\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 f2 d5 2f 83 b4 f4 c0 1d fe ff[ ]*vpmultishiftqb -0x1e240\(%esp,%esi,8\),%ymm5,%ymm6\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 f2 d5 3f 83 30[ ]*vpmultishiftqb \(%eax\)\{1to4\},%ymm5,%ymm6\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 f2 d5 2f 83 72 7f[ ]*vpmultishiftqb 0xfe0\(%edx\),%ymm5,%ymm6\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 f2 d5 2f 83 b2 00 10 00 00[ ]*vpmultishiftqb 0x1000\(%edx\),%ymm5,%ymm6\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 f2 d5 2f 83 72 80[ ]*vpmultishiftqb -0x1000\(%edx\),%ymm5,%ymm6\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 f2 d5 2f 83 b2 e0 ef ff ff[ ]*vpmultishiftqb -0x1020\(%edx\),%ymm5,%ymm6\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 f2 d5 3f 83 72 7f[ ]*vpmultishiftqb 0x3f8\(%edx\)\{1to4\},%ymm5,%ymm6\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 f2 d5 3f 83 b2 00 04 00 00[ ]*vpmultishiftqb 0x400\(%edx\)\{1to4\},%ymm5,%ymm6\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 f2 d5 3f 83 72 80[ ]*vpmultishiftqb -0x400\(%edx\)\{1to4\},%ymm5,%ymm6\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 f2 d5 3f 83 b2 f8 fb ff ff[ ]*vpmultishiftqb -0x408\(%edx\)\{1to4\},%ymm5,%ymm6\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 f2 55 0f 8d f4[ ]*vpermb %xmm4,%xmm5,%xmm6\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 f2 55 8f 8d f4[ ]*vpermb %xmm4,%xmm5,%xmm6\{%k7\}\{z\} +[ ]*[a-f0-9]+:[ ]*62 f2 55 0f 8d 31[ ]*vpermb \(%ecx\),%xmm5,%xmm6\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 f2 55 0f 8d b4 f4 c0 1d fe ff[ ]*vpermb -0x1e240\(%esp,%esi,8\),%xmm5,%xmm6\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 f2 55 0f 8d 72 7f[ ]*vpermb 0x7f0\(%edx\),%xmm5,%xmm6\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 f2 55 0f 8d b2 00 08 00 00[ ]*vpermb 0x800\(%edx\),%xmm5,%xmm6\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 f2 55 0f 8d 72 80[ ]*vpermb -0x800\(%edx\),%xmm5,%xmm6\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 f2 55 0f 8d b2 f0 f7 ff ff[ ]*vpermb -0x810\(%edx\),%xmm5,%xmm6\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 f2 55 2f 8d f4[ ]*vpermb %ymm4,%ymm5,%ymm6\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 f2 55 af 8d f4[ ]*vpermb %ymm4,%ymm5,%ymm6\{%k7\}\{z\} +[ ]*[a-f0-9]+:[ ]*62 f2 55 2f 8d 31[ ]*vpermb \(%ecx\),%ymm5,%ymm6\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 f2 55 2f 8d b4 f4 c0 1d fe ff[ ]*vpermb -0x1e240\(%esp,%esi,8\),%ymm5,%ymm6\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 f2 55 2f 8d 72 7f[ ]*vpermb 0xfe0\(%edx\),%ymm5,%ymm6\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 f2 55 2f 8d b2 00 10 00 00[ ]*vpermb 0x1000\(%edx\),%ymm5,%ymm6\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 f2 55 2f 8d 72 80[ ]*vpermb -0x1000\(%edx\),%ymm5,%ymm6\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 f2 55 2f 8d b2 e0 ef ff ff[ ]*vpermb -0x1020\(%edx\),%ymm5,%ymm6\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 f2 55 0f 75 f4[ ]*vpermi2b %xmm4,%xmm5,%xmm6\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 f2 55 8f 75 f4[ ]*vpermi2b %xmm4,%xmm5,%xmm6\{%k7\}\{z\} +[ ]*[a-f0-9]+:[ ]*62 f2 55 0f 75 31[ ]*vpermi2b \(%ecx\),%xmm5,%xmm6\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 f2 55 0f 75 b4 f4 c0 1d fe ff[ ]*vpermi2b -0x1e240\(%esp,%esi,8\),%xmm5,%xmm6\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 f2 55 0f 75 72 7f[ ]*vpermi2b 0x7f0\(%edx\),%xmm5,%xmm6\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 f2 55 0f 75 b2 00 08 00 00[ ]*vpermi2b 0x800\(%edx\),%xmm5,%xmm6\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 f2 55 0f 75 72 80[ ]*vpermi2b -0x800\(%edx\),%xmm5,%xmm6\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 f2 55 0f 75 b2 f0 f7 ff ff[ ]*vpermi2b -0x810\(%edx\),%xmm5,%xmm6\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 f2 55 2f 75 f4[ ]*vpermi2b %ymm4,%ymm5,%ymm6\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 f2 55 af 75 f4[ ]*vpermi2b %ymm4,%ymm5,%ymm6\{%k7\}\{z\} +[ ]*[a-f0-9]+:[ ]*62 f2 55 2f 75 31[ ]*vpermi2b \(%ecx\),%ymm5,%ymm6\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 f2 55 2f 75 b4 f4 c0 1d fe ff[ ]*vpermi2b -0x1e240\(%esp,%esi,8\),%ymm5,%ymm6\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 f2 55 2f 75 72 7f[ ]*vpermi2b 0xfe0\(%edx\),%ymm5,%ymm6\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 f2 55 2f 75 b2 00 10 00 00[ ]*vpermi2b 0x1000\(%edx\),%ymm5,%ymm6\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 f2 55 2f 75 72 80[ ]*vpermi2b -0x1000\(%edx\),%ymm5,%ymm6\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 f2 55 2f 75 b2 e0 ef ff ff[ ]*vpermi2b -0x1020\(%edx\),%ymm5,%ymm6\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 f2 55 0f 7d f4[ ]*vpermt2b %xmm4,%xmm5,%xmm6\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 f2 55 8f 7d f4[ ]*vpermt2b %xmm4,%xmm5,%xmm6\{%k7\}\{z\} +[ ]*[a-f0-9]+:[ ]*62 f2 55 0f 7d 31[ ]*vpermt2b \(%ecx\),%xmm5,%xmm6\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 f2 55 0f 7d b4 f4 c0 1d fe ff[ ]*vpermt2b -0x1e240\(%esp,%esi,8\),%xmm5,%xmm6\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 f2 55 0f 7d 72 7f[ ]*vpermt2b 0x7f0\(%edx\),%xmm5,%xmm6\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 f2 55 0f 7d b2 00 08 00 00[ ]*vpermt2b 0x800\(%edx\),%xmm5,%xmm6\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 f2 55 0f 7d 72 80[ ]*vpermt2b -0x800\(%edx\),%xmm5,%xmm6\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 f2 55 0f 7d b2 f0 f7 ff ff[ ]*vpermt2b -0x810\(%edx\),%xmm5,%xmm6\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 f2 55 2f 7d f4[ ]*vpermt2b %ymm4,%ymm5,%ymm6\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 f2 55 af 7d f4[ ]*vpermt2b %ymm4,%ymm5,%ymm6\{%k7\}\{z\} +[ ]*[a-f0-9]+:[ ]*62 f2 55 2f 7d 31[ ]*vpermt2b \(%ecx\),%ymm5,%ymm6\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 f2 55 2f 7d b4 f4 c0 1d fe ff[ ]*vpermt2b -0x1e240\(%esp,%esi,8\),%ymm5,%ymm6\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 f2 55 2f 7d 72 7f[ ]*vpermt2b 0xfe0\(%edx\),%ymm5,%ymm6\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 f2 55 2f 7d b2 00 10 00 00[ ]*vpermt2b 0x1000\(%edx\),%ymm5,%ymm6\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 f2 55 2f 7d 72 80[ ]*vpermt2b -0x1000\(%edx\),%ymm5,%ymm6\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 f2 55 2f 7d b2 e0 ef ff ff[ ]*vpermt2b -0x1020\(%edx\),%ymm5,%ymm6\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 f2 d5 0f 83 f4[ ]*vpmultishiftqb %xmm4,%xmm5,%xmm6\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 f2 d5 8f 83 f4[ ]*vpmultishiftqb %xmm4,%xmm5,%xmm6\{%k7\}\{z\} +[ ]*[a-f0-9]+:[ ]*62 f2 d5 0f 83 31[ ]*vpmultishiftqb \(%ecx\),%xmm5,%xmm6\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 f2 d5 0f 83 b4 f4 c0 1d fe ff[ ]*vpmultishiftqb -0x1e240\(%esp,%esi,8\),%xmm5,%xmm6\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 f2 d5 1f 83 30[ ]*vpmultishiftqb \(%eax\)\{1to2\},%xmm5,%xmm6\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 f2 d5 0f 83 72 7f[ ]*vpmultishiftqb 0x7f0\(%edx\),%xmm5,%xmm6\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 f2 d5 0f 83 b2 00 08 00 00[ ]*vpmultishiftqb 0x800\(%edx\),%xmm5,%xmm6\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 f2 d5 0f 83 72 80[ ]*vpmultishiftqb -0x800\(%edx\),%xmm5,%xmm6\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 f2 d5 0f 83 b2 f0 f7 ff ff[ ]*vpmultishiftqb -0x810\(%edx\),%xmm5,%xmm6\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 f2 d5 1f 83 72 7f[ ]*vpmultishiftqb 0x3f8\(%edx\)\{1to2\},%xmm5,%xmm6\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 f2 d5 1f 83 b2 00 04 00 00[ ]*vpmultishiftqb 0x400\(%edx\)\{1to2\},%xmm5,%xmm6\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 f2 d5 1f 83 72 80[ ]*vpmultishiftqb -0x400\(%edx\)\{1to2\},%xmm5,%xmm6\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 f2 d5 1f 83 b2 f8 fb ff ff[ ]*vpmultishiftqb -0x408\(%edx\)\{1to2\},%xmm5,%xmm6\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 f2 d5 2f 83 f4[ ]*vpmultishiftqb %ymm4,%ymm5,%ymm6\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 f2 d5 af 83 f4[ ]*vpmultishiftqb %ymm4,%ymm5,%ymm6\{%k7\}\{z\} +[ ]*[a-f0-9]+:[ ]*62 f2 d5 2f 83 31[ ]*vpmultishiftqb \(%ecx\),%ymm5,%ymm6\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 f2 d5 2f 83 b4 f4 c0 1d fe ff[ ]*vpmultishiftqb -0x1e240\(%esp,%esi,8\),%ymm5,%ymm6\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 f2 d5 3f 83 30[ ]*vpmultishiftqb \(%eax\)\{1to4\},%ymm5,%ymm6\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 f2 d5 2f 83 72 7f[ ]*vpmultishiftqb 0xfe0\(%edx\),%ymm5,%ymm6\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 f2 d5 2f 83 b2 00 10 00 00[ ]*vpmultishiftqb 0x1000\(%edx\),%ymm5,%ymm6\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 f2 d5 2f 83 72 80[ ]*vpmultishiftqb -0x1000\(%edx\),%ymm5,%ymm6\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 f2 d5 2f 83 b2 e0 ef ff ff[ ]*vpmultishiftqb -0x1020\(%edx\),%ymm5,%ymm6\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 f2 d5 3f 83 72 7f[ ]*vpmultishiftqb 0x3f8\(%edx\)\{1to4\},%ymm5,%ymm6\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 f2 d5 3f 83 b2 00 04 00 00[ ]*vpmultishiftqb 0x400\(%edx\)\{1to4\},%ymm5,%ymm6\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 f2 d5 3f 83 72 80[ ]*vpmultishiftqb -0x400\(%edx\)\{1to4\},%ymm5,%ymm6\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 f2 d5 3f 83 b2 f8 fb ff ff[ ]*vpmultishiftqb -0x408\(%edx\)\{1to4\},%ymm5,%ymm6\{%k7\} +#pass diff --git a/gas/testsuite/gas/i386/avx512vbmi_vl.s b/gas/testsuite/gas/i386/avx512vbmi_vl.s new file mode 100644 index 00000000000..4e7c20b7c7b --- /dev/null +++ b/gas/testsuite/gas/i386/avx512vbmi_vl.s @@ -0,0 +1,155 @@ +# Check 32bit AVX512{VBMI,VL} instructions + + .allow_index_reg + .text +_start: + vpermb %xmm4, %xmm5, %xmm6{%k7} # AVX512{VBMI,VL} + vpermb %xmm4, %xmm5, %xmm6{%k7}{z} # AVX512{VBMI,VL} + vpermb (%ecx), %xmm5, %xmm6{%k7} # AVX512{VBMI,VL} + vpermb -123456(%esp,%esi,8), %xmm5, %xmm6{%k7} # AVX512{VBMI,VL} + vpermb 2032(%edx), %xmm5, %xmm6{%k7} # AVX512{VBMI,VL} Disp8 + vpermb 2048(%edx), %xmm5, %xmm6{%k7} # AVX512{VBMI,VL} + vpermb -2048(%edx), %xmm5, %xmm6{%k7} # AVX512{VBMI,VL} Disp8 + vpermb -2064(%edx), %xmm5, %xmm6{%k7} # AVX512{VBMI,VL} + vpermb %ymm4, %ymm5, %ymm6{%k7} # AVX512{VBMI,VL} + vpermb %ymm4, %ymm5, %ymm6{%k7}{z} # AVX512{VBMI,VL} + vpermb (%ecx), %ymm5, %ymm6{%k7} # AVX512{VBMI,VL} + vpermb -123456(%esp,%esi,8), %ymm5, %ymm6{%k7} # AVX512{VBMI,VL} + vpermb 4064(%edx), %ymm5, %ymm6{%k7} # AVX512{VBMI,VL} Disp8 + vpermb 4096(%edx), %ymm5, %ymm6{%k7} # AVX512{VBMI,VL} + vpermb -4096(%edx), %ymm5, %ymm6{%k7} # AVX512{VBMI,VL} Disp8 + vpermb -4128(%edx), %ymm5, %ymm6{%k7} # AVX512{VBMI,VL} + vpermi2b %xmm4, %xmm5, %xmm6{%k7} # AVX512{VBMI,VL} + vpermi2b %xmm4, %xmm5, %xmm6{%k7}{z} # AVX512{VBMI,VL} + vpermi2b (%ecx), %xmm5, %xmm6{%k7} # AVX512{VBMI,VL} + vpermi2b -123456(%esp,%esi,8), %xmm5, %xmm6{%k7} # AVX512{VBMI,VL} + vpermi2b 2032(%edx), %xmm5, %xmm6{%k7} # AVX512{VBMI,VL} Disp8 + vpermi2b 2048(%edx), %xmm5, %xmm6{%k7} # AVX512{VBMI,VL} + vpermi2b -2048(%edx), %xmm5, %xmm6{%k7} # AVX512{VBMI,VL} Disp8 + vpermi2b -2064(%edx), %xmm5, %xmm6{%k7} # AVX512{VBMI,VL} + vpermi2b %ymm4, %ymm5, %ymm6{%k7} # AVX512{VBMI,VL} + vpermi2b %ymm4, %ymm5, %ymm6{%k7}{z} # AVX512{VBMI,VL} + vpermi2b (%ecx), %ymm5, %ymm6{%k7} # AVX512{VBMI,VL} + vpermi2b -123456(%esp,%esi,8), %ymm5, %ymm6{%k7} # AVX512{VBMI,VL} + vpermi2b 4064(%edx), %ymm5, %ymm6{%k7} # AVX512{VBMI,VL} Disp8 + vpermi2b 4096(%edx), %ymm5, %ymm6{%k7} # AVX512{VBMI,VL} + vpermi2b -4096(%edx), %ymm5, %ymm6{%k7} # AVX512{VBMI,VL} Disp8 + vpermi2b -4128(%edx), %ymm5, %ymm6{%k7} # AVX512{VBMI,VL} + vpermt2b %xmm4, %xmm5, %xmm6{%k7} # AVX512{VBMI,VL} + vpermt2b %xmm4, %xmm5, %xmm6{%k7}{z} # AVX512{VBMI,VL} + vpermt2b (%ecx), %xmm5, %xmm6{%k7} # AVX512{VBMI,VL} + vpermt2b -123456(%esp,%esi,8), %xmm5, %xmm6{%k7} # AVX512{VBMI,VL} + vpermt2b 2032(%edx), %xmm5, %xmm6{%k7} # AVX512{VBMI,VL} Disp8 + vpermt2b 2048(%edx), %xmm5, %xmm6{%k7} # AVX512{VBMI,VL} + vpermt2b -2048(%edx), %xmm5, %xmm6{%k7} # AVX512{VBMI,VL} Disp8 + vpermt2b -2064(%edx), %xmm5, %xmm6{%k7} # AVX512{VBMI,VL} + vpermt2b %ymm4, %ymm5, %ymm6{%k7} # AVX512{VBMI,VL} + vpermt2b %ymm4, %ymm5, %ymm6{%k7}{z} # AVX512{VBMI,VL} + vpermt2b (%ecx), %ymm5, %ymm6{%k7} # AVX512{VBMI,VL} + vpermt2b -123456(%esp,%esi,8), %ymm5, %ymm6{%k7} # AVX512{VBMI,VL} + vpermt2b 4064(%edx), %ymm5, %ymm6{%k7} # AVX512{VBMI,VL} Disp8 + vpermt2b 4096(%edx), %ymm5, %ymm6{%k7} # AVX512{VBMI,VL} + vpermt2b -4096(%edx), %ymm5, %ymm6{%k7} # AVX512{VBMI,VL} Disp8 + vpermt2b -4128(%edx), %ymm5, %ymm6{%k7} # AVX512{VBMI,VL} + vpmultishiftqb %xmm4, %xmm5, %xmm6{%k7} # AVX512{VBMI,VL} + vpmultishiftqb %xmm4, %xmm5, %xmm6{%k7}{z} # AVX512{VBMI,VL} + vpmultishiftqb (%ecx), %xmm5, %xmm6{%k7} # AVX512{VBMI,VL} + vpmultishiftqb -123456(%esp,%esi,8), %xmm5, %xmm6{%k7} # AVX512{VBMI,VL} + vpmultishiftqb (%eax){1to2}, %xmm5, %xmm6{%k7} # AVX512{VBMI,VL} + vpmultishiftqb 2032(%edx), %xmm5, %xmm6{%k7} # AVX512{VBMI,VL} Disp8 + vpmultishiftqb 2048(%edx), %xmm5, %xmm6{%k7} # AVX512{VBMI,VL} + vpmultishiftqb -2048(%edx), %xmm5, %xmm6{%k7} # AVX512{VBMI,VL} Disp8 + vpmultishiftqb -2064(%edx), %xmm5, %xmm6{%k7} # AVX512{VBMI,VL} + vpmultishiftqb 1016(%edx){1to2}, %xmm5, %xmm6{%k7} # AVX512{VBMI,VL} Disp8 + vpmultishiftqb 1024(%edx){1to2}, %xmm5, %xmm6{%k7} # AVX512{VBMI,VL} + vpmultishiftqb -1024(%edx){1to2}, %xmm5, %xmm6{%k7} # AVX512{VBMI,VL} Disp8 + vpmultishiftqb -1032(%edx){1to2}, %xmm5, %xmm6{%k7} # AVX512{VBMI,VL} + vpmultishiftqb %ymm4, %ymm5, %ymm6{%k7} # AVX512{VBMI,VL} + vpmultishiftqb %ymm4, %ymm5, %ymm6{%k7}{z} # AVX512{VBMI,VL} + vpmultishiftqb (%ecx), %ymm5, %ymm6{%k7} # AVX512{VBMI,VL} + vpmultishiftqb -123456(%esp,%esi,8), %ymm5, %ymm6{%k7} # AVX512{VBMI,VL} + vpmultishiftqb (%eax){1to4}, %ymm5, %ymm6{%k7} # AVX512{VBMI,VL} + vpmultishiftqb 4064(%edx), %ymm5, %ymm6{%k7} # AVX512{VBMI,VL} Disp8 + vpmultishiftqb 4096(%edx), %ymm5, %ymm6{%k7} # AVX512{VBMI,VL} + vpmultishiftqb -4096(%edx), %ymm5, %ymm6{%k7} # AVX512{VBMI,VL} Disp8 + vpmultishiftqb -4128(%edx), %ymm5, %ymm6{%k7} # AVX512{VBMI,VL} + vpmultishiftqb 1016(%edx){1to4}, %ymm5, %ymm6{%k7} # AVX512{VBMI,VL} Disp8 + vpmultishiftqb 1024(%edx){1to4}, %ymm5, %ymm6{%k7} # AVX512{VBMI,VL} + vpmultishiftqb -1024(%edx){1to4}, %ymm5, %ymm6{%k7} # AVX512{VBMI,VL} Disp8 + vpmultishiftqb -1032(%edx){1to4}, %ymm5, %ymm6{%k7} # AVX512{VBMI,VL} + + .intel_syntax noprefix + vpermb xmm6{k7}, xmm5, xmm4 # AVX512{VBMI,VL} + vpermb xmm6{k7}{z}, xmm5, xmm4 # AVX512{VBMI,VL} + vpermb xmm6{k7}, xmm5, XMMWORD PTR [ecx] # AVX512{VBMI,VL} + vpermb xmm6{k7}, xmm5, XMMWORD PTR [esp+esi*8-123456] # AVX512{VBMI,VL} + vpermb xmm6{k7}, xmm5, XMMWORD PTR [edx+2032] # AVX512{VBMI,VL} Disp8 + vpermb xmm6{k7}, xmm5, XMMWORD PTR [edx+2048] # AVX512{VBMI,VL} + vpermb xmm6{k7}, xmm5, XMMWORD PTR [edx-2048] # AVX512{VBMI,VL} Disp8 + vpermb xmm6{k7}, xmm5, XMMWORD PTR [edx-2064] # AVX512{VBMI,VL} + vpermb ymm6{k7}, ymm5, ymm4 # AVX512{VBMI,VL} + vpermb ymm6{k7}{z}, ymm5, ymm4 # AVX512{VBMI,VL} + vpermb ymm6{k7}, ymm5, YMMWORD PTR [ecx] # AVX512{VBMI,VL} + vpermb ymm6{k7}, ymm5, YMMWORD PTR [esp+esi*8-123456] # AVX512{VBMI,VL} + vpermb ymm6{k7}, ymm5, YMMWORD PTR [edx+4064] # AVX512{VBMI,VL} Disp8 + vpermb ymm6{k7}, ymm5, YMMWORD PTR [edx+4096] # AVX512{VBMI,VL} + vpermb ymm6{k7}, ymm5, YMMWORD PTR [edx-4096] # AVX512{VBMI,VL} Disp8 + vpermb ymm6{k7}, ymm5, YMMWORD PTR [edx-4128] # AVX512{VBMI,VL} + vpermi2b xmm6{k7}, xmm5, xmm4 # AVX512{VBMI,VL} + vpermi2b xmm6{k7}{z}, xmm5, xmm4 # AVX512{VBMI,VL} + vpermi2b xmm6{k7}, xmm5, XMMWORD PTR [ecx] # AVX512{VBMI,VL} + vpermi2b xmm6{k7}, xmm5, XMMWORD PTR [esp+esi*8-123456] # AVX512{VBMI,VL} + vpermi2b xmm6{k7}, xmm5, XMMWORD PTR [edx+2032] # AVX512{VBMI,VL} Disp8 + vpermi2b xmm6{k7}, xmm5, XMMWORD PTR [edx+2048] # AVX512{VBMI,VL} + vpermi2b xmm6{k7}, xmm5, XMMWORD PTR [edx-2048] # AVX512{VBMI,VL} Disp8 + vpermi2b xmm6{k7}, xmm5, XMMWORD PTR [edx-2064] # AVX512{VBMI,VL} + vpermi2b ymm6{k7}, ymm5, ymm4 # AVX512{VBMI,VL} + vpermi2b ymm6{k7}{z}, ymm5, ymm4 # AVX512{VBMI,VL} + vpermi2b ymm6{k7}, ymm5, YMMWORD PTR [ecx] # AVX512{VBMI,VL} + vpermi2b ymm6{k7}, ymm5, YMMWORD PTR [esp+esi*8-123456] # AVX512{VBMI,VL} + vpermi2b ymm6{k7}, ymm5, YMMWORD PTR [edx+4064] # AVX512{VBMI,VL} Disp8 + vpermi2b ymm6{k7}, ymm5, YMMWORD PTR [edx+4096] # AVX512{VBMI,VL} + vpermi2b ymm6{k7}, ymm5, YMMWORD PTR [edx-4096] # AVX512{VBMI,VL} Disp8 + vpermi2b ymm6{k7}, ymm5, YMMWORD PTR [edx-4128] # AVX512{VBMI,VL} + vpermt2b xmm6{k7}, xmm5, xmm4 # AVX512{VBMI,VL} + vpermt2b xmm6{k7}{z}, xmm5, xmm4 # AVX512{VBMI,VL} + vpermt2b xmm6{k7}, xmm5, XMMWORD PTR [ecx] # AVX512{VBMI,VL} + vpermt2b xmm6{k7}, xmm5, XMMWORD PTR [esp+esi*8-123456] # AVX512{VBMI,VL} + vpermt2b xmm6{k7}, xmm5, XMMWORD PTR [edx+2032] # AVX512{VBMI,VL} Disp8 + vpermt2b xmm6{k7}, xmm5, XMMWORD PTR [edx+2048] # AVX512{VBMI,VL} + vpermt2b xmm6{k7}, xmm5, XMMWORD PTR [edx-2048] # AVX512{VBMI,VL} Disp8 + vpermt2b xmm6{k7}, xmm5, XMMWORD PTR [edx-2064] # AVX512{VBMI,VL} + vpermt2b ymm6{k7}, ymm5, ymm4 # AVX512{VBMI,VL} + vpermt2b ymm6{k7}{z}, ymm5, ymm4 # AVX512{VBMI,VL} + vpermt2b ymm6{k7}, ymm5, YMMWORD PTR [ecx] # AVX512{VBMI,VL} + vpermt2b ymm6{k7}, ymm5, YMMWORD PTR [esp+esi*8-123456] # AVX512{VBMI,VL} + vpermt2b ymm6{k7}, ymm5, YMMWORD PTR [edx+4064] # AVX512{VBMI,VL} Disp8 + vpermt2b ymm6{k7}, ymm5, YMMWORD PTR [edx+4096] # AVX512{VBMI,VL} + vpermt2b ymm6{k7}, ymm5, YMMWORD PTR [edx-4096] # AVX512{VBMI,VL} Disp8 + vpermt2b ymm6{k7}, ymm5, YMMWORD PTR [edx-4128] # AVX512{VBMI,VL} + vpmultishiftqb xmm6{k7}, xmm5, xmm4 # AVX512{VBMI,VL} + vpmultishiftqb xmm6{k7}{z}, xmm5, xmm4 # AVX512{VBMI,VL} + vpmultishiftqb xmm6{k7}, xmm5, XMMWORD PTR [ecx] # AVX512{VBMI,VL} + vpmultishiftqb xmm6{k7}, xmm5, XMMWORD PTR [esp+esi*8-123456] # AVX512{VBMI,VL} + vpmultishiftqb xmm6{k7}, xmm5, [eax]{1to2} # AVX512{VBMI,VL} + vpmultishiftqb xmm6{k7}, xmm5, XMMWORD PTR [edx+2032] # AVX512{VBMI,VL} Disp8 + vpmultishiftqb xmm6{k7}, xmm5, XMMWORD PTR [edx+2048] # AVX512{VBMI,VL} + vpmultishiftqb xmm6{k7}, xmm5, XMMWORD PTR [edx-2048] # AVX512{VBMI,VL} Disp8 + vpmultishiftqb xmm6{k7}, xmm5, XMMWORD PTR [edx-2064] # AVX512{VBMI,VL} + vpmultishiftqb xmm6{k7}, xmm5, [edx+1016]{1to2} # AVX512{VBMI,VL} Disp8 + vpmultishiftqb xmm6{k7}, xmm5, [edx+1024]{1to2} # AVX512{VBMI,VL} + vpmultishiftqb xmm6{k7}, xmm5, [edx-1024]{1to2} # AVX512{VBMI,VL} Disp8 + vpmultishiftqb xmm6{k7}, xmm5, [edx-1032]{1to2} # AVX512{VBMI,VL} + vpmultishiftqb ymm6{k7}, ymm5, ymm4 # AVX512{VBMI,VL} + vpmultishiftqb ymm6{k7}{z}, ymm5, ymm4 # AVX512{VBMI,VL} + vpmultishiftqb ymm6{k7}, ymm5, YMMWORD PTR [ecx] # AVX512{VBMI,VL} + vpmultishiftqb ymm6{k7}, ymm5, YMMWORD PTR [esp+esi*8-123456] # AVX512{VBMI,VL} + vpmultishiftqb ymm6{k7}, ymm5, [eax]{1to4} # AVX512{VBMI,VL} + vpmultishiftqb ymm6{k7}, ymm5, YMMWORD PTR [edx+4064] # AVX512{VBMI,VL} Disp8 + vpmultishiftqb ymm6{k7}, ymm5, YMMWORD PTR [edx+4096] # AVX512{VBMI,VL} + vpmultishiftqb ymm6{k7}, ymm5, YMMWORD PTR [edx-4096] # AVX512{VBMI,VL} Disp8 + vpmultishiftqb ymm6{k7}, ymm5, YMMWORD PTR [edx-4128] # AVX512{VBMI,VL} + vpmultishiftqb ymm6{k7}, ymm5, [edx+1016]{1to4} # AVX512{VBMI,VL} Disp8 + vpmultishiftqb ymm6{k7}, ymm5, [edx+1024]{1to4} # AVX512{VBMI,VL} + vpmultishiftqb ymm6{k7}, ymm5, [edx-1024]{1to4} # AVX512{VBMI,VL} Disp8 + vpmultishiftqb ymm6{k7}, ymm5, [edx-1032]{1to4} # AVX512{VBMI,VL} diff --git a/gas/testsuite/gas/i386/clwb-intel.d b/gas/testsuite/gas/i386/clwb-intel.d new file mode 100644 index 00000000000..395f4c41012 --- /dev/null +++ b/gas/testsuite/gas/i386/clwb-intel.d @@ -0,0 +1,16 @@ +#as: +#objdump: -dw -Mintel +#name: i386 CLWB insns (Intel disassembly) +#source: clwb.s + +.*: +file format .* + + +Disassembly of section \.text: + +00000000 <_start>: +[ ]*[a-f0-9]+:[ ]*66 0f ae 31[ ]*clwb BYTE PTR \[ecx\] +[ ]*[a-f0-9]+:[ ]*66 0f ae b4 f4 c0 1d fe ff[ ]*clwb BYTE PTR \[esp\+esi\*8-0x1e240\] +[ ]*[a-f0-9]+:[ ]*66 0f ae 31[ ]*clwb BYTE PTR \[ecx\] +[ ]*[a-f0-9]+:[ ]*66 0f ae b4 f4 c0 1d fe ff[ ]*clwb BYTE PTR \[esp\+esi\*8-0x1e240\] +#pass diff --git a/gas/testsuite/gas/i386/clwb.d b/gas/testsuite/gas/i386/clwb.d new file mode 100644 index 00000000000..aa2a2bebc5f --- /dev/null +++ b/gas/testsuite/gas/i386/clwb.d @@ -0,0 +1,16 @@ +#as: +#objdump: -dw +#name: i386 CLWB insns +#source: clwb.s + +.*: +file format .* + + +Disassembly of section \.text: + +00000000 <_start>: +[ ]*[a-f0-9]+:[ ]*66 0f ae 31[ ]*clwb \(%ecx\) +[ ]*[a-f0-9]+:[ ]*66 0f ae b4 f4 c0 1d fe ff[ ]*clwb -0x1e240\(%esp,%esi,8\) +[ ]*[a-f0-9]+:[ ]*66 0f ae 31[ ]*clwb \(%ecx\) +[ ]*[a-f0-9]+:[ ]*66 0f ae b4 f4 c0 1d fe ff[ ]*clwb -0x1e240\(%esp,%esi,8\) +#pass diff --git a/gas/testsuite/gas/i386/clwb.s b/gas/testsuite/gas/i386/clwb.s new file mode 100644 index 00000000000..8132218257e --- /dev/null +++ b/gas/testsuite/gas/i386/clwb.s @@ -0,0 +1,12 @@ +# Check 32bit CLWB instructions + + .allow_index_reg + .text +_start: + + clwb (%ecx) # CLWB + clwb -123456(%esp,%esi,8) # CLWB + + .intel_syntax noprefix + clwb BYTE PTR [ecx] # CLWB + clwb BYTE PTR [esp+esi*8-123456] # CLWB diff --git a/gas/testsuite/gas/i386/i386.exp b/gas/testsuite/gas/i386/i386.exp index c55f3bf9fcb..31547db94aa 100644 --- a/gas/testsuite/gas/i386/i386.exp +++ b/gas/testsuite/gas/i386/i386.exp @@ -330,6 +330,18 @@ if [expr ([istarget "i*86-*-*"] || [istarget "x86_64-*-*"]) && [gas_32_check]] run_dump_test "avx512f-rcigru" run_dump_test "avx512f-rcigrz-intel" run_dump_test "avx512f-rcigrz" + run_dump_test "clwb" + run_dump_test "clwb-intel" + run_dump_test "pcommit" + run_dump_test "pcommit-intel" + run_dump_test "avx512ifma" + run_dump_test "avx512ifma-intel" + run_dump_test "avx512ifma_vl" + run_dump_test "avx512ifma_vl-intel" + run_dump_test "avx512vbmi" + run_dump_test "avx512vbmi-intel" + run_dump_test "avx512vbmi_vl" + run_dump_test "avx512vbmi_vl-intel" run_dump_test "disassem" # These tests require support for 8 and 16 bit relocs, @@ -681,6 +693,18 @@ if [expr ([istarget "i*86-*-*"] || [istarget "x86_64-*-*"]) && [gas_64_check]] t run_dump_test "x86-64-avx512f-rcigru" run_dump_test "x86-64-avx512f-rcigrz-intel" run_dump_test "x86-64-avx512f-rcigrz" + run_dump_test "x86-64-clwb" + run_dump_test "x86-64-clwb-intel" + run_dump_test "x86-64-pcommit" + run_dump_test "x86-64-pcommit-intel" + run_dump_test "x86-64-avx512ifma" + run_dump_test "x86-64-avx512ifma-intel" + run_dump_test "x86-64-avx512ifma_vl" + run_dump_test "x86-64-avx512ifma_vl-intel" + run_dump_test "x86-64-avx512vbmi" + run_dump_test "x86-64-avx512vbmi-intel" + run_dump_test "x86-64-avx512vbmi_vl" + run_dump_test "x86-64-avx512vbmi_vl-intel" if { ![istarget "*-*-aix*"] && ![istarget "*-*-beos*"] diff --git a/gas/testsuite/gas/i386/pcommit-intel.d b/gas/testsuite/gas/i386/pcommit-intel.d new file mode 100644 index 00000000000..ff34d10931a --- /dev/null +++ b/gas/testsuite/gas/i386/pcommit-intel.d @@ -0,0 +1,14 @@ +#as: +#objdump: -dw -Mintel +#name: i386 PCOMMIT insns (Intel disassembly) +#source: pcommit.s + +.*: +file format .* + + +Disassembly of section \.text: + +00000000 <_start>: +[ ]*[a-f0-9]+:[ ]*66 0f ae f8[ ]*pcommit +[ ]*[a-f0-9]+:[ ]*66 0f ae f8[ ]*pcommit +#pass diff --git a/gas/testsuite/gas/i386/pcommit.d b/gas/testsuite/gas/i386/pcommit.d new file mode 100644 index 00000000000..2af4576bd8d --- /dev/null +++ b/gas/testsuite/gas/i386/pcommit.d @@ -0,0 +1,14 @@ +#as: +#objdump: -dw +#name: i386 PCOMMIT insns +#source: pcommit.s + +.*: +file format .* + + +Disassembly of section \.text: + +00000000 <_start>: +[ ]*[a-f0-9]+:[ ]*66 0f ae f8[ ]*pcommit +[ ]*[a-f0-9]+:[ ]*66 0f ae f8[ ]*pcommit +#pass diff --git a/gas/testsuite/gas/i386/pcommit.s b/gas/testsuite/gas/i386/pcommit.s new file mode 100644 index 00000000000..b7913762f98 --- /dev/null +++ b/gas/testsuite/gas/i386/pcommit.s @@ -0,0 +1,10 @@ +# Check 32bit PCOMMIT instructions + + .allow_index_reg + .text +_start: + + pcommit # PCOMMIT + + .intel_syntax noprefix + pcommit # PCOMMIT diff --git a/gas/testsuite/gas/i386/x86-64-avx512ifma-intel.d b/gas/testsuite/gas/i386/x86-64-avx512ifma-intel.d new file mode 100644 index 00000000000..95fde4395b1 --- /dev/null +++ b/gas/testsuite/gas/i386/x86-64-avx512ifma-intel.d @@ -0,0 +1,68 @@ +#as: +#objdump: -dw -Mintel +#name: x86_64 AVX512IFMA insns (Intel disassembly) +#source: x86-64-avx512ifma.s + +.*: +file format .* + + +Disassembly of section \.text: + +0+ <_start>: +[ ]*[a-f0-9]+:[ ]*62 02 95 40 b4 f4[ ]*vpmadd52luq zmm30,zmm29,zmm28 +[ ]*[a-f0-9]+:[ ]*62 02 95 47 b4 f4[ ]*vpmadd52luq zmm30\{k7\},zmm29,zmm28 +[ ]*[a-f0-9]+:[ ]*62 02 95 c7 b4 f4[ ]*vpmadd52luq zmm30\{k7\}\{z\},zmm29,zmm28 +[ ]*[a-f0-9]+:[ ]*62 62 95 40 b4 31[ ]*vpmadd52luq zmm30,zmm29,ZMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+:[ ]*62 22 95 40 b4 b4 f0 23 01 00 00[ ]*vpmadd52luq zmm30,zmm29,ZMMWORD PTR \[rax\+r14\*8\+0x123\] +[ ]*[a-f0-9]+:[ ]*62 62 95 50 b4 31[ ]*vpmadd52luq zmm30,zmm29,QWORD PTR \[rcx\]\{1to8\} +[ ]*[a-f0-9]+:[ ]*62 62 95 40 b4 72 7f[ ]*vpmadd52luq zmm30,zmm29,ZMMWORD PTR \[rdx\+0x1fc0\] +[ ]*[a-f0-9]+:[ ]*62 62 95 40 b4 b2 00 20 00 00[ ]*vpmadd52luq zmm30,zmm29,ZMMWORD PTR \[rdx\+0x2000\] +[ ]*[a-f0-9]+:[ ]*62 62 95 40 b4 72 80[ ]*vpmadd52luq zmm30,zmm29,ZMMWORD PTR \[rdx-0x2000\] +[ ]*[a-f0-9]+:[ ]*62 62 95 40 b4 b2 c0 df ff ff[ ]*vpmadd52luq zmm30,zmm29,ZMMWORD PTR \[rdx-0x2040\] +[ ]*[a-f0-9]+:[ ]*62 62 95 50 b4 72 7f[ ]*vpmadd52luq zmm30,zmm29,QWORD PTR \[rdx\+0x3f8\]\{1to8\} +[ ]*[a-f0-9]+:[ ]*62 62 95 50 b4 b2 00 04 00 00[ ]*vpmadd52luq zmm30,zmm29,QWORD PTR \[rdx\+0x400\]\{1to8\} +[ ]*[a-f0-9]+:[ ]*62 62 95 50 b4 72 80[ ]*vpmadd52luq zmm30,zmm29,QWORD PTR \[rdx-0x400\]\{1to8\} +[ ]*[a-f0-9]+:[ ]*62 62 95 50 b4 b2 f8 fb ff ff[ ]*vpmadd52luq zmm30,zmm29,QWORD PTR \[rdx-0x408\]\{1to8\} +[ ]*[a-f0-9]+:[ ]*62 02 95 40 b5 f4[ ]*vpmadd52huq zmm30,zmm29,zmm28 +[ ]*[a-f0-9]+:[ ]*62 02 95 47 b5 f4[ ]*vpmadd52huq zmm30\{k7\},zmm29,zmm28 +[ ]*[a-f0-9]+:[ ]*62 02 95 c7 b5 f4[ ]*vpmadd52huq zmm30\{k7\}\{z\},zmm29,zmm28 +[ ]*[a-f0-9]+:[ ]*62 62 95 40 b5 31[ ]*vpmadd52huq zmm30,zmm29,ZMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+:[ ]*62 22 95 40 b5 b4 f0 23 01 00 00[ ]*vpmadd52huq zmm30,zmm29,ZMMWORD PTR \[rax\+r14\*8\+0x123\] +[ ]*[a-f0-9]+:[ ]*62 62 95 50 b5 31[ ]*vpmadd52huq zmm30,zmm29,QWORD PTR \[rcx\]\{1to8\} +[ ]*[a-f0-9]+:[ ]*62 62 95 40 b5 72 7f[ ]*vpmadd52huq zmm30,zmm29,ZMMWORD PTR \[rdx\+0x1fc0\] +[ ]*[a-f0-9]+:[ ]*62 62 95 40 b5 b2 00 20 00 00[ ]*vpmadd52huq zmm30,zmm29,ZMMWORD PTR \[rdx\+0x2000\] +[ ]*[a-f0-9]+:[ ]*62 62 95 40 b5 72 80[ ]*vpmadd52huq zmm30,zmm29,ZMMWORD PTR \[rdx-0x2000\] +[ ]*[a-f0-9]+:[ ]*62 62 95 40 b5 b2 c0 df ff ff[ ]*vpmadd52huq zmm30,zmm29,ZMMWORD PTR \[rdx-0x2040\] +[ ]*[a-f0-9]+:[ ]*62 62 95 50 b5 72 7f[ ]*vpmadd52huq zmm30,zmm29,QWORD PTR \[rdx\+0x3f8\]\{1to8\} +[ ]*[a-f0-9]+:[ ]*62 62 95 50 b5 b2 00 04 00 00[ ]*vpmadd52huq zmm30,zmm29,QWORD PTR \[rdx\+0x400\]\{1to8\} +[ ]*[a-f0-9]+:[ ]*62 62 95 50 b5 72 80[ ]*vpmadd52huq zmm30,zmm29,QWORD PTR \[rdx-0x400\]\{1to8\} +[ ]*[a-f0-9]+:[ ]*62 62 95 50 b5 b2 f8 fb ff ff[ ]*vpmadd52huq zmm30,zmm29,QWORD PTR \[rdx-0x408\]\{1to8\} +[ ]*[a-f0-9]+:[ ]*62 02 95 40 b4 f4[ ]*vpmadd52luq zmm30,zmm29,zmm28 +[ ]*[a-f0-9]+:[ ]*62 02 95 47 b4 f4[ ]*vpmadd52luq zmm30\{k7\},zmm29,zmm28 +[ ]*[a-f0-9]+:[ ]*62 02 95 c7 b4 f4[ ]*vpmadd52luq zmm30\{k7\}\{z\},zmm29,zmm28 +[ ]*[a-f0-9]+:[ ]*62 62 95 40 b4 31[ ]*vpmadd52luq zmm30,zmm29,ZMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+:[ ]*62 22 95 40 b4 b4 f0 34 12 00 00[ ]*vpmadd52luq zmm30,zmm29,ZMMWORD PTR \[rax\+r14\*8\+0x1234\] +[ ]*[a-f0-9]+:[ ]*62 62 95 50 b4 31[ ]*vpmadd52luq zmm30,zmm29,QWORD PTR \[rcx\]\{1to8\} +[ ]*[a-f0-9]+:[ ]*62 62 95 40 b4 72 7f[ ]*vpmadd52luq zmm30,zmm29,ZMMWORD PTR \[rdx\+0x1fc0\] +[ ]*[a-f0-9]+:[ ]*62 62 95 40 b4 b2 00 20 00 00[ ]*vpmadd52luq zmm30,zmm29,ZMMWORD PTR \[rdx\+0x2000\] +[ ]*[a-f0-9]+:[ ]*62 62 95 40 b4 72 80[ ]*vpmadd52luq zmm30,zmm29,ZMMWORD PTR \[rdx-0x2000\] +[ ]*[a-f0-9]+:[ ]*62 62 95 40 b4 b2 c0 df ff ff[ ]*vpmadd52luq zmm30,zmm29,ZMMWORD PTR \[rdx-0x2040\] +[ ]*[a-f0-9]+:[ ]*62 62 95 50 b4 72 7f[ ]*vpmadd52luq zmm30,zmm29,QWORD PTR \[rdx\+0x3f8\]\{1to8\} +[ ]*[a-f0-9]+:[ ]*62 62 95 50 b4 b2 00 04 00 00[ ]*vpmadd52luq zmm30,zmm29,QWORD PTR \[rdx\+0x400\]\{1to8\} +[ ]*[a-f0-9]+:[ ]*62 62 95 50 b4 72 80[ ]*vpmadd52luq zmm30,zmm29,QWORD PTR \[rdx-0x400\]\{1to8\} +[ ]*[a-f0-9]+:[ ]*62 62 95 50 b4 b2 f8 fb ff ff[ ]*vpmadd52luq zmm30,zmm29,QWORD PTR \[rdx-0x408\]\{1to8\} +[ ]*[a-f0-9]+:[ ]*62 02 95 40 b5 f4[ ]*vpmadd52huq zmm30,zmm29,zmm28 +[ ]*[a-f0-9]+:[ ]*62 02 95 47 b5 f4[ ]*vpmadd52huq zmm30\{k7\},zmm29,zmm28 +[ ]*[a-f0-9]+:[ ]*62 02 95 c7 b5 f4[ ]*vpmadd52huq zmm30\{k7\}\{z\},zmm29,zmm28 +[ ]*[a-f0-9]+:[ ]*62 62 95 40 b5 31[ ]*vpmadd52huq zmm30,zmm29,ZMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+:[ ]*62 22 95 40 b5 b4 f0 34 12 00 00[ ]*vpmadd52huq zmm30,zmm29,ZMMWORD PTR \[rax\+r14\*8\+0x1234\] +[ ]*[a-f0-9]+:[ ]*62 62 95 50 b5 31[ ]*vpmadd52huq zmm30,zmm29,QWORD PTR \[rcx\]\{1to8\} +[ ]*[a-f0-9]+:[ ]*62 62 95 40 b5 72 7f[ ]*vpmadd52huq zmm30,zmm29,ZMMWORD PTR \[rdx\+0x1fc0\] +[ ]*[a-f0-9]+:[ ]*62 62 95 40 b5 b2 00 20 00 00[ ]*vpmadd52huq zmm30,zmm29,ZMMWORD PTR \[rdx\+0x2000\] +[ ]*[a-f0-9]+:[ ]*62 62 95 40 b5 72 80[ ]*vpmadd52huq zmm30,zmm29,ZMMWORD PTR \[rdx-0x2000\] +[ ]*[a-f0-9]+:[ ]*62 62 95 40 b5 b2 c0 df ff ff[ ]*vpmadd52huq zmm30,zmm29,ZMMWORD PTR \[rdx-0x2040\] +[ ]*[a-f0-9]+:[ ]*62 62 95 50 b5 72 7f[ ]*vpmadd52huq zmm30,zmm29,QWORD PTR \[rdx\+0x3f8\]\{1to8\} +[ ]*[a-f0-9]+:[ ]*62 62 95 50 b5 b2 00 04 00 00[ ]*vpmadd52huq zmm30,zmm29,QWORD PTR \[rdx\+0x400\]\{1to8\} +[ ]*[a-f0-9]+:[ ]*62 62 95 50 b5 72 80[ ]*vpmadd52huq zmm30,zmm29,QWORD PTR \[rdx-0x400\]\{1to8\} +[ ]*[a-f0-9]+:[ ]*62 62 95 50 b5 b2 f8 fb ff ff[ ]*vpmadd52huq zmm30,zmm29,QWORD PTR \[rdx-0x408\]\{1to8\} +#pass diff --git a/gas/testsuite/gas/i386/x86-64-avx512ifma.d b/gas/testsuite/gas/i386/x86-64-avx512ifma.d new file mode 100644 index 00000000000..14b7b0a7960 --- /dev/null +++ b/gas/testsuite/gas/i386/x86-64-avx512ifma.d @@ -0,0 +1,68 @@ +#as: +#objdump: -dw +#name: x86_64 AVX512IFMA insns +#source: x86-64-avx512ifma.s + +.*: +file format .* + + +Disassembly of section \.text: + +0+ <_start>: +[ ]*[a-f0-9]+:[ ]*62 02 95 40 b4 f4[ ]*vpmadd52luq %zmm28,%zmm29,%zmm30 +[ ]*[a-f0-9]+:[ ]*62 02 95 47 b4 f4[ ]*vpmadd52luq %zmm28,%zmm29,%zmm30\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 02 95 c7 b4 f4[ ]*vpmadd52luq %zmm28,%zmm29,%zmm30\{%k7\}\{z\} +[ ]*[a-f0-9]+:[ ]*62 62 95 40 b4 31[ ]*vpmadd52luq \(%rcx\),%zmm29,%zmm30 +[ ]*[a-f0-9]+:[ ]*62 22 95 40 b4 b4 f0 23 01 00 00[ ]*vpmadd52luq 0x123\(%rax,%r14,8\),%zmm29,%zmm30 +[ ]*[a-f0-9]+:[ ]*62 62 95 50 b4 31[ ]*vpmadd52luq \(%rcx\)\{1to8\},%zmm29,%zmm30 +[ ]*[a-f0-9]+:[ ]*62 62 95 40 b4 72 7f[ ]*vpmadd52luq 0x1fc0\(%rdx\),%zmm29,%zmm30 +[ ]*[a-f0-9]+:[ ]*62 62 95 40 b4 b2 00 20 00 00[ ]*vpmadd52luq 0x2000\(%rdx\),%zmm29,%zmm30 +[ ]*[a-f0-9]+:[ ]*62 62 95 40 b4 72 80[ ]*vpmadd52luq -0x2000\(%rdx\),%zmm29,%zmm30 +[ ]*[a-f0-9]+:[ ]*62 62 95 40 b4 b2 c0 df ff ff[ ]*vpmadd52luq -0x2040\(%rdx\),%zmm29,%zmm30 +[ ]*[a-f0-9]+:[ ]*62 62 95 50 b4 72 7f[ ]*vpmadd52luq 0x3f8\(%rdx\)\{1to8\},%zmm29,%zmm30 +[ ]*[a-f0-9]+:[ ]*62 62 95 50 b4 b2 00 04 00 00[ ]*vpmadd52luq 0x400\(%rdx\)\{1to8\},%zmm29,%zmm30 +[ ]*[a-f0-9]+:[ ]*62 62 95 50 b4 72 80[ ]*vpmadd52luq -0x400\(%rdx\)\{1to8\},%zmm29,%zmm30 +[ ]*[a-f0-9]+:[ ]*62 62 95 50 b4 b2 f8 fb ff ff[ ]*vpmadd52luq -0x408\(%rdx\)\{1to8\},%zmm29,%zmm30 +[ ]*[a-f0-9]+:[ ]*62 02 95 40 b5 f4[ ]*vpmadd52huq %zmm28,%zmm29,%zmm30 +[ ]*[a-f0-9]+:[ ]*62 02 95 47 b5 f4[ ]*vpmadd52huq %zmm28,%zmm29,%zmm30\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 02 95 c7 b5 f4[ ]*vpmadd52huq %zmm28,%zmm29,%zmm30\{%k7\}\{z\} +[ ]*[a-f0-9]+:[ ]*62 62 95 40 b5 31[ ]*vpmadd52huq \(%rcx\),%zmm29,%zmm30 +[ ]*[a-f0-9]+:[ ]*62 22 95 40 b5 b4 f0 23 01 00 00[ ]*vpmadd52huq 0x123\(%rax,%r14,8\),%zmm29,%zmm30 +[ ]*[a-f0-9]+:[ ]*62 62 95 50 b5 31[ ]*vpmadd52huq \(%rcx\)\{1to8\},%zmm29,%zmm30 +[ ]*[a-f0-9]+:[ ]*62 62 95 40 b5 72 7f[ ]*vpmadd52huq 0x1fc0\(%rdx\),%zmm29,%zmm30 +[ ]*[a-f0-9]+:[ ]*62 62 95 40 b5 b2 00 20 00 00[ ]*vpmadd52huq 0x2000\(%rdx\),%zmm29,%zmm30 +[ ]*[a-f0-9]+:[ ]*62 62 95 40 b5 72 80[ ]*vpmadd52huq -0x2000\(%rdx\),%zmm29,%zmm30 +[ ]*[a-f0-9]+:[ ]*62 62 95 40 b5 b2 c0 df ff ff[ ]*vpmadd52huq -0x2040\(%rdx\),%zmm29,%zmm30 +[ ]*[a-f0-9]+:[ ]*62 62 95 50 b5 72 7f[ ]*vpmadd52huq 0x3f8\(%rdx\)\{1to8\},%zmm29,%zmm30 +[ ]*[a-f0-9]+:[ ]*62 62 95 50 b5 b2 00 04 00 00[ ]*vpmadd52huq 0x400\(%rdx\)\{1to8\},%zmm29,%zmm30 +[ ]*[a-f0-9]+:[ ]*62 62 95 50 b5 72 80[ ]*vpmadd52huq -0x400\(%rdx\)\{1to8\},%zmm29,%zmm30 +[ ]*[a-f0-9]+:[ ]*62 62 95 50 b5 b2 f8 fb ff ff[ ]*vpmadd52huq -0x408\(%rdx\)\{1to8\},%zmm29,%zmm30 +[ ]*[a-f0-9]+:[ ]*62 02 95 40 b4 f4[ ]*vpmadd52luq %zmm28,%zmm29,%zmm30 +[ ]*[a-f0-9]+:[ ]*62 02 95 47 b4 f4[ ]*vpmadd52luq %zmm28,%zmm29,%zmm30\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 02 95 c7 b4 f4[ ]*vpmadd52luq %zmm28,%zmm29,%zmm30\{%k7\}\{z\} +[ ]*[a-f0-9]+:[ ]*62 62 95 40 b4 31[ ]*vpmadd52luq \(%rcx\),%zmm29,%zmm30 +[ ]*[a-f0-9]+:[ ]*62 22 95 40 b4 b4 f0 34 12 00 00[ ]*vpmadd52luq 0x1234\(%rax,%r14,8\),%zmm29,%zmm30 +[ ]*[a-f0-9]+:[ ]*62 62 95 50 b4 31[ ]*vpmadd52luq \(%rcx\)\{1to8\},%zmm29,%zmm30 +[ ]*[a-f0-9]+:[ ]*62 62 95 40 b4 72 7f[ ]*vpmadd52luq 0x1fc0\(%rdx\),%zmm29,%zmm30 +[ ]*[a-f0-9]+:[ ]*62 62 95 40 b4 b2 00 20 00 00[ ]*vpmadd52luq 0x2000\(%rdx\),%zmm29,%zmm30 +[ ]*[a-f0-9]+:[ ]*62 62 95 40 b4 72 80[ ]*vpmadd52luq -0x2000\(%rdx\),%zmm29,%zmm30 +[ ]*[a-f0-9]+:[ ]*62 62 95 40 b4 b2 c0 df ff ff[ ]*vpmadd52luq -0x2040\(%rdx\),%zmm29,%zmm30 +[ ]*[a-f0-9]+:[ ]*62 62 95 50 b4 72 7f[ ]*vpmadd52luq 0x3f8\(%rdx\)\{1to8\},%zmm29,%zmm30 +[ ]*[a-f0-9]+:[ ]*62 62 95 50 b4 b2 00 04 00 00[ ]*vpmadd52luq 0x400\(%rdx\)\{1to8\},%zmm29,%zmm30 +[ ]*[a-f0-9]+:[ ]*62 62 95 50 b4 72 80[ ]*vpmadd52luq -0x400\(%rdx\)\{1to8\},%zmm29,%zmm30 +[ ]*[a-f0-9]+:[ ]*62 62 95 50 b4 b2 f8 fb ff ff[ ]*vpmadd52luq -0x408\(%rdx\)\{1to8\},%zmm29,%zmm30 +[ ]*[a-f0-9]+:[ ]*62 02 95 40 b5 f4[ ]*vpmadd52huq %zmm28,%zmm29,%zmm30 +[ ]*[a-f0-9]+:[ ]*62 02 95 47 b5 f4[ ]*vpmadd52huq %zmm28,%zmm29,%zmm30\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 02 95 c7 b5 f4[ ]*vpmadd52huq %zmm28,%zmm29,%zmm30\{%k7\}\{z\} +[ ]*[a-f0-9]+:[ ]*62 62 95 40 b5 31[ ]*vpmadd52huq \(%rcx\),%zmm29,%zmm30 +[ ]*[a-f0-9]+:[ ]*62 22 95 40 b5 b4 f0 34 12 00 00[ ]*vpmadd52huq 0x1234\(%rax,%r14,8\),%zmm29,%zmm30 +[ ]*[a-f0-9]+:[ ]*62 62 95 50 b5 31[ ]*vpmadd52huq \(%rcx\)\{1to8\},%zmm29,%zmm30 +[ ]*[a-f0-9]+:[ ]*62 62 95 40 b5 72 7f[ ]*vpmadd52huq 0x1fc0\(%rdx\),%zmm29,%zmm30 +[ ]*[a-f0-9]+:[ ]*62 62 95 40 b5 b2 00 20 00 00[ ]*vpmadd52huq 0x2000\(%rdx\),%zmm29,%zmm30 +[ ]*[a-f0-9]+:[ ]*62 62 95 40 b5 72 80[ ]*vpmadd52huq -0x2000\(%rdx\),%zmm29,%zmm30 +[ ]*[a-f0-9]+:[ ]*62 62 95 40 b5 b2 c0 df ff ff[ ]*vpmadd52huq -0x2040\(%rdx\),%zmm29,%zmm30 +[ ]*[a-f0-9]+:[ ]*62 62 95 50 b5 72 7f[ ]*vpmadd52huq 0x3f8\(%rdx\)\{1to8\},%zmm29,%zmm30 +[ ]*[a-f0-9]+:[ ]*62 62 95 50 b5 b2 00 04 00 00[ ]*vpmadd52huq 0x400\(%rdx\)\{1to8\},%zmm29,%zmm30 +[ ]*[a-f0-9]+:[ ]*62 62 95 50 b5 72 80[ ]*vpmadd52huq -0x400\(%rdx\)\{1to8\},%zmm29,%zmm30 +[ ]*[a-f0-9]+:[ ]*62 62 95 50 b5 b2 f8 fb ff ff[ ]*vpmadd52huq -0x408\(%rdx\)\{1to8\},%zmm29,%zmm30 +#pass diff --git a/gas/testsuite/gas/i386/x86-64-avx512ifma.s b/gas/testsuite/gas/i386/x86-64-avx512ifma.s new file mode 100644 index 00000000000..ff1f78a5734 --- /dev/null +++ b/gas/testsuite/gas/i386/x86-64-avx512ifma.s @@ -0,0 +1,63 @@ +# Check 64bit AVX512IFMA instructions + + .allow_index_reg + .text +_start: + vpmadd52luq %zmm28, %zmm29, %zmm30 # AVX512IFMA + vpmadd52luq %zmm28, %zmm29, %zmm30{%k7} # AVX512IFMA + vpmadd52luq %zmm28, %zmm29, %zmm30{%k7}{z} # AVX512IFMA + vpmadd52luq (%rcx), %zmm29, %zmm30 # AVX512IFMA + vpmadd52luq 0x123(%rax,%r14,8), %zmm29, %zmm30 # AVX512IFMA + vpmadd52luq (%rcx){1to8}, %zmm29, %zmm30 # AVX512IFMA + vpmadd52luq 8128(%rdx), %zmm29, %zmm30 # AVX512IFMA Disp8 + vpmadd52luq 8192(%rdx), %zmm29, %zmm30 # AVX512IFMA + vpmadd52luq -8192(%rdx), %zmm29, %zmm30 # AVX512IFMA Disp8 + vpmadd52luq -8256(%rdx), %zmm29, %zmm30 # AVX512IFMA + vpmadd52luq 1016(%rdx){1to8}, %zmm29, %zmm30 # AVX512IFMA Disp8 + vpmadd52luq 1024(%rdx){1to8}, %zmm29, %zmm30 # AVX512IFMA + vpmadd52luq -1024(%rdx){1to8}, %zmm29, %zmm30 # AVX512IFMA Disp8 + vpmadd52luq -1032(%rdx){1to8}, %zmm29, %zmm30 # AVX512IFMA + vpmadd52huq %zmm28, %zmm29, %zmm30 # AVX512IFMA + vpmadd52huq %zmm28, %zmm29, %zmm30{%k7} # AVX512IFMA + vpmadd52huq %zmm28, %zmm29, %zmm30{%k7}{z} # AVX512IFMA + vpmadd52huq (%rcx), %zmm29, %zmm30 # AVX512IFMA + vpmadd52huq 0x123(%rax,%r14,8), %zmm29, %zmm30 # AVX512IFMA + vpmadd52huq (%rcx){1to8}, %zmm29, %zmm30 # AVX512IFMA + vpmadd52huq 8128(%rdx), %zmm29, %zmm30 # AVX512IFMA Disp8 + vpmadd52huq 8192(%rdx), %zmm29, %zmm30 # AVX512IFMA + vpmadd52huq -8192(%rdx), %zmm29, %zmm30 # AVX512IFMA Disp8 + vpmadd52huq -8256(%rdx), %zmm29, %zmm30 # AVX512IFMA + vpmadd52huq 1016(%rdx){1to8}, %zmm29, %zmm30 # AVX512IFMA Disp8 + vpmadd52huq 1024(%rdx){1to8}, %zmm29, %zmm30 # AVX512IFMA + vpmadd52huq -1024(%rdx){1to8}, %zmm29, %zmm30 # AVX512IFMA Disp8 + vpmadd52huq -1032(%rdx){1to8}, %zmm29, %zmm30 # AVX512IFMA + + .intel_syntax noprefix + vpmadd52luq zmm30, zmm29, zmm28 # AVX512IFMA + vpmadd52luq zmm30{k7}, zmm29, zmm28 # AVX512IFMA + vpmadd52luq zmm30{k7}{z}, zmm29, zmm28 # AVX512IFMA + vpmadd52luq zmm30, zmm29, ZMMWORD PTR [rcx] # AVX512IFMA + vpmadd52luq zmm30, zmm29, ZMMWORD PTR [rax+r14*8+0x1234] # AVX512IFMA + vpmadd52luq zmm30, zmm29, [rcx]{1to8} # AVX512IFMA + vpmadd52luq zmm30, zmm29, ZMMWORD PTR [rdx+8128] # AVX512IFMA Disp8 + vpmadd52luq zmm30, zmm29, ZMMWORD PTR [rdx+8192] # AVX512IFMA + vpmadd52luq zmm30, zmm29, ZMMWORD PTR [rdx-8192] # AVX512IFMA Disp8 + vpmadd52luq zmm30, zmm29, ZMMWORD PTR [rdx-8256] # AVX512IFMA + vpmadd52luq zmm30, zmm29, [rdx+1016]{1to8} # AVX512IFMA Disp8 + vpmadd52luq zmm30, zmm29, [rdx+1024]{1to8} # AVX512IFMA + vpmadd52luq zmm30, zmm29, [rdx-1024]{1to8} # AVX512IFMA Disp8 + vpmadd52luq zmm30, zmm29, [rdx-1032]{1to8} # AVX512IFMA + vpmadd52huq zmm30, zmm29, zmm28 # AVX512IFMA + vpmadd52huq zmm30{k7}, zmm29, zmm28 # AVX512IFMA + vpmadd52huq zmm30{k7}{z}, zmm29, zmm28 # AVX512IFMA + vpmadd52huq zmm30, zmm29, ZMMWORD PTR [rcx] # AVX512IFMA + vpmadd52huq zmm30, zmm29, ZMMWORD PTR [rax+r14*8+0x1234] # AVX512IFMA + vpmadd52huq zmm30, zmm29, [rcx]{1to8} # AVX512IFMA + vpmadd52huq zmm30, zmm29, ZMMWORD PTR [rdx+8128] # AVX512IFMA Disp8 + vpmadd52huq zmm30, zmm29, ZMMWORD PTR [rdx+8192] # AVX512IFMA + vpmadd52huq zmm30, zmm29, ZMMWORD PTR [rdx-8192] # AVX512IFMA Disp8 + vpmadd52huq zmm30, zmm29, ZMMWORD PTR [rdx-8256] # AVX512IFMA + vpmadd52huq zmm30, zmm29, [rdx+1016]{1to8} # AVX512IFMA Disp8 + vpmadd52huq zmm30, zmm29, [rdx+1024]{1to8} # AVX512IFMA + vpmadd52huq zmm30, zmm29, [rdx-1024]{1to8} # AVX512IFMA Disp8 + vpmadd52huq zmm30, zmm29, [rdx-1032]{1to8} # AVX512IFMA diff --git a/gas/testsuite/gas/i386/x86-64-avx512ifma_vl-intel.d b/gas/testsuite/gas/i386/x86-64-avx512ifma_vl-intel.d new file mode 100644 index 00000000000..47ace43c441 --- /dev/null +++ b/gas/testsuite/gas/i386/x86-64-avx512ifma_vl-intel.d @@ -0,0 +1,124 @@ +#as: +#objdump: -dw -Mintel +#name: x86_64 AVX512IFMA/VL insns (Intel disassembly) +#source: x86-64-avx512ifma_vl.s + +.*: +file format .* + + +Disassembly of section \.text: + +0+ <_start>: +[ ]*[a-f0-9]+:[ ]*62 02 95 00 b4 f4[ ]*vpmadd52luq xmm30,xmm29,xmm28 +[ ]*[a-f0-9]+:[ ]*62 02 95 07 b4 f4[ ]*vpmadd52luq xmm30\{k7\},xmm29,xmm28 +[ ]*[a-f0-9]+:[ ]*62 02 95 87 b4 f4[ ]*vpmadd52luq xmm30\{k7\}\{z\},xmm29,xmm28 +[ ]*[a-f0-9]+:[ ]*62 62 95 00 b4 31[ ]*vpmadd52luq xmm30,xmm29,XMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+:[ ]*62 22 95 00 b4 b4 f0 23 01 00 00[ ]*vpmadd52luq xmm30,xmm29,XMMWORD PTR \[rax\+r14\*8\+0x123\] +[ ]*[a-f0-9]+:[ ]*62 62 95 10 b4 31[ ]*vpmadd52luq xmm30,xmm29,QWORD PTR \[rcx\]\{1to2\} +[ ]*[a-f0-9]+:[ ]*62 62 95 00 b4 72 7f[ ]*vpmadd52luq xmm30,xmm29,XMMWORD PTR \[rdx\+0x7f0\] +[ ]*[a-f0-9]+:[ ]*62 62 95 00 b4 b2 00 08 00 00[ ]*vpmadd52luq xmm30,xmm29,XMMWORD PTR \[rdx\+0x800\] +[ ]*[a-f0-9]+:[ ]*62 62 95 00 b4 72 80[ ]*vpmadd52luq xmm30,xmm29,XMMWORD PTR \[rdx-0x800\] +[ ]*[a-f0-9]+:[ ]*62 62 95 00 b4 b2 f0 f7 ff ff[ ]*vpmadd52luq xmm30,xmm29,XMMWORD PTR \[rdx-0x810\] +[ ]*[a-f0-9]+:[ ]*62 62 95 10 b4 72 7f[ ]*vpmadd52luq xmm30,xmm29,QWORD PTR \[rdx\+0x3f8\]\{1to2\} +[ ]*[a-f0-9]+:[ ]*62 62 95 10 b4 b2 00 04 00 00[ ]*vpmadd52luq xmm30,xmm29,QWORD PTR \[rdx\+0x400\]\{1to2\} +[ ]*[a-f0-9]+:[ ]*62 62 95 10 b4 72 80[ ]*vpmadd52luq xmm30,xmm29,QWORD PTR \[rdx-0x400\]\{1to2\} +[ ]*[a-f0-9]+:[ ]*62 62 95 10 b4 b2 f8 fb ff ff[ ]*vpmadd52luq xmm30,xmm29,QWORD PTR \[rdx-0x408\]\{1to2\} +[ ]*[a-f0-9]+:[ ]*62 02 95 20 b4 f4[ ]*vpmadd52luq ymm30,ymm29,ymm28 +[ ]*[a-f0-9]+:[ ]*62 02 95 27 b4 f4[ ]*vpmadd52luq ymm30\{k7\},ymm29,ymm28 +[ ]*[a-f0-9]+:[ ]*62 02 95 a7 b4 f4[ ]*vpmadd52luq ymm30\{k7\}\{z\},ymm29,ymm28 +[ ]*[a-f0-9]+:[ ]*62 62 95 20 b4 31[ ]*vpmadd52luq ymm30,ymm29,YMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+:[ ]*62 22 95 20 b4 b4 f0 23 01 00 00[ ]*vpmadd52luq ymm30,ymm29,YMMWORD PTR \[rax\+r14\*8\+0x123\] +[ ]*[a-f0-9]+:[ ]*62 62 95 30 b4 31[ ]*vpmadd52luq ymm30,ymm29,QWORD PTR \[rcx\]\{1to4\} +[ ]*[a-f0-9]+:[ ]*62 62 95 20 b4 72 7f[ ]*vpmadd52luq ymm30,ymm29,YMMWORD PTR \[rdx\+0xfe0\] +[ ]*[a-f0-9]+:[ ]*62 62 95 20 b4 b2 00 10 00 00[ ]*vpmadd52luq ymm30,ymm29,YMMWORD PTR \[rdx\+0x1000\] +[ ]*[a-f0-9]+:[ ]*62 62 95 20 b4 72 80[ ]*vpmadd52luq ymm30,ymm29,YMMWORD PTR \[rdx-0x1000\] +[ ]*[a-f0-9]+:[ ]*62 62 95 20 b4 b2 e0 ef ff ff[ ]*vpmadd52luq ymm30,ymm29,YMMWORD PTR \[rdx-0x1020\] +[ ]*[a-f0-9]+:[ ]*62 62 95 30 b4 72 7f[ ]*vpmadd52luq ymm30,ymm29,QWORD PTR \[rdx\+0x3f8\]\{1to4\} +[ ]*[a-f0-9]+:[ ]*62 62 95 30 b4 b2 00 04 00 00[ ]*vpmadd52luq ymm30,ymm29,QWORD PTR \[rdx\+0x400\]\{1to4\} +[ ]*[a-f0-9]+:[ ]*62 62 95 30 b4 72 80[ ]*vpmadd52luq ymm30,ymm29,QWORD PTR \[rdx-0x400\]\{1to4\} +[ ]*[a-f0-9]+:[ ]*62 62 95 30 b4 b2 f8 fb ff ff[ ]*vpmadd52luq ymm30,ymm29,QWORD PTR \[rdx-0x408\]\{1to4\} +[ ]*[a-f0-9]+:[ ]*62 02 95 00 b5 f4[ ]*vpmadd52huq xmm30,xmm29,xmm28 +[ ]*[a-f0-9]+:[ ]*62 02 95 07 b5 f4[ ]*vpmadd52huq xmm30\{k7\},xmm29,xmm28 +[ ]*[a-f0-9]+:[ ]*62 02 95 87 b5 f4[ ]*vpmadd52huq xmm30\{k7\}\{z\},xmm29,xmm28 +[ ]*[a-f0-9]+:[ ]*62 62 95 00 b5 31[ ]*vpmadd52huq xmm30,xmm29,XMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+:[ ]*62 22 95 00 b5 b4 f0 23 01 00 00[ ]*vpmadd52huq xmm30,xmm29,XMMWORD PTR \[rax\+r14\*8\+0x123\] +[ ]*[a-f0-9]+:[ ]*62 62 95 10 b5 31[ ]*vpmadd52huq xmm30,xmm29,QWORD PTR \[rcx\]\{1to2\} +[ ]*[a-f0-9]+:[ ]*62 62 95 00 b5 72 7f[ ]*vpmadd52huq xmm30,xmm29,XMMWORD PTR \[rdx\+0x7f0\] +[ ]*[a-f0-9]+:[ ]*62 62 95 00 b5 b2 00 08 00 00[ ]*vpmadd52huq xmm30,xmm29,XMMWORD PTR \[rdx\+0x800\] +[ ]*[a-f0-9]+:[ ]*62 62 95 00 b5 72 80[ ]*vpmadd52huq xmm30,xmm29,XMMWORD PTR \[rdx-0x800\] +[ ]*[a-f0-9]+:[ ]*62 62 95 00 b5 b2 f0 f7 ff ff[ ]*vpmadd52huq xmm30,xmm29,XMMWORD PTR \[rdx-0x810\] +[ ]*[a-f0-9]+:[ ]*62 62 95 10 b5 72 7f[ ]*vpmadd52huq xmm30,xmm29,QWORD PTR \[rdx\+0x3f8\]\{1to2\} +[ ]*[a-f0-9]+:[ ]*62 62 95 10 b5 b2 00 04 00 00[ ]*vpmadd52huq xmm30,xmm29,QWORD PTR \[rdx\+0x400\]\{1to2\} +[ ]*[a-f0-9]+:[ ]*62 62 95 10 b5 72 80[ ]*vpmadd52huq xmm30,xmm29,QWORD PTR \[rdx-0x400\]\{1to2\} +[ ]*[a-f0-9]+:[ ]*62 62 95 10 b5 b2 f8 fb ff ff[ ]*vpmadd52huq xmm30,xmm29,QWORD PTR \[rdx-0x408\]\{1to2\} +[ ]*[a-f0-9]+:[ ]*62 02 95 20 b5 f4[ ]*vpmadd52huq ymm30,ymm29,ymm28 +[ ]*[a-f0-9]+:[ ]*62 02 95 27 b5 f4[ ]*vpmadd52huq ymm30\{k7\},ymm29,ymm28 +[ ]*[a-f0-9]+:[ ]*62 02 95 a7 b5 f4[ ]*vpmadd52huq ymm30\{k7\}\{z\},ymm29,ymm28 +[ ]*[a-f0-9]+:[ ]*62 62 95 20 b5 31[ ]*vpmadd52huq ymm30,ymm29,YMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+:[ ]*62 22 95 20 b5 b4 f0 23 01 00 00[ ]*vpmadd52huq ymm30,ymm29,YMMWORD PTR \[rax\+r14\*8\+0x123\] +[ ]*[a-f0-9]+:[ ]*62 62 95 30 b5 31[ ]*vpmadd52huq ymm30,ymm29,QWORD PTR \[rcx\]\{1to4\} +[ ]*[a-f0-9]+:[ ]*62 62 95 20 b5 72 7f[ ]*vpmadd52huq ymm30,ymm29,YMMWORD PTR \[rdx\+0xfe0\] +[ ]*[a-f0-9]+:[ ]*62 62 95 20 b5 b2 00 10 00 00[ ]*vpmadd52huq ymm30,ymm29,YMMWORD PTR \[rdx\+0x1000\] +[ ]*[a-f0-9]+:[ ]*62 62 95 20 b5 72 80[ ]*vpmadd52huq ymm30,ymm29,YMMWORD PTR \[rdx-0x1000\] +[ ]*[a-f0-9]+:[ ]*62 62 95 20 b5 b2 e0 ef ff ff[ ]*vpmadd52huq ymm30,ymm29,YMMWORD PTR \[rdx-0x1020\] +[ ]*[a-f0-9]+:[ ]*62 62 95 30 b5 72 7f[ ]*vpmadd52huq ymm30,ymm29,QWORD PTR \[rdx\+0x3f8\]\{1to4\} +[ ]*[a-f0-9]+:[ ]*62 62 95 30 b5 b2 00 04 00 00[ ]*vpmadd52huq ymm30,ymm29,QWORD PTR \[rdx\+0x400\]\{1to4\} +[ ]*[a-f0-9]+:[ ]*62 62 95 30 b5 72 80[ ]*vpmadd52huq ymm30,ymm29,QWORD PTR \[rdx-0x400\]\{1to4\} +[ ]*[a-f0-9]+:[ ]*62 62 95 30 b5 b2 f8 fb ff ff[ ]*vpmadd52huq ymm30,ymm29,QWORD PTR \[rdx-0x408\]\{1to4\} +[ ]*[a-f0-9]+:[ ]*62 02 95 00 b4 f4[ ]*vpmadd52luq xmm30,xmm29,xmm28 +[ ]*[a-f0-9]+:[ ]*62 02 95 07 b4 f4[ ]*vpmadd52luq xmm30\{k7\},xmm29,xmm28 +[ ]*[a-f0-9]+:[ ]*62 02 95 87 b4 f4[ ]*vpmadd52luq xmm30\{k7\}\{z\},xmm29,xmm28 +[ ]*[a-f0-9]+:[ ]*62 62 95 00 b4 31[ ]*vpmadd52luq xmm30,xmm29,XMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+:[ ]*62 22 95 00 b4 b4 f0 34 12 00 00[ ]*vpmadd52luq xmm30,xmm29,XMMWORD PTR \[rax\+r14\*8\+0x1234\] +[ ]*[a-f0-9]+:[ ]*62 62 95 10 b4 31[ ]*vpmadd52luq xmm30,xmm29,QWORD PTR \[rcx\]\{1to2\} +[ ]*[a-f0-9]+:[ ]*62 62 95 00 b4 72 7f[ ]*vpmadd52luq xmm30,xmm29,XMMWORD PTR \[rdx\+0x7f0\] +[ ]*[a-f0-9]+:[ ]*62 62 95 00 b4 b2 00 08 00 00[ ]*vpmadd52luq xmm30,xmm29,XMMWORD PTR \[rdx\+0x800\] +[ ]*[a-f0-9]+:[ ]*62 62 95 00 b4 72 80[ ]*vpmadd52luq xmm30,xmm29,XMMWORD PTR \[rdx-0x800\] +[ ]*[a-f0-9]+:[ ]*62 62 95 00 b4 b2 f0 f7 ff ff[ ]*vpmadd52luq xmm30,xmm29,XMMWORD PTR \[rdx-0x810\] +[ ]*[a-f0-9]+:[ ]*62 62 95 10 b4 72 7f[ ]*vpmadd52luq xmm30,xmm29,QWORD PTR \[rdx\+0x3f8\]\{1to2\} +[ ]*[a-f0-9]+:[ ]*62 62 95 10 b4 b2 00 04 00 00[ ]*vpmadd52luq xmm30,xmm29,QWORD PTR \[rdx\+0x400\]\{1to2\} +[ ]*[a-f0-9]+:[ ]*62 62 95 10 b4 72 80[ ]*vpmadd52luq xmm30,xmm29,QWORD PTR \[rdx-0x400\]\{1to2\} +[ ]*[a-f0-9]+:[ ]*62 62 95 10 b4 b2 f8 fb ff ff[ ]*vpmadd52luq xmm30,xmm29,QWORD PTR \[rdx-0x408\]\{1to2\} +[ ]*[a-f0-9]+:[ ]*62 02 95 20 b4 f4[ ]*vpmadd52luq ymm30,ymm29,ymm28 +[ ]*[a-f0-9]+:[ ]*62 02 95 27 b4 f4[ ]*vpmadd52luq ymm30\{k7\},ymm29,ymm28 +[ ]*[a-f0-9]+:[ ]*62 02 95 a7 b4 f4[ ]*vpmadd52luq ymm30\{k7\}\{z\},ymm29,ymm28 +[ ]*[a-f0-9]+:[ ]*62 62 95 20 b4 31[ ]*vpmadd52luq ymm30,ymm29,YMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+:[ ]*62 22 95 20 b4 b4 f0 34 12 00 00[ ]*vpmadd52luq ymm30,ymm29,YMMWORD PTR \[rax\+r14\*8\+0x1234\] +[ ]*[a-f0-9]+:[ ]*62 62 95 30 b4 31[ ]*vpmadd52luq ymm30,ymm29,QWORD PTR \[rcx\]\{1to4\} +[ ]*[a-f0-9]+:[ ]*62 62 95 20 b4 72 7f[ ]*vpmadd52luq ymm30,ymm29,YMMWORD PTR \[rdx\+0xfe0\] +[ ]*[a-f0-9]+:[ ]*62 62 95 20 b4 b2 00 10 00 00[ ]*vpmadd52luq ymm30,ymm29,YMMWORD PTR \[rdx\+0x1000\] +[ ]*[a-f0-9]+:[ ]*62 62 95 20 b4 72 80[ ]*vpmadd52luq ymm30,ymm29,YMMWORD PTR \[rdx-0x1000\] +[ ]*[a-f0-9]+:[ ]*62 62 95 20 b4 b2 e0 ef ff ff[ ]*vpmadd52luq ymm30,ymm29,YMMWORD PTR \[rdx-0x1020\] +[ ]*[a-f0-9]+:[ ]*62 62 95 30 b4 72 7f[ ]*vpmadd52luq ymm30,ymm29,QWORD PTR \[rdx\+0x3f8\]\{1to4\} +[ ]*[a-f0-9]+:[ ]*62 62 95 30 b4 b2 00 04 00 00[ ]*vpmadd52luq ymm30,ymm29,QWORD PTR \[rdx\+0x400\]\{1to4\} +[ ]*[a-f0-9]+:[ ]*62 62 95 30 b4 72 80[ ]*vpmadd52luq ymm30,ymm29,QWORD PTR \[rdx-0x400\]\{1to4\} +[ ]*[a-f0-9]+:[ ]*62 62 95 30 b4 b2 f8 fb ff ff[ ]*vpmadd52luq ymm30,ymm29,QWORD PTR \[rdx-0x408\]\{1to4\} +[ ]*[a-f0-9]+:[ ]*62 02 95 00 b5 f4[ ]*vpmadd52huq xmm30,xmm29,xmm28 +[ ]*[a-f0-9]+:[ ]*62 02 95 07 b5 f4[ ]*vpmadd52huq xmm30\{k7\},xmm29,xmm28 +[ ]*[a-f0-9]+:[ ]*62 02 95 87 b5 f4[ ]*vpmadd52huq xmm30\{k7\}\{z\},xmm29,xmm28 +[ ]*[a-f0-9]+:[ ]*62 62 95 00 b5 31[ ]*vpmadd52huq xmm30,xmm29,XMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+:[ ]*62 22 95 00 b5 b4 f0 34 12 00 00[ ]*vpmadd52huq xmm30,xmm29,XMMWORD PTR \[rax\+r14\*8\+0x1234\] +[ ]*[a-f0-9]+:[ ]*62 62 95 10 b5 31[ ]*vpmadd52huq xmm30,xmm29,QWORD PTR \[rcx\]\{1to2\} +[ ]*[a-f0-9]+:[ ]*62 62 95 00 b5 72 7f[ ]*vpmadd52huq xmm30,xmm29,XMMWORD PTR \[rdx\+0x7f0\] +[ ]*[a-f0-9]+:[ ]*62 62 95 00 b5 b2 00 08 00 00[ ]*vpmadd52huq xmm30,xmm29,XMMWORD PTR \[rdx\+0x800\] +[ ]*[a-f0-9]+:[ ]*62 62 95 00 b5 72 80[ ]*vpmadd52huq xmm30,xmm29,XMMWORD PTR \[rdx-0x800\] +[ ]*[a-f0-9]+:[ ]*62 62 95 00 b5 b2 f0 f7 ff ff[ ]*vpmadd52huq xmm30,xmm29,XMMWORD PTR \[rdx-0x810\] +[ ]*[a-f0-9]+:[ ]*62 62 95 10 b5 72 7f[ ]*vpmadd52huq xmm30,xmm29,QWORD PTR \[rdx\+0x3f8\]\{1to2\} +[ ]*[a-f0-9]+:[ ]*62 62 95 10 b5 b2 00 04 00 00[ ]*vpmadd52huq xmm30,xmm29,QWORD PTR \[rdx\+0x400\]\{1to2\} +[ ]*[a-f0-9]+:[ ]*62 62 95 10 b5 72 80[ ]*vpmadd52huq xmm30,xmm29,QWORD PTR \[rdx-0x400\]\{1to2\} +[ ]*[a-f0-9]+:[ ]*62 62 95 10 b5 b2 f8 fb ff ff[ ]*vpmadd52huq xmm30,xmm29,QWORD PTR \[rdx-0x408\]\{1to2\} +[ ]*[a-f0-9]+:[ ]*62 02 95 20 b5 f4[ ]*vpmadd52huq ymm30,ymm29,ymm28 +[ ]*[a-f0-9]+:[ ]*62 02 95 27 b5 f4[ ]*vpmadd52huq ymm30\{k7\},ymm29,ymm28 +[ ]*[a-f0-9]+:[ ]*62 02 95 a7 b5 f4[ ]*vpmadd52huq ymm30\{k7\}\{z\},ymm29,ymm28 +[ ]*[a-f0-9]+:[ ]*62 62 95 20 b5 31[ ]*vpmadd52huq ymm30,ymm29,YMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+:[ ]*62 22 95 20 b5 b4 f0 34 12 00 00[ ]*vpmadd52huq ymm30,ymm29,YMMWORD PTR \[rax\+r14\*8\+0x1234\] +[ ]*[a-f0-9]+:[ ]*62 62 95 30 b5 31[ ]*vpmadd52huq ymm30,ymm29,QWORD PTR \[rcx\]\{1to4\} +[ ]*[a-f0-9]+:[ ]*62 62 95 20 b5 72 7f[ ]*vpmadd52huq ymm30,ymm29,YMMWORD PTR \[rdx\+0xfe0\] +[ ]*[a-f0-9]+:[ ]*62 62 95 20 b5 b2 00 10 00 00[ ]*vpmadd52huq ymm30,ymm29,YMMWORD PTR \[rdx\+0x1000\] +[ ]*[a-f0-9]+:[ ]*62 62 95 20 b5 72 80[ ]*vpmadd52huq ymm30,ymm29,YMMWORD PTR \[rdx-0x1000\] +[ ]*[a-f0-9]+:[ ]*62 62 95 20 b5 b2 e0 ef ff ff[ ]*vpmadd52huq ymm30,ymm29,YMMWORD PTR \[rdx-0x1020\] +[ ]*[a-f0-9]+:[ ]*62 62 95 30 b5 72 7f[ ]*vpmadd52huq ymm30,ymm29,QWORD PTR \[rdx\+0x3f8\]\{1to4\} +[ ]*[a-f0-9]+:[ ]*62 62 95 30 b5 b2 00 04 00 00[ ]*vpmadd52huq ymm30,ymm29,QWORD PTR \[rdx\+0x400\]\{1to4\} +[ ]*[a-f0-9]+:[ ]*62 62 95 30 b5 72 80[ ]*vpmadd52huq ymm30,ymm29,QWORD PTR \[rdx-0x400\]\{1to4\} +[ ]*[a-f0-9]+:[ ]*62 62 95 30 b5 b2 f8 fb ff ff[ ]*vpmadd52huq ymm30,ymm29,QWORD PTR \[rdx-0x408\]\{1to4\} +#pass diff --git a/gas/testsuite/gas/i386/x86-64-avx512ifma_vl.d b/gas/testsuite/gas/i386/x86-64-avx512ifma_vl.d new file mode 100644 index 00000000000..5a97833201f --- /dev/null +++ b/gas/testsuite/gas/i386/x86-64-avx512ifma_vl.d @@ -0,0 +1,124 @@ +#as: +#objdump: -dw +#name: x86_64 AVX512IFMA/VL insns +#source: x86-64-avx512ifma_vl.s + +.*: +file format .* + + +Disassembly of section \.text: + +0+ <_start>: +[ ]*[a-f0-9]+:[ ]*62 02 95 00 b4 f4[ ]*vpmadd52luq %xmm28,%xmm29,%xmm30 +[ ]*[a-f0-9]+:[ ]*62 02 95 07 b4 f4[ ]*vpmadd52luq %xmm28,%xmm29,%xmm30\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 02 95 87 b4 f4[ ]*vpmadd52luq %xmm28,%xmm29,%xmm30\{%k7\}\{z\} +[ ]*[a-f0-9]+:[ ]*62 62 95 00 b4 31[ ]*vpmadd52luq \(%rcx\),%xmm29,%xmm30 +[ ]*[a-f0-9]+:[ ]*62 22 95 00 b4 b4 f0 23 01 00 00[ ]*vpmadd52luq 0x123\(%rax,%r14,8\),%xmm29,%xmm30 +[ ]*[a-f0-9]+:[ ]*62 62 95 10 b4 31[ ]*vpmadd52luq \(%rcx\)\{1to2\},%xmm29,%xmm30 +[ ]*[a-f0-9]+:[ ]*62 62 95 00 b4 72 7f[ ]*vpmadd52luq 0x7f0\(%rdx\),%xmm29,%xmm30 +[ ]*[a-f0-9]+:[ ]*62 62 95 00 b4 b2 00 08 00 00[ ]*vpmadd52luq 0x800\(%rdx\),%xmm29,%xmm30 +[ ]*[a-f0-9]+:[ ]*62 62 95 00 b4 72 80[ ]*vpmadd52luq -0x800\(%rdx\),%xmm29,%xmm30 +[ ]*[a-f0-9]+:[ ]*62 62 95 00 b4 b2 f0 f7 ff ff[ ]*vpmadd52luq -0x810\(%rdx\),%xmm29,%xmm30 +[ ]*[a-f0-9]+:[ ]*62 62 95 10 b4 72 7f[ ]*vpmadd52luq 0x3f8\(%rdx\)\{1to2\},%xmm29,%xmm30 +[ ]*[a-f0-9]+:[ ]*62 62 95 10 b4 b2 00 04 00 00[ ]*vpmadd52luq 0x400\(%rdx\)\{1to2\},%xmm29,%xmm30 +[ ]*[a-f0-9]+:[ ]*62 62 95 10 b4 72 80[ ]*vpmadd52luq -0x400\(%rdx\)\{1to2\},%xmm29,%xmm30 +[ ]*[a-f0-9]+:[ ]*62 62 95 10 b4 b2 f8 fb ff ff[ ]*vpmadd52luq -0x408\(%rdx\)\{1to2\},%xmm29,%xmm30 +[ ]*[a-f0-9]+:[ ]*62 02 95 20 b4 f4[ ]*vpmadd52luq %ymm28,%ymm29,%ymm30 +[ ]*[a-f0-9]+:[ ]*62 02 95 27 b4 f4[ ]*vpmadd52luq %ymm28,%ymm29,%ymm30\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 02 95 a7 b4 f4[ ]*vpmadd52luq %ymm28,%ymm29,%ymm30\{%k7\}\{z\} +[ ]*[a-f0-9]+:[ ]*62 62 95 20 b4 31[ ]*vpmadd52luq \(%rcx\),%ymm29,%ymm30 +[ ]*[a-f0-9]+:[ ]*62 22 95 20 b4 b4 f0 23 01 00 00[ ]*vpmadd52luq 0x123\(%rax,%r14,8\),%ymm29,%ymm30 +[ ]*[a-f0-9]+:[ ]*62 62 95 30 b4 31[ ]*vpmadd52luq \(%rcx\)\{1to4\},%ymm29,%ymm30 +[ ]*[a-f0-9]+:[ ]*62 62 95 20 b4 72 7f[ ]*vpmadd52luq 0xfe0\(%rdx\),%ymm29,%ymm30 +[ ]*[a-f0-9]+:[ ]*62 62 95 20 b4 b2 00 10 00 00[ ]*vpmadd52luq 0x1000\(%rdx\),%ymm29,%ymm30 +[ ]*[a-f0-9]+:[ ]*62 62 95 20 b4 72 80[ ]*vpmadd52luq -0x1000\(%rdx\),%ymm29,%ymm30 +[ ]*[a-f0-9]+:[ ]*62 62 95 20 b4 b2 e0 ef ff ff[ ]*vpmadd52luq -0x1020\(%rdx\),%ymm29,%ymm30 +[ ]*[a-f0-9]+:[ ]*62 62 95 30 b4 72 7f[ ]*vpmadd52luq 0x3f8\(%rdx\)\{1to4\},%ymm29,%ymm30 +[ ]*[a-f0-9]+:[ ]*62 62 95 30 b4 b2 00 04 00 00[ ]*vpmadd52luq 0x400\(%rdx\)\{1to4\},%ymm29,%ymm30 +[ ]*[a-f0-9]+:[ ]*62 62 95 30 b4 72 80[ ]*vpmadd52luq -0x400\(%rdx\)\{1to4\},%ymm29,%ymm30 +[ ]*[a-f0-9]+:[ ]*62 62 95 30 b4 b2 f8 fb ff ff[ ]*vpmadd52luq -0x408\(%rdx\)\{1to4\},%ymm29,%ymm30 +[ ]*[a-f0-9]+:[ ]*62 02 95 00 b5 f4[ ]*vpmadd52huq %xmm28,%xmm29,%xmm30 +[ ]*[a-f0-9]+:[ ]*62 02 95 07 b5 f4[ ]*vpmadd52huq %xmm28,%xmm29,%xmm30\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 02 95 87 b5 f4[ ]*vpmadd52huq %xmm28,%xmm29,%xmm30\{%k7\}\{z\} +[ ]*[a-f0-9]+:[ ]*62 62 95 00 b5 31[ ]*vpmadd52huq \(%rcx\),%xmm29,%xmm30 +[ ]*[a-f0-9]+:[ ]*62 22 95 00 b5 b4 f0 23 01 00 00[ ]*vpmadd52huq 0x123\(%rax,%r14,8\),%xmm29,%xmm30 +[ ]*[a-f0-9]+:[ ]*62 62 95 10 b5 31[ ]*vpmadd52huq \(%rcx\)\{1to2\},%xmm29,%xmm30 +[ ]*[a-f0-9]+:[ ]*62 62 95 00 b5 72 7f[ ]*vpmadd52huq 0x7f0\(%rdx\),%xmm29,%xmm30 +[ ]*[a-f0-9]+:[ ]*62 62 95 00 b5 b2 00 08 00 00[ ]*vpmadd52huq 0x800\(%rdx\),%xmm29,%xmm30 +[ ]*[a-f0-9]+:[ ]*62 62 95 00 b5 72 80[ ]*vpmadd52huq -0x800\(%rdx\),%xmm29,%xmm30 +[ ]*[a-f0-9]+:[ ]*62 62 95 00 b5 b2 f0 f7 ff ff[ ]*vpmadd52huq -0x810\(%rdx\),%xmm29,%xmm30 +[ ]*[a-f0-9]+:[ ]*62 62 95 10 b5 72 7f[ ]*vpmadd52huq 0x3f8\(%rdx\)\{1to2\},%xmm29,%xmm30 +[ ]*[a-f0-9]+:[ ]*62 62 95 10 b5 b2 00 04 00 00[ ]*vpmadd52huq 0x400\(%rdx\)\{1to2\},%xmm29,%xmm30 +[ ]*[a-f0-9]+:[ ]*62 62 95 10 b5 72 80[ ]*vpmadd52huq -0x400\(%rdx\)\{1to2\},%xmm29,%xmm30 +[ ]*[a-f0-9]+:[ ]*62 62 95 10 b5 b2 f8 fb ff ff[ ]*vpmadd52huq -0x408\(%rdx\)\{1to2\},%xmm29,%xmm30 +[ ]*[a-f0-9]+:[ ]*62 02 95 20 b5 f4[ ]*vpmadd52huq %ymm28,%ymm29,%ymm30 +[ ]*[a-f0-9]+:[ ]*62 02 95 27 b5 f4[ ]*vpmadd52huq %ymm28,%ymm29,%ymm30\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 02 95 a7 b5 f4[ ]*vpmadd52huq %ymm28,%ymm29,%ymm30\{%k7\}\{z\} +[ ]*[a-f0-9]+:[ ]*62 62 95 20 b5 31[ ]*vpmadd52huq \(%rcx\),%ymm29,%ymm30 +[ ]*[a-f0-9]+:[ ]*62 22 95 20 b5 b4 f0 23 01 00 00[ ]*vpmadd52huq 0x123\(%rax,%r14,8\),%ymm29,%ymm30 +[ ]*[a-f0-9]+:[ ]*62 62 95 30 b5 31[ ]*vpmadd52huq \(%rcx\)\{1to4\},%ymm29,%ymm30 +[ ]*[a-f0-9]+:[ ]*62 62 95 20 b5 72 7f[ ]*vpmadd52huq 0xfe0\(%rdx\),%ymm29,%ymm30 +[ ]*[a-f0-9]+:[ ]*62 62 95 20 b5 b2 00 10 00 00[ ]*vpmadd52huq 0x1000\(%rdx\),%ymm29,%ymm30 +[ ]*[a-f0-9]+:[ ]*62 62 95 20 b5 72 80[ ]*vpmadd52huq -0x1000\(%rdx\),%ymm29,%ymm30 +[ ]*[a-f0-9]+:[ ]*62 62 95 20 b5 b2 e0 ef ff ff[ ]*vpmadd52huq -0x1020\(%rdx\),%ymm29,%ymm30 +[ ]*[a-f0-9]+:[ ]*62 62 95 30 b5 72 7f[ ]*vpmadd52huq 0x3f8\(%rdx\)\{1to4\},%ymm29,%ymm30 +[ ]*[a-f0-9]+:[ ]*62 62 95 30 b5 b2 00 04 00 00[ ]*vpmadd52huq 0x400\(%rdx\)\{1to4\},%ymm29,%ymm30 +[ ]*[a-f0-9]+:[ ]*62 62 95 30 b5 72 80[ ]*vpmadd52huq -0x400\(%rdx\)\{1to4\},%ymm29,%ymm30 +[ ]*[a-f0-9]+:[ ]*62 62 95 30 b5 b2 f8 fb ff ff[ ]*vpmadd52huq -0x408\(%rdx\)\{1to4\},%ymm29,%ymm30 +[ ]*[a-f0-9]+:[ ]*62 02 95 00 b4 f4[ ]*vpmadd52luq %xmm28,%xmm29,%xmm30 +[ ]*[a-f0-9]+:[ ]*62 02 95 07 b4 f4[ ]*vpmadd52luq %xmm28,%xmm29,%xmm30\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 02 95 87 b4 f4[ ]*vpmadd52luq %xmm28,%xmm29,%xmm30\{%k7\}\{z\} +[ ]*[a-f0-9]+:[ ]*62 62 95 00 b4 31[ ]*vpmadd52luq \(%rcx\),%xmm29,%xmm30 +[ ]*[a-f0-9]+:[ ]*62 22 95 00 b4 b4 f0 34 12 00 00[ ]*vpmadd52luq 0x1234\(%rax,%r14,8\),%xmm29,%xmm30 +[ ]*[a-f0-9]+:[ ]*62 62 95 10 b4 31[ ]*vpmadd52luq \(%rcx\)\{1to2\},%xmm29,%xmm30 +[ ]*[a-f0-9]+:[ ]*62 62 95 00 b4 72 7f[ ]*vpmadd52luq 0x7f0\(%rdx\),%xmm29,%xmm30 +[ ]*[a-f0-9]+:[ ]*62 62 95 00 b4 b2 00 08 00 00[ ]*vpmadd52luq 0x800\(%rdx\),%xmm29,%xmm30 +[ ]*[a-f0-9]+:[ ]*62 62 95 00 b4 72 80[ ]*vpmadd52luq -0x800\(%rdx\),%xmm29,%xmm30 +[ ]*[a-f0-9]+:[ ]*62 62 95 00 b4 b2 f0 f7 ff ff[ ]*vpmadd52luq -0x810\(%rdx\),%xmm29,%xmm30 +[ ]*[a-f0-9]+:[ ]*62 62 95 10 b4 72 7f[ ]*vpmadd52luq 0x3f8\(%rdx\)\{1to2\},%xmm29,%xmm30 +[ ]*[a-f0-9]+:[ ]*62 62 95 10 b4 b2 00 04 00 00[ ]*vpmadd52luq 0x400\(%rdx\)\{1to2\},%xmm29,%xmm30 +[ ]*[a-f0-9]+:[ ]*62 62 95 10 b4 72 80[ ]*vpmadd52luq -0x400\(%rdx\)\{1to2\},%xmm29,%xmm30 +[ ]*[a-f0-9]+:[ ]*62 62 95 10 b4 b2 f8 fb ff ff[ ]*vpmadd52luq -0x408\(%rdx\)\{1to2\},%xmm29,%xmm30 +[ ]*[a-f0-9]+:[ ]*62 02 95 20 b4 f4[ ]*vpmadd52luq %ymm28,%ymm29,%ymm30 +[ ]*[a-f0-9]+:[ ]*62 02 95 27 b4 f4[ ]*vpmadd52luq %ymm28,%ymm29,%ymm30\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 02 95 a7 b4 f4[ ]*vpmadd52luq %ymm28,%ymm29,%ymm30\{%k7\}\{z\} +[ ]*[a-f0-9]+:[ ]*62 62 95 20 b4 31[ ]*vpmadd52luq \(%rcx\),%ymm29,%ymm30 +[ ]*[a-f0-9]+:[ ]*62 22 95 20 b4 b4 f0 34 12 00 00[ ]*vpmadd52luq 0x1234\(%rax,%r14,8\),%ymm29,%ymm30 +[ ]*[a-f0-9]+:[ ]*62 62 95 30 b4 31[ ]*vpmadd52luq \(%rcx\)\{1to4\},%ymm29,%ymm30 +[ ]*[a-f0-9]+:[ ]*62 62 95 20 b4 72 7f[ ]*vpmadd52luq 0xfe0\(%rdx\),%ymm29,%ymm30 +[ ]*[a-f0-9]+:[ ]*62 62 95 20 b4 b2 00 10 00 00[ ]*vpmadd52luq 0x1000\(%rdx\),%ymm29,%ymm30 +[ ]*[a-f0-9]+:[ ]*62 62 95 20 b4 72 80[ ]*vpmadd52luq -0x1000\(%rdx\),%ymm29,%ymm30 +[ ]*[a-f0-9]+:[ ]*62 62 95 20 b4 b2 e0 ef ff ff[ ]*vpmadd52luq -0x1020\(%rdx\),%ymm29,%ymm30 +[ ]*[a-f0-9]+:[ ]*62 62 95 30 b4 72 7f[ ]*vpmadd52luq 0x3f8\(%rdx\)\{1to4\},%ymm29,%ymm30 +[ ]*[a-f0-9]+:[ ]*62 62 95 30 b4 b2 00 04 00 00[ ]*vpmadd52luq 0x400\(%rdx\)\{1to4\},%ymm29,%ymm30 +[ ]*[a-f0-9]+:[ ]*62 62 95 30 b4 72 80[ ]*vpmadd52luq -0x400\(%rdx\)\{1to4\},%ymm29,%ymm30 +[ ]*[a-f0-9]+:[ ]*62 62 95 30 b4 b2 f8 fb ff ff[ ]*vpmadd52luq -0x408\(%rdx\)\{1to4\},%ymm29,%ymm30 +[ ]*[a-f0-9]+:[ ]*62 02 95 00 b5 f4[ ]*vpmadd52huq %xmm28,%xmm29,%xmm30 +[ ]*[a-f0-9]+:[ ]*62 02 95 07 b5 f4[ ]*vpmadd52huq %xmm28,%xmm29,%xmm30\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 02 95 87 b5 f4[ ]*vpmadd52huq %xmm28,%xmm29,%xmm30\{%k7\}\{z\} +[ ]*[a-f0-9]+:[ ]*62 62 95 00 b5 31[ ]*vpmadd52huq \(%rcx\),%xmm29,%xmm30 +[ ]*[a-f0-9]+:[ ]*62 22 95 00 b5 b4 f0 34 12 00 00[ ]*vpmadd52huq 0x1234\(%rax,%r14,8\),%xmm29,%xmm30 +[ ]*[a-f0-9]+:[ ]*62 62 95 10 b5 31[ ]*vpmadd52huq \(%rcx\)\{1to2\},%xmm29,%xmm30 +[ ]*[a-f0-9]+:[ ]*62 62 95 00 b5 72 7f[ ]*vpmadd52huq 0x7f0\(%rdx\),%xmm29,%xmm30 +[ ]*[a-f0-9]+:[ ]*62 62 95 00 b5 b2 00 08 00 00[ ]*vpmadd52huq 0x800\(%rdx\),%xmm29,%xmm30 +[ ]*[a-f0-9]+:[ ]*62 62 95 00 b5 72 80[ ]*vpmadd52huq -0x800\(%rdx\),%xmm29,%xmm30 +[ ]*[a-f0-9]+:[ ]*62 62 95 00 b5 b2 f0 f7 ff ff[ ]*vpmadd52huq -0x810\(%rdx\),%xmm29,%xmm30 +[ ]*[a-f0-9]+:[ ]*62 62 95 10 b5 72 7f[ ]*vpmadd52huq 0x3f8\(%rdx\)\{1to2\},%xmm29,%xmm30 +[ ]*[a-f0-9]+:[ ]*62 62 95 10 b5 b2 00 04 00 00[ ]*vpmadd52huq 0x400\(%rdx\)\{1to2\},%xmm29,%xmm30 +[ ]*[a-f0-9]+:[ ]*62 62 95 10 b5 72 80[ ]*vpmadd52huq -0x400\(%rdx\)\{1to2\},%xmm29,%xmm30 +[ ]*[a-f0-9]+:[ ]*62 62 95 10 b5 b2 f8 fb ff ff[ ]*vpmadd52huq -0x408\(%rdx\)\{1to2\},%xmm29,%xmm30 +[ ]*[a-f0-9]+:[ ]*62 02 95 20 b5 f4[ ]*vpmadd52huq %ymm28,%ymm29,%ymm30 +[ ]*[a-f0-9]+:[ ]*62 02 95 27 b5 f4[ ]*vpmadd52huq %ymm28,%ymm29,%ymm30\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 02 95 a7 b5 f4[ ]*vpmadd52huq %ymm28,%ymm29,%ymm30\{%k7\}\{z\} +[ ]*[a-f0-9]+:[ ]*62 62 95 20 b5 31[ ]*vpmadd52huq \(%rcx\),%ymm29,%ymm30 +[ ]*[a-f0-9]+:[ ]*62 22 95 20 b5 b4 f0 34 12 00 00[ ]*vpmadd52huq 0x1234\(%rax,%r14,8\),%ymm29,%ymm30 +[ ]*[a-f0-9]+:[ ]*62 62 95 30 b5 31[ ]*vpmadd52huq \(%rcx\)\{1to4\},%ymm29,%ymm30 +[ ]*[a-f0-9]+:[ ]*62 62 95 20 b5 72 7f[ ]*vpmadd52huq 0xfe0\(%rdx\),%ymm29,%ymm30 +[ ]*[a-f0-9]+:[ ]*62 62 95 20 b5 b2 00 10 00 00[ ]*vpmadd52huq 0x1000\(%rdx\),%ymm29,%ymm30 +[ ]*[a-f0-9]+:[ ]*62 62 95 20 b5 72 80[ ]*vpmadd52huq -0x1000\(%rdx\),%ymm29,%ymm30 +[ ]*[a-f0-9]+:[ ]*62 62 95 20 b5 b2 e0 ef ff ff[ ]*vpmadd52huq -0x1020\(%rdx\),%ymm29,%ymm30 +[ ]*[a-f0-9]+:[ ]*62 62 95 30 b5 72 7f[ ]*vpmadd52huq 0x3f8\(%rdx\)\{1to4\},%ymm29,%ymm30 +[ ]*[a-f0-9]+:[ ]*62 62 95 30 b5 b2 00 04 00 00[ ]*vpmadd52huq 0x400\(%rdx\)\{1to4\},%ymm29,%ymm30 +[ ]*[a-f0-9]+:[ ]*62 62 95 30 b5 72 80[ ]*vpmadd52huq -0x400\(%rdx\)\{1to4\},%ymm29,%ymm30 +[ ]*[a-f0-9]+:[ ]*62 62 95 30 b5 b2 f8 fb ff ff[ ]*vpmadd52huq -0x408\(%rdx\)\{1to4\},%ymm29,%ymm30 +#pass diff --git a/gas/testsuite/gas/i386/x86-64-avx512ifma_vl.s b/gas/testsuite/gas/i386/x86-64-avx512ifma_vl.s new file mode 100644 index 00000000000..e10238344dd --- /dev/null +++ b/gas/testsuite/gas/i386/x86-64-avx512ifma_vl.s @@ -0,0 +1,119 @@ +# Check 64bit AVX512{IFMA,VL} instructions + + .allow_index_reg + .text +_start: + vpmadd52luq %xmm28, %xmm29, %xmm30 # AVX512{IFMA,VL} + vpmadd52luq %xmm28, %xmm29, %xmm30{%k7} # AVX512{IFMA,VL} + vpmadd52luq %xmm28, %xmm29, %xmm30{%k7}{z} # AVX512{IFMA,VL} + vpmadd52luq (%rcx), %xmm29, %xmm30 # AVX512{IFMA,VL} + vpmadd52luq 0x123(%rax,%r14,8), %xmm29, %xmm30 # AVX512{IFMA,VL} + vpmadd52luq (%rcx){1to2}, %xmm29, %xmm30 # AVX512{IFMA,VL} + vpmadd52luq 2032(%rdx), %xmm29, %xmm30 # AVX512{IFMA,VL} Disp8 + vpmadd52luq 2048(%rdx), %xmm29, %xmm30 # AVX512{IFMA,VL} + vpmadd52luq -2048(%rdx), %xmm29, %xmm30 # AVX512{IFMA,VL} Disp8 + vpmadd52luq -2064(%rdx), %xmm29, %xmm30 # AVX512{IFMA,VL} + vpmadd52luq 1016(%rdx){1to2}, %xmm29, %xmm30 # AVX512{IFMA,VL} Disp8 + vpmadd52luq 1024(%rdx){1to2}, %xmm29, %xmm30 # AVX512{IFMA,VL} + vpmadd52luq -1024(%rdx){1to2}, %xmm29, %xmm30 # AVX512{IFMA,VL} Disp8 + vpmadd52luq -1032(%rdx){1to2}, %xmm29, %xmm30 # AVX512{IFMA,VL} + vpmadd52luq %ymm28, %ymm29, %ymm30 # AVX512{IFMA,VL} + vpmadd52luq %ymm28, %ymm29, %ymm30{%k7} # AVX512{IFMA,VL} + vpmadd52luq %ymm28, %ymm29, %ymm30{%k7}{z} # AVX512{IFMA,VL} + vpmadd52luq (%rcx), %ymm29, %ymm30 # AVX512{IFMA,VL} + vpmadd52luq 0x123(%rax,%r14,8), %ymm29, %ymm30 # AVX512{IFMA,VL} + vpmadd52luq (%rcx){1to4}, %ymm29, %ymm30 # AVX512{IFMA,VL} + vpmadd52luq 4064(%rdx), %ymm29, %ymm30 # AVX512{IFMA,VL} Disp8 + vpmadd52luq 4096(%rdx), %ymm29, %ymm30 # AVX512{IFMA,VL} + vpmadd52luq -4096(%rdx), %ymm29, %ymm30 # AVX512{IFMA,VL} Disp8 + vpmadd52luq -4128(%rdx), %ymm29, %ymm30 # AVX512{IFMA,VL} + vpmadd52luq 1016(%rdx){1to4}, %ymm29, %ymm30 # AVX512{IFMA,VL} Disp8 + vpmadd52luq 1024(%rdx){1to4}, %ymm29, %ymm30 # AVX512{IFMA,VL} + vpmadd52luq -1024(%rdx){1to4}, %ymm29, %ymm30 # AVX512{IFMA,VL} Disp8 + vpmadd52luq -1032(%rdx){1to4}, %ymm29, %ymm30 # AVX512{IFMA,VL} + vpmadd52huq %xmm28, %xmm29, %xmm30 # AVX512{IFMA,VL} + vpmadd52huq %xmm28, %xmm29, %xmm30{%k7} # AVX512{IFMA,VL} + vpmadd52huq %xmm28, %xmm29, %xmm30{%k7}{z} # AVX512{IFMA,VL} + vpmadd52huq (%rcx), %xmm29, %xmm30 # AVX512{IFMA,VL} + vpmadd52huq 0x123(%rax,%r14,8), %xmm29, %xmm30 # AVX512{IFMA,VL} + vpmadd52huq (%rcx){1to2}, %xmm29, %xmm30 # AVX512{IFMA,VL} + vpmadd52huq 2032(%rdx), %xmm29, %xmm30 # AVX512{IFMA,VL} Disp8 + vpmadd52huq 2048(%rdx), %xmm29, %xmm30 # AVX512{IFMA,VL} + vpmadd52huq -2048(%rdx), %xmm29, %xmm30 # AVX512{IFMA,VL} Disp8 + vpmadd52huq -2064(%rdx), %xmm29, %xmm30 # AVX512{IFMA,VL} + vpmadd52huq 1016(%rdx){1to2}, %xmm29, %xmm30 # AVX512{IFMA,VL} Disp8 + vpmadd52huq 1024(%rdx){1to2}, %xmm29, %xmm30 # AVX512{IFMA,VL} + vpmadd52huq -1024(%rdx){1to2}, %xmm29, %xmm30 # AVX512{IFMA,VL} Disp8 + vpmadd52huq -1032(%rdx){1to2}, %xmm29, %xmm30 # AVX512{IFMA,VL} + vpmadd52huq %ymm28, %ymm29, %ymm30 # AVX512{IFMA,VL} + vpmadd52huq %ymm28, %ymm29, %ymm30{%k7} # AVX512{IFMA,VL} + vpmadd52huq %ymm28, %ymm29, %ymm30{%k7}{z} # AVX512{IFMA,VL} + vpmadd52huq (%rcx), %ymm29, %ymm30 # AVX512{IFMA,VL} + vpmadd52huq 0x123(%rax,%r14,8), %ymm29, %ymm30 # AVX512{IFMA,VL} + vpmadd52huq (%rcx){1to4}, %ymm29, %ymm30 # AVX512{IFMA,VL} + vpmadd52huq 4064(%rdx), %ymm29, %ymm30 # AVX512{IFMA,VL} Disp8 + vpmadd52huq 4096(%rdx), %ymm29, %ymm30 # AVX512{IFMA,VL} + vpmadd52huq -4096(%rdx), %ymm29, %ymm30 # AVX512{IFMA,VL} Disp8 + vpmadd52huq -4128(%rdx), %ymm29, %ymm30 # AVX512{IFMA,VL} + vpmadd52huq 1016(%rdx){1to4}, %ymm29, %ymm30 # AVX512{IFMA,VL} Disp8 + vpmadd52huq 1024(%rdx){1to4}, %ymm29, %ymm30 # AVX512{IFMA,VL} + vpmadd52huq -1024(%rdx){1to4}, %ymm29, %ymm30 # AVX512{IFMA,VL} Disp8 + vpmadd52huq -1032(%rdx){1to4}, %ymm29, %ymm30 # AVX512{IFMA,VL} + + .intel_syntax noprefix + vpmadd52luq xmm30, xmm29, xmm28 # AVX512{IFMA,VL} + vpmadd52luq xmm30{k7}, xmm29, xmm28 # AVX512{IFMA,VL} + vpmadd52luq xmm30{k7}{z}, xmm29, xmm28 # AVX512{IFMA,VL} + vpmadd52luq xmm30, xmm29, XMMWORD PTR [rcx] # AVX512{IFMA,VL} + vpmadd52luq xmm30, xmm29, XMMWORD PTR [rax+r14*8+0x1234] # AVX512{IFMA,VL} + vpmadd52luq xmm30, xmm29, [rcx]{1to2} # AVX512{IFMA,VL} + vpmadd52luq xmm30, xmm29, XMMWORD PTR [rdx+2032] # AVX512{IFMA,VL} Disp8 + vpmadd52luq xmm30, xmm29, XMMWORD PTR [rdx+2048] # AVX512{IFMA,VL} + vpmadd52luq xmm30, xmm29, XMMWORD PTR [rdx-2048] # AVX512{IFMA,VL} Disp8 + vpmadd52luq xmm30, xmm29, XMMWORD PTR [rdx-2064] # AVX512{IFMA,VL} + vpmadd52luq xmm30, xmm29, [rdx+1016]{1to2} # AVX512{IFMA,VL} Disp8 + vpmadd52luq xmm30, xmm29, [rdx+1024]{1to2} # AVX512{IFMA,VL} + vpmadd52luq xmm30, xmm29, [rdx-1024]{1to2} # AVX512{IFMA,VL} Disp8 + vpmadd52luq xmm30, xmm29, [rdx-1032]{1to2} # AVX512{IFMA,VL} + vpmadd52luq ymm30, ymm29, ymm28 # AVX512{IFMA,VL} + vpmadd52luq ymm30{k7}, ymm29, ymm28 # AVX512{IFMA,VL} + vpmadd52luq ymm30{k7}{z}, ymm29, ymm28 # AVX512{IFMA,VL} + vpmadd52luq ymm30, ymm29, YMMWORD PTR [rcx] # AVX512{IFMA,VL} + vpmadd52luq ymm30, ymm29, YMMWORD PTR [rax+r14*8+0x1234] # AVX512{IFMA,VL} + vpmadd52luq ymm30, ymm29, [rcx]{1to4} # AVX512{IFMA,VL} + vpmadd52luq ymm30, ymm29, YMMWORD PTR [rdx+4064] # AVX512{IFMA,VL} Disp8 + vpmadd52luq ymm30, ymm29, YMMWORD PTR [rdx+4096] # AVX512{IFMA,VL} + vpmadd52luq ymm30, ymm29, YMMWORD PTR [rdx-4096] # AVX512{IFMA,VL} Disp8 + vpmadd52luq ymm30, ymm29, YMMWORD PTR [rdx-4128] # AVX512{IFMA,VL} + vpmadd52luq ymm30, ymm29, [rdx+1016]{1to4} # AVX512{IFMA,VL} Disp8 + vpmadd52luq ymm30, ymm29, [rdx+1024]{1to4} # AVX512{IFMA,VL} + vpmadd52luq ymm30, ymm29, [rdx-1024]{1to4} # AVX512{IFMA,VL} Disp8 + vpmadd52luq ymm30, ymm29, [rdx-1032]{1to4} # AVX512{IFMA,VL} + vpmadd52huq xmm30, xmm29, xmm28 # AVX512{IFMA,VL} + vpmadd52huq xmm30{k7}, xmm29, xmm28 # AVX512{IFMA,VL} + vpmadd52huq xmm30{k7}{z}, xmm29, xmm28 # AVX512{IFMA,VL} + vpmadd52huq xmm30, xmm29, XMMWORD PTR [rcx] # AVX512{IFMA,VL} + vpmadd52huq xmm30, xmm29, XMMWORD PTR [rax+r14*8+0x1234] # AVX512{IFMA,VL} + vpmadd52huq xmm30, xmm29, [rcx]{1to2} # AVX512{IFMA,VL} + vpmadd52huq xmm30, xmm29, XMMWORD PTR [rdx+2032] # AVX512{IFMA,VL} Disp8 + vpmadd52huq xmm30, xmm29, XMMWORD PTR [rdx+2048] # AVX512{IFMA,VL} + vpmadd52huq xmm30, xmm29, XMMWORD PTR [rdx-2048] # AVX512{IFMA,VL} Disp8 + vpmadd52huq xmm30, xmm29, XMMWORD PTR [rdx-2064] # AVX512{IFMA,VL} + vpmadd52huq xmm30, xmm29, [rdx+1016]{1to2} # AVX512{IFMA,VL} Disp8 + vpmadd52huq xmm30, xmm29, [rdx+1024]{1to2} # AVX512{IFMA,VL} + vpmadd52huq xmm30, xmm29, [rdx-1024]{1to2} # AVX512{IFMA,VL} Disp8 + vpmadd52huq xmm30, xmm29, [rdx-1032]{1to2} # AVX512{IFMA,VL} + vpmadd52huq ymm30, ymm29, ymm28 # AVX512{IFMA,VL} + vpmadd52huq ymm30{k7}, ymm29, ymm28 # AVX512{IFMA,VL} + vpmadd52huq ymm30{k7}{z}, ymm29, ymm28 # AVX512{IFMA,VL} + vpmadd52huq ymm30, ymm29, YMMWORD PTR [rcx] # AVX512{IFMA,VL} + vpmadd52huq ymm30, ymm29, YMMWORD PTR [rax+r14*8+0x1234] # AVX512{IFMA,VL} + vpmadd52huq ymm30, ymm29, [rcx]{1to4} # AVX512{IFMA,VL} + vpmadd52huq ymm30, ymm29, YMMWORD PTR [rdx+4064] # AVX512{IFMA,VL} Disp8 + vpmadd52huq ymm30, ymm29, YMMWORD PTR [rdx+4096] # AVX512{IFMA,VL} + vpmadd52huq ymm30, ymm29, YMMWORD PTR [rdx-4096] # AVX512{IFMA,VL} Disp8 + vpmadd52huq ymm30, ymm29, YMMWORD PTR [rdx-4128] # AVX512{IFMA,VL} + vpmadd52huq ymm30, ymm29, [rdx+1016]{1to4} # AVX512{IFMA,VL} Disp8 + vpmadd52huq ymm30, ymm29, [rdx+1024]{1to4} # AVX512{IFMA,VL} + vpmadd52huq ymm30, ymm29, [rdx-1024]{1to4} # AVX512{IFMA,VL} Disp8 + vpmadd52huq ymm30, ymm29, [rdx-1032]{1to4} # AVX512{IFMA,VL} diff --git a/gas/testsuite/gas/i386/x86-64-avx512vbmi-intel.d b/gas/testsuite/gas/i386/x86-64-avx512vbmi-intel.d new file mode 100644 index 00000000000..0350cbdc8e5 --- /dev/null +++ b/gas/testsuite/gas/i386/x86-64-avx512vbmi-intel.d @@ -0,0 +1,94 @@ +#as: +#objdump: -dw -Mintel +#name: x86_64 AVX512VBMI insns (Intel disassembly) +#source: x86-64-avx512vbmi.s + +.*: +file format .* + + +Disassembly of section \.text: + +0+ <_start>: +[ ]*[a-f0-9]+:[ ]*62 02 15 40 8d f4[ ]*vpermb zmm30,zmm29,zmm28 +[ ]*[a-f0-9]+:[ ]*62 02 15 47 8d f4[ ]*vpermb zmm30\{k7\},zmm29,zmm28 +[ ]*[a-f0-9]+:[ ]*62 02 15 c7 8d f4[ ]*vpermb zmm30\{k7\}\{z\},zmm29,zmm28 +[ ]*[a-f0-9]+:[ ]*62 62 15 40 8d 31[ ]*vpermb zmm30,zmm29,ZMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+:[ ]*62 22 15 40 8d b4 f0 23 01 00 00[ ]*vpermb zmm30,zmm29,ZMMWORD PTR \[rax\+r14\*8\+0x123\] +[ ]*[a-f0-9]+:[ ]*62 62 15 40 8d 72 7f[ ]*vpermb zmm30,zmm29,ZMMWORD PTR \[rdx\+0x1fc0\] +[ ]*[a-f0-9]+:[ ]*62 62 15 40 8d b2 00 20 00 00[ ]*vpermb zmm30,zmm29,ZMMWORD PTR \[rdx\+0x2000\] +[ ]*[a-f0-9]+:[ ]*62 62 15 40 8d 72 80[ ]*vpermb zmm30,zmm29,ZMMWORD PTR \[rdx-0x2000\] +[ ]*[a-f0-9]+:[ ]*62 62 15 40 8d b2 c0 df ff ff[ ]*vpermb zmm30,zmm29,ZMMWORD PTR \[rdx-0x2040\] +[ ]*[a-f0-9]+:[ ]*62 02 15 40 75 f4[ ]*vpermi2b zmm30,zmm29,zmm28 +[ ]*[a-f0-9]+:[ ]*62 02 15 47 75 f4[ ]*vpermi2b zmm30\{k7\},zmm29,zmm28 +[ ]*[a-f0-9]+:[ ]*62 02 15 c7 75 f4[ ]*vpermi2b zmm30\{k7\}\{z\},zmm29,zmm28 +[ ]*[a-f0-9]+:[ ]*62 62 15 40 75 31[ ]*vpermi2b zmm30,zmm29,ZMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+:[ ]*62 22 15 40 75 b4 f0 23 01 00 00[ ]*vpermi2b zmm30,zmm29,ZMMWORD PTR \[rax\+r14\*8\+0x123\] +[ ]*[a-f0-9]+:[ ]*62 62 15 40 75 72 7f[ ]*vpermi2b zmm30,zmm29,ZMMWORD PTR \[rdx\+0x1fc0\] +[ ]*[a-f0-9]+:[ ]*62 62 15 40 75 b2 00 20 00 00[ ]*vpermi2b zmm30,zmm29,ZMMWORD PTR \[rdx\+0x2000\] +[ ]*[a-f0-9]+:[ ]*62 62 15 40 75 72 80[ ]*vpermi2b zmm30,zmm29,ZMMWORD PTR \[rdx-0x2000\] +[ ]*[a-f0-9]+:[ ]*62 62 15 40 75 b2 c0 df ff ff[ ]*vpermi2b zmm30,zmm29,ZMMWORD PTR \[rdx-0x2040\] +[ ]*[a-f0-9]+:[ ]*62 02 15 40 7d f4[ ]*vpermt2b zmm30,zmm29,zmm28 +[ ]*[a-f0-9]+:[ ]*62 02 15 47 7d f4[ ]*vpermt2b zmm30\{k7\},zmm29,zmm28 +[ ]*[a-f0-9]+:[ ]*62 02 15 c7 7d f4[ ]*vpermt2b zmm30\{k7\}\{z\},zmm29,zmm28 +[ ]*[a-f0-9]+:[ ]*62 62 15 40 7d 31[ ]*vpermt2b zmm30,zmm29,ZMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+:[ ]*62 22 15 40 7d b4 f0 23 01 00 00[ ]*vpermt2b zmm30,zmm29,ZMMWORD PTR \[rax\+r14\*8\+0x123\] +[ ]*[a-f0-9]+:[ ]*62 62 15 40 7d 72 7f[ ]*vpermt2b zmm30,zmm29,ZMMWORD PTR \[rdx\+0x1fc0\] +[ ]*[a-f0-9]+:[ ]*62 62 15 40 7d b2 00 20 00 00[ ]*vpermt2b zmm30,zmm29,ZMMWORD PTR \[rdx\+0x2000\] +[ ]*[a-f0-9]+:[ ]*62 62 15 40 7d 72 80[ ]*vpermt2b zmm30,zmm29,ZMMWORD PTR \[rdx-0x2000\] +[ ]*[a-f0-9]+:[ ]*62 62 15 40 7d b2 c0 df ff ff[ ]*vpermt2b zmm30,zmm29,ZMMWORD PTR \[rdx-0x2040\] +[ ]*[a-f0-9]+:[ ]*62 02 95 40 83 f4[ ]*vpmultishiftqb zmm30,zmm29,zmm28 +[ ]*[a-f0-9]+:[ ]*62 02 95 47 83 f4[ ]*vpmultishiftqb zmm30\{k7\},zmm29,zmm28 +[ ]*[a-f0-9]+:[ ]*62 02 95 c7 83 f4[ ]*vpmultishiftqb zmm30\{k7\}\{z\},zmm29,zmm28 +[ ]*[a-f0-9]+:[ ]*62 62 95 40 83 31[ ]*vpmultishiftqb zmm30,zmm29,ZMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+:[ ]*62 22 95 40 83 b4 f0 23 01 00 00[ ]*vpmultishiftqb zmm30,zmm29,ZMMWORD PTR \[rax\+r14\*8\+0x123\] +[ ]*[a-f0-9]+:[ ]*62 62 95 50 83 31[ ]*vpmultishiftqb zmm30,zmm29,QWORD PTR \[rcx\]\{1to8\} +[ ]*[a-f0-9]+:[ ]*62 62 95 40 83 72 7f[ ]*vpmultishiftqb zmm30,zmm29,ZMMWORD PTR \[rdx\+0x1fc0\] +[ ]*[a-f0-9]+:[ ]*62 62 95 40 83 b2 00 20 00 00[ ]*vpmultishiftqb zmm30,zmm29,ZMMWORD PTR \[rdx\+0x2000\] +[ ]*[a-f0-9]+:[ ]*62 62 95 40 83 72 80[ ]*vpmultishiftqb zmm30,zmm29,ZMMWORD PTR \[rdx-0x2000\] +[ ]*[a-f0-9]+:[ ]*62 62 95 40 83 b2 c0 df ff ff[ ]*vpmultishiftqb zmm30,zmm29,ZMMWORD PTR \[rdx-0x2040\] +[ ]*[a-f0-9]+:[ ]*62 62 95 50 83 72 7f[ ]*vpmultishiftqb zmm30,zmm29,QWORD PTR \[rdx\+0x3f8\]\{1to8\} +[ ]*[a-f0-9]+:[ ]*62 62 95 50 83 b2 00 04 00 00[ ]*vpmultishiftqb zmm30,zmm29,QWORD PTR \[rdx\+0x400\]\{1to8\} +[ ]*[a-f0-9]+:[ ]*62 62 95 50 83 72 80[ ]*vpmultishiftqb zmm30,zmm29,QWORD PTR \[rdx-0x400\]\{1to8\} +[ ]*[a-f0-9]+:[ ]*62 62 95 50 83 b2 f8 fb ff ff[ ]*vpmultishiftqb zmm30,zmm29,QWORD PTR \[rdx-0x408\]\{1to8\} +[ ]*[a-f0-9]+:[ ]*62 02 15 40 8d f4[ ]*vpermb zmm30,zmm29,zmm28 +[ ]*[a-f0-9]+:[ ]*62 02 15 47 8d f4[ ]*vpermb zmm30\{k7\},zmm29,zmm28 +[ ]*[a-f0-9]+:[ ]*62 02 15 c7 8d f4[ ]*vpermb zmm30\{k7\}\{z\},zmm29,zmm28 +[ ]*[a-f0-9]+:[ ]*62 62 15 40 8d 31[ ]*vpermb zmm30,zmm29,ZMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+:[ ]*62 22 15 40 8d b4 f0 34 12 00 00[ ]*vpermb zmm30,zmm29,ZMMWORD PTR \[rax\+r14\*8\+0x1234\] +[ ]*[a-f0-9]+:[ ]*62 62 15 40 8d 72 7f[ ]*vpermb zmm30,zmm29,ZMMWORD PTR \[rdx\+0x1fc0\] +[ ]*[a-f0-9]+:[ ]*62 62 15 40 8d b2 00 20 00 00[ ]*vpermb zmm30,zmm29,ZMMWORD PTR \[rdx\+0x2000\] +[ ]*[a-f0-9]+:[ ]*62 62 15 40 8d 72 80[ ]*vpermb zmm30,zmm29,ZMMWORD PTR \[rdx-0x2000\] +[ ]*[a-f0-9]+:[ ]*62 62 15 40 8d b2 c0 df ff ff[ ]*vpermb zmm30,zmm29,ZMMWORD PTR \[rdx-0x2040\] +[ ]*[a-f0-9]+:[ ]*62 02 15 40 75 f4[ ]*vpermi2b zmm30,zmm29,zmm28 +[ ]*[a-f0-9]+:[ ]*62 02 15 47 75 f4[ ]*vpermi2b zmm30\{k7\},zmm29,zmm28 +[ ]*[a-f0-9]+:[ ]*62 02 15 c7 75 f4[ ]*vpermi2b zmm30\{k7\}\{z\},zmm29,zmm28 +[ ]*[a-f0-9]+:[ ]*62 62 15 40 75 31[ ]*vpermi2b zmm30,zmm29,ZMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+:[ ]*62 22 15 40 75 b4 f0 34 12 00 00[ ]*vpermi2b zmm30,zmm29,ZMMWORD PTR \[rax\+r14\*8\+0x1234\] +[ ]*[a-f0-9]+:[ ]*62 62 15 40 75 72 7f[ ]*vpermi2b zmm30,zmm29,ZMMWORD PTR \[rdx\+0x1fc0\] +[ ]*[a-f0-9]+:[ ]*62 62 15 40 75 b2 00 20 00 00[ ]*vpermi2b zmm30,zmm29,ZMMWORD PTR \[rdx\+0x2000\] +[ ]*[a-f0-9]+:[ ]*62 62 15 40 75 72 80[ ]*vpermi2b zmm30,zmm29,ZMMWORD PTR \[rdx-0x2000\] +[ ]*[a-f0-9]+:[ ]*62 62 15 40 75 b2 c0 df ff ff[ ]*vpermi2b zmm30,zmm29,ZMMWORD PTR \[rdx-0x2040\] +[ ]*[a-f0-9]+:[ ]*62 02 15 40 7d f4[ ]*vpermt2b zmm30,zmm29,zmm28 +[ ]*[a-f0-9]+:[ ]*62 02 15 47 7d f4[ ]*vpermt2b zmm30\{k7\},zmm29,zmm28 +[ ]*[a-f0-9]+:[ ]*62 02 15 c7 7d f4[ ]*vpermt2b zmm30\{k7\}\{z\},zmm29,zmm28 +[ ]*[a-f0-9]+:[ ]*62 62 15 40 7d 31[ ]*vpermt2b zmm30,zmm29,ZMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+:[ ]*62 22 15 40 7d b4 f0 34 12 00 00[ ]*vpermt2b zmm30,zmm29,ZMMWORD PTR \[rax\+r14\*8\+0x1234\] +[ ]*[a-f0-9]+:[ ]*62 62 15 40 7d 72 7f[ ]*vpermt2b zmm30,zmm29,ZMMWORD PTR \[rdx\+0x1fc0\] +[ ]*[a-f0-9]+:[ ]*62 62 15 40 7d b2 00 20 00 00[ ]*vpermt2b zmm30,zmm29,ZMMWORD PTR \[rdx\+0x2000\] +[ ]*[a-f0-9]+:[ ]*62 62 15 40 7d 72 80[ ]*vpermt2b zmm30,zmm29,ZMMWORD PTR \[rdx-0x2000\] +[ ]*[a-f0-9]+:[ ]*62 62 15 40 7d b2 c0 df ff ff[ ]*vpermt2b zmm30,zmm29,ZMMWORD PTR \[rdx-0x2040\] +[ ]*[a-f0-9]+:[ ]*62 02 95 40 83 f4[ ]*vpmultishiftqb zmm30,zmm29,zmm28 +[ ]*[a-f0-9]+:[ ]*62 02 95 47 83 f4[ ]*vpmultishiftqb zmm30\{k7\},zmm29,zmm28 +[ ]*[a-f0-9]+:[ ]*62 02 95 c7 83 f4[ ]*vpmultishiftqb zmm30\{k7\}\{z\},zmm29,zmm28 +[ ]*[a-f0-9]+:[ ]*62 62 95 40 83 31[ ]*vpmultishiftqb zmm30,zmm29,ZMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+:[ ]*62 22 95 40 83 b4 f0 34 12 00 00[ ]*vpmultishiftqb zmm30,zmm29,ZMMWORD PTR \[rax\+r14\*8\+0x1234\] +[ ]*[a-f0-9]+:[ ]*62 62 95 50 83 31[ ]*vpmultishiftqb zmm30,zmm29,QWORD PTR \[rcx\]\{1to8\} +[ ]*[a-f0-9]+:[ ]*62 62 95 40 83 72 7f[ ]*vpmultishiftqb zmm30,zmm29,ZMMWORD PTR \[rdx\+0x1fc0\] +[ ]*[a-f0-9]+:[ ]*62 62 95 40 83 b2 00 20 00 00[ ]*vpmultishiftqb zmm30,zmm29,ZMMWORD PTR \[rdx\+0x2000\] +[ ]*[a-f0-9]+:[ ]*62 62 95 40 83 72 80[ ]*vpmultishiftqb zmm30,zmm29,ZMMWORD PTR \[rdx-0x2000\] +[ ]*[a-f0-9]+:[ ]*62 62 95 40 83 b2 c0 df ff ff[ ]*vpmultishiftqb zmm30,zmm29,ZMMWORD PTR \[rdx-0x2040\] +[ ]*[a-f0-9]+:[ ]*62 62 95 50 83 72 7f[ ]*vpmultishiftqb zmm30,zmm29,QWORD PTR \[rdx\+0x3f8\]\{1to8\} +[ ]*[a-f0-9]+:[ ]*62 62 95 50 83 b2 00 04 00 00[ ]*vpmultishiftqb zmm30,zmm29,QWORD PTR \[rdx\+0x400\]\{1to8\} +[ ]*[a-f0-9]+:[ ]*62 62 95 50 83 72 80[ ]*vpmultishiftqb zmm30,zmm29,QWORD PTR \[rdx-0x400\]\{1to8\} +[ ]*[a-f0-9]+:[ ]*62 62 95 50 83 b2 f8 fb ff ff[ ]*vpmultishiftqb zmm30,zmm29,QWORD PTR \[rdx-0x408\]\{1to8\} +#pass diff --git a/gas/testsuite/gas/i386/x86-64-avx512vbmi.d b/gas/testsuite/gas/i386/x86-64-avx512vbmi.d new file mode 100644 index 00000000000..87bf55c198f --- /dev/null +++ b/gas/testsuite/gas/i386/x86-64-avx512vbmi.d @@ -0,0 +1,94 @@ +#as: +#objdump: -dw +#name: x86_64 AVX512VBMI insns +#source: x86-64-avx512vbmi.s + +.*: +file format .* + + +Disassembly of section \.text: + +0+ <_start>: +[ ]*[a-f0-9]+:[ ]*62 02 15 40 8d f4[ ]*vpermb %zmm28,%zmm29,%zmm30 +[ ]*[a-f0-9]+:[ ]*62 02 15 47 8d f4[ ]*vpermb %zmm28,%zmm29,%zmm30\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 02 15 c7 8d f4[ ]*vpermb %zmm28,%zmm29,%zmm30\{%k7\}\{z\} +[ ]*[a-f0-9]+:[ ]*62 62 15 40 8d 31[ ]*vpermb \(%rcx\),%zmm29,%zmm30 +[ ]*[a-f0-9]+:[ ]*62 22 15 40 8d b4 f0 23 01 00 00[ ]*vpermb 0x123\(%rax,%r14,8\),%zmm29,%zmm30 +[ ]*[a-f0-9]+:[ ]*62 62 15 40 8d 72 7f[ ]*vpermb 0x1fc0\(%rdx\),%zmm29,%zmm30 +[ ]*[a-f0-9]+:[ ]*62 62 15 40 8d b2 00 20 00 00[ ]*vpermb 0x2000\(%rdx\),%zmm29,%zmm30 +[ ]*[a-f0-9]+:[ ]*62 62 15 40 8d 72 80[ ]*vpermb -0x2000\(%rdx\),%zmm29,%zmm30 +[ ]*[a-f0-9]+:[ ]*62 62 15 40 8d b2 c0 df ff ff[ ]*vpermb -0x2040\(%rdx\),%zmm29,%zmm30 +[ ]*[a-f0-9]+:[ ]*62 02 15 40 75 f4[ ]*vpermi2b %zmm28,%zmm29,%zmm30 +[ ]*[a-f0-9]+:[ ]*62 02 15 47 75 f4[ ]*vpermi2b %zmm28,%zmm29,%zmm30\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 02 15 c7 75 f4[ ]*vpermi2b %zmm28,%zmm29,%zmm30\{%k7\}\{z\} +[ ]*[a-f0-9]+:[ ]*62 62 15 40 75 31[ ]*vpermi2b \(%rcx\),%zmm29,%zmm30 +[ ]*[a-f0-9]+:[ ]*62 22 15 40 75 b4 f0 23 01 00 00[ ]*vpermi2b 0x123\(%rax,%r14,8\),%zmm29,%zmm30 +[ ]*[a-f0-9]+:[ ]*62 62 15 40 75 72 7f[ ]*vpermi2b 0x1fc0\(%rdx\),%zmm29,%zmm30 +[ ]*[a-f0-9]+:[ ]*62 62 15 40 75 b2 00 20 00 00[ ]*vpermi2b 0x2000\(%rdx\),%zmm29,%zmm30 +[ ]*[a-f0-9]+:[ ]*62 62 15 40 75 72 80[ ]*vpermi2b -0x2000\(%rdx\),%zmm29,%zmm30 +[ ]*[a-f0-9]+:[ ]*62 62 15 40 75 b2 c0 df ff ff[ ]*vpermi2b -0x2040\(%rdx\),%zmm29,%zmm30 +[ ]*[a-f0-9]+:[ ]*62 02 15 40 7d f4[ ]*vpermt2b %zmm28,%zmm29,%zmm30 +[ ]*[a-f0-9]+:[ ]*62 02 15 47 7d f4[ ]*vpermt2b %zmm28,%zmm29,%zmm30\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 02 15 c7 7d f4[ ]*vpermt2b %zmm28,%zmm29,%zmm30\{%k7\}\{z\} +[ ]*[a-f0-9]+:[ ]*62 62 15 40 7d 31[ ]*vpermt2b \(%rcx\),%zmm29,%zmm30 +[ ]*[a-f0-9]+:[ ]*62 22 15 40 7d b4 f0 23 01 00 00[ ]*vpermt2b 0x123\(%rax,%r14,8\),%zmm29,%zmm30 +[ ]*[a-f0-9]+:[ ]*62 62 15 40 7d 72 7f[ ]*vpermt2b 0x1fc0\(%rdx\),%zmm29,%zmm30 +[ ]*[a-f0-9]+:[ ]*62 62 15 40 7d b2 00 20 00 00[ ]*vpermt2b 0x2000\(%rdx\),%zmm29,%zmm30 +[ ]*[a-f0-9]+:[ ]*62 62 15 40 7d 72 80[ ]*vpermt2b -0x2000\(%rdx\),%zmm29,%zmm30 +[ ]*[a-f0-9]+:[ ]*62 62 15 40 7d b2 c0 df ff ff[ ]*vpermt2b -0x2040\(%rdx\),%zmm29,%zmm30 +[ ]*[a-f0-9]+:[ ]*62 02 95 40 83 f4[ ]*vpmultishiftqb %zmm28,%zmm29,%zmm30 +[ ]*[a-f0-9]+:[ ]*62 02 95 47 83 f4[ ]*vpmultishiftqb %zmm28,%zmm29,%zmm30\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 02 95 c7 83 f4[ ]*vpmultishiftqb %zmm28,%zmm29,%zmm30\{%k7\}\{z\} +[ ]*[a-f0-9]+:[ ]*62 62 95 40 83 31[ ]*vpmultishiftqb \(%rcx\),%zmm29,%zmm30 +[ ]*[a-f0-9]+:[ ]*62 22 95 40 83 b4 f0 23 01 00 00[ ]*vpmultishiftqb 0x123\(%rax,%r14,8\),%zmm29,%zmm30 +[ ]*[a-f0-9]+:[ ]*62 62 95 50 83 31[ ]*vpmultishiftqb \(%rcx\)\{1to8\},%zmm29,%zmm30 +[ ]*[a-f0-9]+:[ ]*62 62 95 40 83 72 7f[ ]*vpmultishiftqb 0x1fc0\(%rdx\),%zmm29,%zmm30 +[ ]*[a-f0-9]+:[ ]*62 62 95 40 83 b2 00 20 00 00[ ]*vpmultishiftqb 0x2000\(%rdx\),%zmm29,%zmm30 +[ ]*[a-f0-9]+:[ ]*62 62 95 40 83 72 80[ ]*vpmultishiftqb -0x2000\(%rdx\),%zmm29,%zmm30 +[ ]*[a-f0-9]+:[ ]*62 62 95 40 83 b2 c0 df ff ff[ ]*vpmultishiftqb -0x2040\(%rdx\),%zmm29,%zmm30 +[ ]*[a-f0-9]+:[ ]*62 62 95 50 83 72 7f[ ]*vpmultishiftqb 0x3f8\(%rdx\)\{1to8\},%zmm29,%zmm30 +[ ]*[a-f0-9]+:[ ]*62 62 95 50 83 b2 00 04 00 00[ ]*vpmultishiftqb 0x400\(%rdx\)\{1to8\},%zmm29,%zmm30 +[ ]*[a-f0-9]+:[ ]*62 62 95 50 83 72 80[ ]*vpmultishiftqb -0x400\(%rdx\)\{1to8\},%zmm29,%zmm30 +[ ]*[a-f0-9]+:[ ]*62 62 95 50 83 b2 f8 fb ff ff[ ]*vpmultishiftqb -0x408\(%rdx\)\{1to8\},%zmm29,%zmm30 +[ ]*[a-f0-9]+:[ ]*62 02 15 40 8d f4[ ]*vpermb %zmm28,%zmm29,%zmm30 +[ ]*[a-f0-9]+:[ ]*62 02 15 47 8d f4[ ]*vpermb %zmm28,%zmm29,%zmm30\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 02 15 c7 8d f4[ ]*vpermb %zmm28,%zmm29,%zmm30\{%k7\}\{z\} +[ ]*[a-f0-9]+:[ ]*62 62 15 40 8d 31[ ]*vpermb \(%rcx\),%zmm29,%zmm30 +[ ]*[a-f0-9]+:[ ]*62 22 15 40 8d b4 f0 34 12 00 00[ ]*vpermb 0x1234\(%rax,%r14,8\),%zmm29,%zmm30 +[ ]*[a-f0-9]+:[ ]*62 62 15 40 8d 72 7f[ ]*vpermb 0x1fc0\(%rdx\),%zmm29,%zmm30 +[ ]*[a-f0-9]+:[ ]*62 62 15 40 8d b2 00 20 00 00[ ]*vpermb 0x2000\(%rdx\),%zmm29,%zmm30 +[ ]*[a-f0-9]+:[ ]*62 62 15 40 8d 72 80[ ]*vpermb -0x2000\(%rdx\),%zmm29,%zmm30 +[ ]*[a-f0-9]+:[ ]*62 62 15 40 8d b2 c0 df ff ff[ ]*vpermb -0x2040\(%rdx\),%zmm29,%zmm30 +[ ]*[a-f0-9]+:[ ]*62 02 15 40 75 f4[ ]*vpermi2b %zmm28,%zmm29,%zmm30 +[ ]*[a-f0-9]+:[ ]*62 02 15 47 75 f4[ ]*vpermi2b %zmm28,%zmm29,%zmm30\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 02 15 c7 75 f4[ ]*vpermi2b %zmm28,%zmm29,%zmm30\{%k7\}\{z\} +[ ]*[a-f0-9]+:[ ]*62 62 15 40 75 31[ ]*vpermi2b \(%rcx\),%zmm29,%zmm30 +[ ]*[a-f0-9]+:[ ]*62 22 15 40 75 b4 f0 34 12 00 00[ ]*vpermi2b 0x1234\(%rax,%r14,8\),%zmm29,%zmm30 +[ ]*[a-f0-9]+:[ ]*62 62 15 40 75 72 7f[ ]*vpermi2b 0x1fc0\(%rdx\),%zmm29,%zmm30 +[ ]*[a-f0-9]+:[ ]*62 62 15 40 75 b2 00 20 00 00[ ]*vpermi2b 0x2000\(%rdx\),%zmm29,%zmm30 +[ ]*[a-f0-9]+:[ ]*62 62 15 40 75 72 80[ ]*vpermi2b -0x2000\(%rdx\),%zmm29,%zmm30 +[ ]*[a-f0-9]+:[ ]*62 62 15 40 75 b2 c0 df ff ff[ ]*vpermi2b -0x2040\(%rdx\),%zmm29,%zmm30 +[ ]*[a-f0-9]+:[ ]*62 02 15 40 7d f4[ ]*vpermt2b %zmm28,%zmm29,%zmm30 +[ ]*[a-f0-9]+:[ ]*62 02 15 47 7d f4[ ]*vpermt2b %zmm28,%zmm29,%zmm30\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 02 15 c7 7d f4[ ]*vpermt2b %zmm28,%zmm29,%zmm30\{%k7\}\{z\} +[ ]*[a-f0-9]+:[ ]*62 62 15 40 7d 31[ ]*vpermt2b \(%rcx\),%zmm29,%zmm30 +[ ]*[a-f0-9]+:[ ]*62 22 15 40 7d b4 f0 34 12 00 00[ ]*vpermt2b 0x1234\(%rax,%r14,8\),%zmm29,%zmm30 +[ ]*[a-f0-9]+:[ ]*62 62 15 40 7d 72 7f[ ]*vpermt2b 0x1fc0\(%rdx\),%zmm29,%zmm30 +[ ]*[a-f0-9]+:[ ]*62 62 15 40 7d b2 00 20 00 00[ ]*vpermt2b 0x2000\(%rdx\),%zmm29,%zmm30 +[ ]*[a-f0-9]+:[ ]*62 62 15 40 7d 72 80[ ]*vpermt2b -0x2000\(%rdx\),%zmm29,%zmm30 +[ ]*[a-f0-9]+:[ ]*62 62 15 40 7d b2 c0 df ff ff[ ]*vpermt2b -0x2040\(%rdx\),%zmm29,%zmm30 +[ ]*[a-f0-9]+:[ ]*62 02 95 40 83 f4[ ]*vpmultishiftqb %zmm28,%zmm29,%zmm30 +[ ]*[a-f0-9]+:[ ]*62 02 95 47 83 f4[ ]*vpmultishiftqb %zmm28,%zmm29,%zmm30\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 02 95 c7 83 f4[ ]*vpmultishiftqb %zmm28,%zmm29,%zmm30\{%k7\}\{z\} +[ ]*[a-f0-9]+:[ ]*62 62 95 40 83 31[ ]*vpmultishiftqb \(%rcx\),%zmm29,%zmm30 +[ ]*[a-f0-9]+:[ ]*62 22 95 40 83 b4 f0 34 12 00 00[ ]*vpmultishiftqb 0x1234\(%rax,%r14,8\),%zmm29,%zmm30 +[ ]*[a-f0-9]+:[ ]*62 62 95 50 83 31[ ]*vpmultishiftqb \(%rcx\)\{1to8\},%zmm29,%zmm30 +[ ]*[a-f0-9]+:[ ]*62 62 95 40 83 72 7f[ ]*vpmultishiftqb 0x1fc0\(%rdx\),%zmm29,%zmm30 +[ ]*[a-f0-9]+:[ ]*62 62 95 40 83 b2 00 20 00 00[ ]*vpmultishiftqb 0x2000\(%rdx\),%zmm29,%zmm30 +[ ]*[a-f0-9]+:[ ]*62 62 95 40 83 72 80[ ]*vpmultishiftqb -0x2000\(%rdx\),%zmm29,%zmm30 +[ ]*[a-f0-9]+:[ ]*62 62 95 40 83 b2 c0 df ff ff[ ]*vpmultishiftqb -0x2040\(%rdx\),%zmm29,%zmm30 +[ ]*[a-f0-9]+:[ ]*62 62 95 50 83 72 7f[ ]*vpmultishiftqb 0x3f8\(%rdx\)\{1to8\},%zmm29,%zmm30 +[ ]*[a-f0-9]+:[ ]*62 62 95 50 83 b2 00 04 00 00[ ]*vpmultishiftqb 0x400\(%rdx\)\{1to8\},%zmm29,%zmm30 +[ ]*[a-f0-9]+:[ ]*62 62 95 50 83 72 80[ ]*vpmultishiftqb -0x400\(%rdx\)\{1to8\},%zmm29,%zmm30 +[ ]*[a-f0-9]+:[ ]*62 62 95 50 83 b2 f8 fb ff ff[ ]*vpmultishiftqb -0x408\(%rdx\)\{1to8\},%zmm29,%zmm30 +#pass diff --git a/gas/testsuite/gas/i386/x86-64-avx512vbmi.s b/gas/testsuite/gas/i386/x86-64-avx512vbmi.s new file mode 100644 index 00000000000..9b93bfcd993 --- /dev/null +++ b/gas/testsuite/gas/i386/x86-64-avx512vbmi.s @@ -0,0 +1,89 @@ +# Check 64bit AVX512VBMI instructions + + .allow_index_reg + .text +_start: + vpermb %zmm28, %zmm29, %zmm30 # AVX512VBMI + vpermb %zmm28, %zmm29, %zmm30{%k7} # AVX512VBMI + vpermb %zmm28, %zmm29, %zmm30{%k7}{z} # AVX512VBMI + vpermb (%rcx), %zmm29, %zmm30 # AVX512VBMI + vpermb 0x123(%rax,%r14,8), %zmm29, %zmm30 # AVX512VBMI + vpermb 8128(%rdx), %zmm29, %zmm30 # AVX512VBMI Disp8 + vpermb 8192(%rdx), %zmm29, %zmm30 # AVX512VBMI + vpermb -8192(%rdx), %zmm29, %zmm30 # AVX512VBMI Disp8 + vpermb -8256(%rdx), %zmm29, %zmm30 # AVX512VBMI + vpermi2b %zmm28, %zmm29, %zmm30 # AVX512VBMI + vpermi2b %zmm28, %zmm29, %zmm30{%k7} # AVX512VBMI + vpermi2b %zmm28, %zmm29, %zmm30{%k7}{z} # AVX512VBMI + vpermi2b (%rcx), %zmm29, %zmm30 # AVX512VBMI + vpermi2b 0x123(%rax,%r14,8), %zmm29, %zmm30 # AVX512VBMI + vpermi2b 8128(%rdx), %zmm29, %zmm30 # AVX512VBMI Disp8 + vpermi2b 8192(%rdx), %zmm29, %zmm30 # AVX512VBMI + vpermi2b -8192(%rdx), %zmm29, %zmm30 # AVX512VBMI Disp8 + vpermi2b -8256(%rdx), %zmm29, %zmm30 # AVX512VBMI + vpermt2b %zmm28, %zmm29, %zmm30 # AVX512VBMI + vpermt2b %zmm28, %zmm29, %zmm30{%k7} # AVX512VBMI + vpermt2b %zmm28, %zmm29, %zmm30{%k7}{z} # AVX512VBMI + vpermt2b (%rcx), %zmm29, %zmm30 # AVX512VBMI + vpermt2b 0x123(%rax,%r14,8), %zmm29, %zmm30 # AVX512VBMI + vpermt2b 8128(%rdx), %zmm29, %zmm30 # AVX512VBMI Disp8 + vpermt2b 8192(%rdx), %zmm29, %zmm30 # AVX512VBMI + vpermt2b -8192(%rdx), %zmm29, %zmm30 # AVX512VBMI Disp8 + vpermt2b -8256(%rdx), %zmm29, %zmm30 # AVX512VBMI + vpmultishiftqb %zmm28, %zmm29, %zmm30 # AVX512VBMI + vpmultishiftqb %zmm28, %zmm29, %zmm30{%k7} # AVX512VBMI + vpmultishiftqb %zmm28, %zmm29, %zmm30{%k7}{z} # AVX512VBMI + vpmultishiftqb (%rcx), %zmm29, %zmm30 # AVX512VBMI + vpmultishiftqb 0x123(%rax,%r14,8), %zmm29, %zmm30 # AVX512VBMI + vpmultishiftqb (%rcx){1to8}, %zmm29, %zmm30 # AVX512VBMI + vpmultishiftqb 8128(%rdx), %zmm29, %zmm30 # AVX512VBMI Disp8 + vpmultishiftqb 8192(%rdx), %zmm29, %zmm30 # AVX512VBMI + vpmultishiftqb -8192(%rdx), %zmm29, %zmm30 # AVX512VBMI Disp8 + vpmultishiftqb -8256(%rdx), %zmm29, %zmm30 # AVX512VBMI + vpmultishiftqb 1016(%rdx){1to8}, %zmm29, %zmm30 # AVX512VBMI Disp8 + vpmultishiftqb 1024(%rdx){1to8}, %zmm29, %zmm30 # AVX512VBMI + vpmultishiftqb -1024(%rdx){1to8}, %zmm29, %zmm30 # AVX512VBMI Disp8 + vpmultishiftqb -1032(%rdx){1to8}, %zmm29, %zmm30 # AVX512VBMI + + .intel_syntax noprefix + vpermb zmm30, zmm29, zmm28 # AVX512VBMI + vpermb zmm30{k7}, zmm29, zmm28 # AVX512VBMI + vpermb zmm30{k7}{z}, zmm29, zmm28 # AVX512VBMI + vpermb zmm30, zmm29, ZMMWORD PTR [rcx] # AVX512VBMI + vpermb zmm30, zmm29, ZMMWORD PTR [rax+r14*8+0x1234] # AVX512VBMI + vpermb zmm30, zmm29, ZMMWORD PTR [rdx+8128] # AVX512VBMI Disp8 + vpermb zmm30, zmm29, ZMMWORD PTR [rdx+8192] # AVX512VBMI + vpermb zmm30, zmm29, ZMMWORD PTR [rdx-8192] # AVX512VBMI Disp8 + vpermb zmm30, zmm29, ZMMWORD PTR [rdx-8256] # AVX512VBMI + vpermi2b zmm30, zmm29, zmm28 # AVX512VBMI + vpermi2b zmm30{k7}, zmm29, zmm28 # AVX512VBMI + vpermi2b zmm30{k7}{z}, zmm29, zmm28 # AVX512VBMI + vpermi2b zmm30, zmm29, ZMMWORD PTR [rcx] # AVX512VBMI + vpermi2b zmm30, zmm29, ZMMWORD PTR [rax+r14*8+0x1234] # AVX512VBMI + vpermi2b zmm30, zmm29, ZMMWORD PTR [rdx+8128] # AVX512VBMI Disp8 + vpermi2b zmm30, zmm29, ZMMWORD PTR [rdx+8192] # AVX512VBMI + vpermi2b zmm30, zmm29, ZMMWORD PTR [rdx-8192] # AVX512VBMI Disp8 + vpermi2b zmm30, zmm29, ZMMWORD PTR [rdx-8256] # AVX512VBMI + vpermt2b zmm30, zmm29, zmm28 # AVX512VBMI + vpermt2b zmm30{k7}, zmm29, zmm28 # AVX512VBMI + vpermt2b zmm30{k7}{z}, zmm29, zmm28 # AVX512VBMI + vpermt2b zmm30, zmm29, ZMMWORD PTR [rcx] # AVX512VBMI + vpermt2b zmm30, zmm29, ZMMWORD PTR [rax+r14*8+0x1234] # AVX512VBMI + vpermt2b zmm30, zmm29, ZMMWORD PTR [rdx+8128] # AVX512VBMI Disp8 + vpermt2b zmm30, zmm29, ZMMWORD PTR [rdx+8192] # AVX512VBMI + vpermt2b zmm30, zmm29, ZMMWORD PTR [rdx-8192] # AVX512VBMI Disp8 + vpermt2b zmm30, zmm29, ZMMWORD PTR [rdx-8256] # AVX512VBMI + vpmultishiftqb zmm30, zmm29, zmm28 # AVX512VBMI + vpmultishiftqb zmm30{k7}, zmm29, zmm28 # AVX512VBMI + vpmultishiftqb zmm30{k7}{z}, zmm29, zmm28 # AVX512VBMI + vpmultishiftqb zmm30, zmm29, ZMMWORD PTR [rcx] # AVX512VBMI + vpmultishiftqb zmm30, zmm29, ZMMWORD PTR [rax+r14*8+0x1234] # AVX512VBMI + vpmultishiftqb zmm30, zmm29, [rcx]{1to8} # AVX512VBMI + vpmultishiftqb zmm30, zmm29, ZMMWORD PTR [rdx+8128] # AVX512VBMI Disp8 + vpmultishiftqb zmm30, zmm29, ZMMWORD PTR [rdx+8192] # AVX512VBMI + vpmultishiftqb zmm30, zmm29, ZMMWORD PTR [rdx-8192] # AVX512VBMI Disp8 + vpmultishiftqb zmm30, zmm29, ZMMWORD PTR [rdx-8256] # AVX512VBMI + vpmultishiftqb zmm30, zmm29, [rdx+1016]{1to8} # AVX512VBMI Disp8 + vpmultishiftqb zmm30, zmm29, [rdx+1024]{1to8} # AVX512VBMI + vpmultishiftqb zmm30, zmm29, [rdx-1024]{1to8} # AVX512VBMI Disp8 + vpmultishiftqb zmm30, zmm29, [rdx-1032]{1to8} # AVX512VBMI diff --git a/gas/testsuite/gas/i386/x86-64-avx512vbmi_vl-intel.d b/gas/testsuite/gas/i386/x86-64-avx512vbmi_vl-intel.d new file mode 100644 index 00000000000..0fd5a6e31d7 --- /dev/null +++ b/gas/testsuite/gas/i386/x86-64-avx512vbmi_vl-intel.d @@ -0,0 +1,176 @@ +#as: +#objdump: -dw -Mintel +#name: x86_64 AVX512VBMI/VL insns (Intel disassembly) +#source: x86-64-avx512vbmi_vl.s + +.*: +file format .* + + +Disassembly of section \.text: + +0+ <_start>: +[ ]*[a-f0-9]+:[ ]*62 02 15 00 8d f4[ ]*vpermb xmm30,xmm29,xmm28 +[ ]*[a-f0-9]+:[ ]*62 02 15 07 8d f4[ ]*vpermb xmm30\{k7\},xmm29,xmm28 +[ ]*[a-f0-9]+:[ ]*62 02 15 87 8d f4[ ]*vpermb xmm30\{k7\}\{z\},xmm29,xmm28 +[ ]*[a-f0-9]+:[ ]*62 62 15 00 8d 31[ ]*vpermb xmm30,xmm29,XMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+:[ ]*62 22 15 00 8d b4 f0 23 01 00 00[ ]*vpermb xmm30,xmm29,XMMWORD PTR \[rax\+r14\*8\+0x123\] +[ ]*[a-f0-9]+:[ ]*62 62 15 00 8d 72 7f[ ]*vpermb xmm30,xmm29,XMMWORD PTR \[rdx\+0x7f0\] +[ ]*[a-f0-9]+:[ ]*62 62 15 00 8d b2 00 08 00 00[ ]*vpermb xmm30,xmm29,XMMWORD PTR \[rdx\+0x800\] +[ ]*[a-f0-9]+:[ ]*62 62 15 00 8d 72 80[ ]*vpermb xmm30,xmm29,XMMWORD PTR \[rdx-0x800\] +[ ]*[a-f0-9]+:[ ]*62 62 15 00 8d b2 f0 f7 ff ff[ ]*vpermb xmm30,xmm29,XMMWORD PTR \[rdx-0x810\] +[ ]*[a-f0-9]+:[ ]*62 02 15 20 8d f4[ ]*vpermb ymm30,ymm29,ymm28 +[ ]*[a-f0-9]+:[ ]*62 02 15 27 8d f4[ ]*vpermb ymm30\{k7\},ymm29,ymm28 +[ ]*[a-f0-9]+:[ ]*62 02 15 a7 8d f4[ ]*vpermb ymm30\{k7\}\{z\},ymm29,ymm28 +[ ]*[a-f0-9]+:[ ]*62 62 15 20 8d 31[ ]*vpermb ymm30,ymm29,YMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+:[ ]*62 22 15 20 8d b4 f0 23 01 00 00[ ]*vpermb ymm30,ymm29,YMMWORD PTR \[rax\+r14\*8\+0x123\] +[ ]*[a-f0-9]+:[ ]*62 62 15 20 8d 72 7f[ ]*vpermb ymm30,ymm29,YMMWORD PTR \[rdx\+0xfe0\] +[ ]*[a-f0-9]+:[ ]*62 62 15 20 8d b2 00 10 00 00[ ]*vpermb ymm30,ymm29,YMMWORD PTR \[rdx\+0x1000\] +[ ]*[a-f0-9]+:[ ]*62 62 15 20 8d 72 80[ ]*vpermb ymm30,ymm29,YMMWORD PTR \[rdx-0x1000\] +[ ]*[a-f0-9]+:[ ]*62 62 15 20 8d b2 e0 ef ff ff[ ]*vpermb ymm30,ymm29,YMMWORD PTR \[rdx-0x1020\] +[ ]*[a-f0-9]+:[ ]*62 02 15 00 75 f4[ ]*vpermi2b xmm30,xmm29,xmm28 +[ ]*[a-f0-9]+:[ ]*62 02 15 07 75 f4[ ]*vpermi2b xmm30\{k7\},xmm29,xmm28 +[ ]*[a-f0-9]+:[ ]*62 02 15 87 75 f4[ ]*vpermi2b xmm30\{k7\}\{z\},xmm29,xmm28 +[ ]*[a-f0-9]+:[ ]*62 62 15 00 75 31[ ]*vpermi2b xmm30,xmm29,XMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+:[ ]*62 22 15 00 75 b4 f0 23 01 00 00[ ]*vpermi2b xmm30,xmm29,XMMWORD PTR \[rax\+r14\*8\+0x123\] +[ ]*[a-f0-9]+:[ ]*62 62 15 00 75 72 7f[ ]*vpermi2b xmm30,xmm29,XMMWORD PTR \[rdx\+0x7f0\] +[ ]*[a-f0-9]+:[ ]*62 62 15 00 75 b2 00 08 00 00[ ]*vpermi2b xmm30,xmm29,XMMWORD PTR \[rdx\+0x800\] +[ ]*[a-f0-9]+:[ ]*62 62 15 00 75 72 80[ ]*vpermi2b xmm30,xmm29,XMMWORD PTR \[rdx-0x800\] +[ ]*[a-f0-9]+:[ ]*62 62 15 00 75 b2 f0 f7 ff ff[ ]*vpermi2b xmm30,xmm29,XMMWORD PTR \[rdx-0x810\] +[ ]*[a-f0-9]+:[ ]*62 02 15 20 75 f4[ ]*vpermi2b ymm30,ymm29,ymm28 +[ ]*[a-f0-9]+:[ ]*62 02 15 27 75 f4[ ]*vpermi2b ymm30\{k7\},ymm29,ymm28 +[ ]*[a-f0-9]+:[ ]*62 02 15 a7 75 f4[ ]*vpermi2b ymm30\{k7\}\{z\},ymm29,ymm28 +[ ]*[a-f0-9]+:[ ]*62 62 15 20 75 31[ ]*vpermi2b ymm30,ymm29,YMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+:[ ]*62 22 15 20 75 b4 f0 23 01 00 00[ ]*vpermi2b ymm30,ymm29,YMMWORD PTR \[rax\+r14\*8\+0x123\] +[ ]*[a-f0-9]+:[ ]*62 62 15 20 75 72 7f[ ]*vpermi2b ymm30,ymm29,YMMWORD PTR \[rdx\+0xfe0\] +[ ]*[a-f0-9]+:[ ]*62 62 15 20 75 b2 00 10 00 00[ ]*vpermi2b ymm30,ymm29,YMMWORD PTR \[rdx\+0x1000\] +[ ]*[a-f0-9]+:[ ]*62 62 15 20 75 72 80[ ]*vpermi2b ymm30,ymm29,YMMWORD PTR \[rdx-0x1000\] +[ ]*[a-f0-9]+:[ ]*62 62 15 20 75 b2 e0 ef ff ff[ ]*vpermi2b ymm30,ymm29,YMMWORD PTR \[rdx-0x1020\] +[ ]*[a-f0-9]+:[ ]*62 02 15 00 7d f4[ ]*vpermt2b xmm30,xmm29,xmm28 +[ ]*[a-f0-9]+:[ ]*62 02 15 07 7d f4[ ]*vpermt2b xmm30\{k7\},xmm29,xmm28 +[ ]*[a-f0-9]+:[ ]*62 02 15 87 7d f4[ ]*vpermt2b xmm30\{k7\}\{z\},xmm29,xmm28 +[ ]*[a-f0-9]+:[ ]*62 62 15 00 7d 31[ ]*vpermt2b xmm30,xmm29,XMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+:[ ]*62 22 15 00 7d b4 f0 23 01 00 00[ ]*vpermt2b xmm30,xmm29,XMMWORD PTR \[rax\+r14\*8\+0x123\] +[ ]*[a-f0-9]+:[ ]*62 62 15 00 7d 72 7f[ ]*vpermt2b xmm30,xmm29,XMMWORD PTR \[rdx\+0x7f0\] +[ ]*[a-f0-9]+:[ ]*62 62 15 00 7d b2 00 08 00 00[ ]*vpermt2b xmm30,xmm29,XMMWORD PTR \[rdx\+0x800\] +[ ]*[a-f0-9]+:[ ]*62 62 15 00 7d 72 80[ ]*vpermt2b xmm30,xmm29,XMMWORD PTR \[rdx-0x800\] +[ ]*[a-f0-9]+:[ ]*62 62 15 00 7d b2 f0 f7 ff ff[ ]*vpermt2b xmm30,xmm29,XMMWORD PTR \[rdx-0x810\] +[ ]*[a-f0-9]+:[ ]*62 02 15 20 7d f4[ ]*vpermt2b ymm30,ymm29,ymm28 +[ ]*[a-f0-9]+:[ ]*62 02 15 27 7d f4[ ]*vpermt2b ymm30\{k7\},ymm29,ymm28 +[ ]*[a-f0-9]+:[ ]*62 02 15 a7 7d f4[ ]*vpermt2b ymm30\{k7\}\{z\},ymm29,ymm28 +[ ]*[a-f0-9]+:[ ]*62 62 15 20 7d 31[ ]*vpermt2b ymm30,ymm29,YMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+:[ ]*62 22 15 20 7d b4 f0 23 01 00 00[ ]*vpermt2b ymm30,ymm29,YMMWORD PTR \[rax\+r14\*8\+0x123\] +[ ]*[a-f0-9]+:[ ]*62 62 15 20 7d 72 7f[ ]*vpermt2b ymm30,ymm29,YMMWORD PTR \[rdx\+0xfe0\] +[ ]*[a-f0-9]+:[ ]*62 62 15 20 7d b2 00 10 00 00[ ]*vpermt2b ymm30,ymm29,YMMWORD PTR \[rdx\+0x1000\] +[ ]*[a-f0-9]+:[ ]*62 62 15 20 7d 72 80[ ]*vpermt2b ymm30,ymm29,YMMWORD PTR \[rdx-0x1000\] +[ ]*[a-f0-9]+:[ ]*62 62 15 20 7d b2 e0 ef ff ff[ ]*vpermt2b ymm30,ymm29,YMMWORD PTR \[rdx-0x1020\] +[ ]*[a-f0-9]+:[ ]*62 02 95 00 83 f4[ ]*vpmultishiftqb xmm30,xmm29,xmm28 +[ ]*[a-f0-9]+:[ ]*62 02 95 07 83 f4[ ]*vpmultishiftqb xmm30\{k7\},xmm29,xmm28 +[ ]*[a-f0-9]+:[ ]*62 02 95 87 83 f4[ ]*vpmultishiftqb xmm30\{k7\}\{z\},xmm29,xmm28 +[ ]*[a-f0-9]+:[ ]*62 62 95 00 83 31[ ]*vpmultishiftqb xmm30,xmm29,XMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+:[ ]*62 22 95 00 83 b4 f0 23 01 00 00[ ]*vpmultishiftqb xmm30,xmm29,XMMWORD PTR \[rax\+r14\*8\+0x123\] +[ ]*[a-f0-9]+:[ ]*62 62 95 10 83 31[ ]*vpmultishiftqb xmm30,xmm29,QWORD PTR \[rcx\]\{1to2\} +[ ]*[a-f0-9]+:[ ]*62 62 95 00 83 72 7f[ ]*vpmultishiftqb xmm30,xmm29,XMMWORD PTR \[rdx\+0x7f0\] +[ ]*[a-f0-9]+:[ ]*62 62 95 00 83 b2 00 08 00 00[ ]*vpmultishiftqb xmm30,xmm29,XMMWORD PTR \[rdx\+0x800\] +[ ]*[a-f0-9]+:[ ]*62 62 95 00 83 72 80[ ]*vpmultishiftqb xmm30,xmm29,XMMWORD PTR \[rdx-0x800\] +[ ]*[a-f0-9]+:[ ]*62 62 95 00 83 b2 f0 f7 ff ff[ ]*vpmultishiftqb xmm30,xmm29,XMMWORD PTR \[rdx-0x810\] +[ ]*[a-f0-9]+:[ ]*62 62 95 10 83 72 7f[ ]*vpmultishiftqb xmm30,xmm29,QWORD PTR \[rdx\+0x3f8\]\{1to2\} +[ ]*[a-f0-9]+:[ ]*62 62 95 10 83 b2 00 04 00 00[ ]*vpmultishiftqb xmm30,xmm29,QWORD PTR \[rdx\+0x400\]\{1to2\} +[ ]*[a-f0-9]+:[ ]*62 62 95 10 83 72 80[ ]*vpmultishiftqb xmm30,xmm29,QWORD PTR \[rdx-0x400\]\{1to2\} +[ ]*[a-f0-9]+:[ ]*62 62 95 10 83 b2 f8 fb ff ff[ ]*vpmultishiftqb xmm30,xmm29,QWORD PTR \[rdx-0x408\]\{1to2\} +[ ]*[a-f0-9]+:[ ]*62 02 95 20 83 f4[ ]*vpmultishiftqb ymm30,ymm29,ymm28 +[ ]*[a-f0-9]+:[ ]*62 02 95 27 83 f4[ ]*vpmultishiftqb ymm30\{k7\},ymm29,ymm28 +[ ]*[a-f0-9]+:[ ]*62 02 95 a7 83 f4[ ]*vpmultishiftqb ymm30\{k7\}\{z\},ymm29,ymm28 +[ ]*[a-f0-9]+:[ ]*62 62 95 20 83 31[ ]*vpmultishiftqb ymm30,ymm29,YMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+:[ ]*62 22 95 20 83 b4 f0 23 01 00 00[ ]*vpmultishiftqb ymm30,ymm29,YMMWORD PTR \[rax\+r14\*8\+0x123\] +[ ]*[a-f0-9]+:[ ]*62 62 95 30 83 31[ ]*vpmultishiftqb ymm30,ymm29,QWORD PTR \[rcx\]\{1to4\} +[ ]*[a-f0-9]+:[ ]*62 62 95 20 83 72 7f[ ]*vpmultishiftqb ymm30,ymm29,YMMWORD PTR \[rdx\+0xfe0\] +[ ]*[a-f0-9]+:[ ]*62 62 95 20 83 b2 00 10 00 00[ ]*vpmultishiftqb ymm30,ymm29,YMMWORD PTR \[rdx\+0x1000\] +[ ]*[a-f0-9]+:[ ]*62 62 95 20 83 72 80[ ]*vpmultishiftqb ymm30,ymm29,YMMWORD PTR \[rdx-0x1000\] +[ ]*[a-f0-9]+:[ ]*62 62 95 20 83 b2 e0 ef ff ff[ ]*vpmultishiftqb ymm30,ymm29,YMMWORD PTR \[rdx-0x1020\] +[ ]*[a-f0-9]+:[ ]*62 62 95 30 83 72 7f[ ]*vpmultishiftqb ymm30,ymm29,QWORD PTR \[rdx\+0x3f8\]\{1to4\} +[ ]*[a-f0-9]+:[ ]*62 62 95 30 83 b2 00 04 00 00[ ]*vpmultishiftqb ymm30,ymm29,QWORD PTR \[rdx\+0x400\]\{1to4\} +[ ]*[a-f0-9]+:[ ]*62 62 95 30 83 72 80[ ]*vpmultishiftqb ymm30,ymm29,QWORD PTR \[rdx-0x400\]\{1to4\} +[ ]*[a-f0-9]+:[ ]*62 62 95 30 83 b2 f8 fb ff ff[ ]*vpmultishiftqb ymm30,ymm29,QWORD PTR \[rdx-0x408\]\{1to4\} +[ ]*[a-f0-9]+:[ ]*62 02 15 00 8d f4[ ]*vpermb xmm30,xmm29,xmm28 +[ ]*[a-f0-9]+:[ ]*62 02 15 07 8d f4[ ]*vpermb xmm30\{k7\},xmm29,xmm28 +[ ]*[a-f0-9]+:[ ]*62 02 15 87 8d f4[ ]*vpermb xmm30\{k7\}\{z\},xmm29,xmm28 +[ ]*[a-f0-9]+:[ ]*62 62 15 00 8d 31[ ]*vpermb xmm30,xmm29,XMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+:[ ]*62 22 15 00 8d b4 f0 34 12 00 00[ ]*vpermb xmm30,xmm29,XMMWORD PTR \[rax\+r14\*8\+0x1234\] +[ ]*[a-f0-9]+:[ ]*62 62 15 00 8d 72 7f[ ]*vpermb xmm30,xmm29,XMMWORD PTR \[rdx\+0x7f0\] +[ ]*[a-f0-9]+:[ ]*62 62 15 00 8d b2 00 08 00 00[ ]*vpermb xmm30,xmm29,XMMWORD PTR \[rdx\+0x800\] +[ ]*[a-f0-9]+:[ ]*62 62 15 00 8d 72 80[ ]*vpermb xmm30,xmm29,XMMWORD PTR \[rdx-0x800\] +[ ]*[a-f0-9]+:[ ]*62 62 15 00 8d b2 f0 f7 ff ff[ ]*vpermb xmm30,xmm29,XMMWORD PTR \[rdx-0x810\] +[ ]*[a-f0-9]+:[ ]*62 02 15 20 8d f4[ ]*vpermb ymm30,ymm29,ymm28 +[ ]*[a-f0-9]+:[ ]*62 02 15 27 8d f4[ ]*vpermb ymm30\{k7\},ymm29,ymm28 +[ ]*[a-f0-9]+:[ ]*62 02 15 a7 8d f4[ ]*vpermb ymm30\{k7\}\{z\},ymm29,ymm28 +[ ]*[a-f0-9]+:[ ]*62 62 15 20 8d 31[ ]*vpermb ymm30,ymm29,YMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+:[ ]*62 22 15 20 8d b4 f0 34 12 00 00[ ]*vpermb ymm30,ymm29,YMMWORD PTR \[rax\+r14\*8\+0x1234\] +[ ]*[a-f0-9]+:[ ]*62 62 15 20 8d 72 7f[ ]*vpermb ymm30,ymm29,YMMWORD PTR \[rdx\+0xfe0\] +[ ]*[a-f0-9]+:[ ]*62 62 15 20 8d b2 00 10 00 00[ ]*vpermb ymm30,ymm29,YMMWORD PTR \[rdx\+0x1000\] +[ ]*[a-f0-9]+:[ ]*62 62 15 20 8d 72 80[ ]*vpermb ymm30,ymm29,YMMWORD PTR \[rdx-0x1000\] +[ ]*[a-f0-9]+:[ ]*62 62 15 20 8d b2 e0 ef ff ff[ ]*vpermb ymm30,ymm29,YMMWORD PTR \[rdx-0x1020\] +[ ]*[a-f0-9]+:[ ]*62 02 15 00 75 f4[ ]*vpermi2b xmm30,xmm29,xmm28 +[ ]*[a-f0-9]+:[ ]*62 02 15 07 75 f4[ ]*vpermi2b xmm30\{k7\},xmm29,xmm28 +[ ]*[a-f0-9]+:[ ]*62 02 15 87 75 f4[ ]*vpermi2b xmm30\{k7\}\{z\},xmm29,xmm28 +[ ]*[a-f0-9]+:[ ]*62 62 15 00 75 31[ ]*vpermi2b xmm30,xmm29,XMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+:[ ]*62 22 15 00 75 b4 f0 34 12 00 00[ ]*vpermi2b xmm30,xmm29,XMMWORD PTR \[rax\+r14\*8\+0x1234\] +[ ]*[a-f0-9]+:[ ]*62 62 15 00 75 72 7f[ ]*vpermi2b xmm30,xmm29,XMMWORD PTR \[rdx\+0x7f0\] +[ ]*[a-f0-9]+:[ ]*62 62 15 00 75 b2 00 08 00 00[ ]*vpermi2b xmm30,xmm29,XMMWORD PTR \[rdx\+0x800\] +[ ]*[a-f0-9]+:[ ]*62 62 15 00 75 72 80[ ]*vpermi2b xmm30,xmm29,XMMWORD PTR \[rdx-0x800\] +[ ]*[a-f0-9]+:[ ]*62 62 15 00 75 b2 f0 f7 ff ff[ ]*vpermi2b xmm30,xmm29,XMMWORD PTR \[rdx-0x810\] +[ ]*[a-f0-9]+:[ ]*62 02 15 20 75 f4[ ]*vpermi2b ymm30,ymm29,ymm28 +[ ]*[a-f0-9]+:[ ]*62 02 15 27 75 f4[ ]*vpermi2b ymm30\{k7\},ymm29,ymm28 +[ ]*[a-f0-9]+:[ ]*62 02 15 a7 75 f4[ ]*vpermi2b ymm30\{k7\}\{z\},ymm29,ymm28 +[ ]*[a-f0-9]+:[ ]*62 62 15 20 75 31[ ]*vpermi2b ymm30,ymm29,YMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+:[ ]*62 22 15 20 75 b4 f0 34 12 00 00[ ]*vpermi2b ymm30,ymm29,YMMWORD PTR \[rax\+r14\*8\+0x1234\] +[ ]*[a-f0-9]+:[ ]*62 62 15 20 75 72 7f[ ]*vpermi2b ymm30,ymm29,YMMWORD PTR \[rdx\+0xfe0\] +[ ]*[a-f0-9]+:[ ]*62 62 15 20 75 b2 00 10 00 00[ ]*vpermi2b ymm30,ymm29,YMMWORD PTR \[rdx\+0x1000\] +[ ]*[a-f0-9]+:[ ]*62 62 15 20 75 72 80[ ]*vpermi2b ymm30,ymm29,YMMWORD PTR \[rdx-0x1000\] +[ ]*[a-f0-9]+:[ ]*62 62 15 20 75 b2 e0 ef ff ff[ ]*vpermi2b ymm30,ymm29,YMMWORD PTR \[rdx-0x1020\] +[ ]*[a-f0-9]+:[ ]*62 02 15 00 7d f4[ ]*vpermt2b xmm30,xmm29,xmm28 +[ ]*[a-f0-9]+:[ ]*62 02 15 07 7d f4[ ]*vpermt2b xmm30\{k7\},xmm29,xmm28 +[ ]*[a-f0-9]+:[ ]*62 02 15 87 7d f4[ ]*vpermt2b xmm30\{k7\}\{z\},xmm29,xmm28 +[ ]*[a-f0-9]+:[ ]*62 62 15 00 7d 31[ ]*vpermt2b xmm30,xmm29,XMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+:[ ]*62 22 15 00 7d b4 f0 34 12 00 00[ ]*vpermt2b xmm30,xmm29,XMMWORD PTR \[rax\+r14\*8\+0x1234\] +[ ]*[a-f0-9]+:[ ]*62 62 15 00 7d 72 7f[ ]*vpermt2b xmm30,xmm29,XMMWORD PTR \[rdx\+0x7f0\] +[ ]*[a-f0-9]+:[ ]*62 62 15 00 7d b2 00 08 00 00[ ]*vpermt2b xmm30,xmm29,XMMWORD PTR \[rdx\+0x800\] +[ ]*[a-f0-9]+:[ ]*62 62 15 00 7d 72 80[ ]*vpermt2b xmm30,xmm29,XMMWORD PTR \[rdx-0x800\] +[ ]*[a-f0-9]+:[ ]*62 62 15 00 7d b2 f0 f7 ff ff[ ]*vpermt2b xmm30,xmm29,XMMWORD PTR \[rdx-0x810\] +[ ]*[a-f0-9]+:[ ]*62 02 15 20 7d f4[ ]*vpermt2b ymm30,ymm29,ymm28 +[ ]*[a-f0-9]+:[ ]*62 02 15 27 7d f4[ ]*vpermt2b ymm30\{k7\},ymm29,ymm28 +[ ]*[a-f0-9]+:[ ]*62 02 15 a7 7d f4[ ]*vpermt2b ymm30\{k7\}\{z\},ymm29,ymm28 +[ ]*[a-f0-9]+:[ ]*62 62 15 20 7d 31[ ]*vpermt2b ymm30,ymm29,YMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+:[ ]*62 22 15 20 7d b4 f0 34 12 00 00[ ]*vpermt2b ymm30,ymm29,YMMWORD PTR \[rax\+r14\*8\+0x1234\] +[ ]*[a-f0-9]+:[ ]*62 62 15 20 7d 72 7f[ ]*vpermt2b ymm30,ymm29,YMMWORD PTR \[rdx\+0xfe0\] +[ ]*[a-f0-9]+:[ ]*62 62 15 20 7d b2 00 10 00 00[ ]*vpermt2b ymm30,ymm29,YMMWORD PTR \[rdx\+0x1000\] +[ ]*[a-f0-9]+:[ ]*62 62 15 20 7d 72 80[ ]*vpermt2b ymm30,ymm29,YMMWORD PTR \[rdx-0x1000\] +[ ]*[a-f0-9]+:[ ]*62 62 15 20 7d b2 e0 ef ff ff[ ]*vpermt2b ymm30,ymm29,YMMWORD PTR \[rdx-0x1020\] +[ ]*[a-f0-9]+:[ ]*62 02 95 00 83 f4[ ]*vpmultishiftqb xmm30,xmm29,xmm28 +[ ]*[a-f0-9]+:[ ]*62 02 95 07 83 f4[ ]*vpmultishiftqb xmm30\{k7\},xmm29,xmm28 +[ ]*[a-f0-9]+:[ ]*62 02 95 87 83 f4[ ]*vpmultishiftqb xmm30\{k7\}\{z\},xmm29,xmm28 +[ ]*[a-f0-9]+:[ ]*62 62 95 00 83 31[ ]*vpmultishiftqb xmm30,xmm29,XMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+:[ ]*62 22 95 00 83 b4 f0 34 12 00 00[ ]*vpmultishiftqb xmm30,xmm29,XMMWORD PTR \[rax\+r14\*8\+0x1234\] +[ ]*[a-f0-9]+:[ ]*62 62 95 10 83 31[ ]*vpmultishiftqb xmm30,xmm29,QWORD PTR \[rcx\]\{1to2\} +[ ]*[a-f0-9]+:[ ]*62 62 95 00 83 72 7f[ ]*vpmultishiftqb xmm30,xmm29,XMMWORD PTR \[rdx\+0x7f0\] +[ ]*[a-f0-9]+:[ ]*62 62 95 00 83 b2 00 08 00 00[ ]*vpmultishiftqb xmm30,xmm29,XMMWORD PTR \[rdx\+0x800\] +[ ]*[a-f0-9]+:[ ]*62 62 95 00 83 72 80[ ]*vpmultishiftqb xmm30,xmm29,XMMWORD PTR \[rdx-0x800\] +[ ]*[a-f0-9]+:[ ]*62 62 95 00 83 b2 f0 f7 ff ff[ ]*vpmultishiftqb xmm30,xmm29,XMMWORD PTR \[rdx-0x810\] +[ ]*[a-f0-9]+:[ ]*62 62 95 10 83 72 7f[ ]*vpmultishiftqb xmm30,xmm29,QWORD PTR \[rdx\+0x3f8\]\{1to2\} +[ ]*[a-f0-9]+:[ ]*62 62 95 10 83 b2 00 04 00 00[ ]*vpmultishiftqb xmm30,xmm29,QWORD PTR \[rdx\+0x400\]\{1to2\} +[ ]*[a-f0-9]+:[ ]*62 62 95 10 83 72 80[ ]*vpmultishiftqb xmm30,xmm29,QWORD PTR \[rdx-0x400\]\{1to2\} +[ ]*[a-f0-9]+:[ ]*62 62 95 10 83 b2 f8 fb ff ff[ ]*vpmultishiftqb xmm30,xmm29,QWORD PTR \[rdx-0x408\]\{1to2\} +[ ]*[a-f0-9]+:[ ]*62 02 95 20 83 f4[ ]*vpmultishiftqb ymm30,ymm29,ymm28 +[ ]*[a-f0-9]+:[ ]*62 02 95 27 83 f4[ ]*vpmultishiftqb ymm30\{k7\},ymm29,ymm28 +[ ]*[a-f0-9]+:[ ]*62 02 95 a7 83 f4[ ]*vpmultishiftqb ymm30\{k7\}\{z\},ymm29,ymm28 +[ ]*[a-f0-9]+:[ ]*62 62 95 20 83 31[ ]*vpmultishiftqb ymm30,ymm29,YMMWORD PTR \[rcx\] +[ ]*[a-f0-9]+:[ ]*62 22 95 20 83 b4 f0 34 12 00 00[ ]*vpmultishiftqb ymm30,ymm29,YMMWORD PTR \[rax\+r14\*8\+0x1234\] +[ ]*[a-f0-9]+:[ ]*62 62 95 30 83 31[ ]*vpmultishiftqb ymm30,ymm29,QWORD PTR \[rcx\]\{1to4\} +[ ]*[a-f0-9]+:[ ]*62 62 95 20 83 72 7f[ ]*vpmultishiftqb ymm30,ymm29,YMMWORD PTR \[rdx\+0xfe0\] +[ ]*[a-f0-9]+:[ ]*62 62 95 20 83 b2 00 10 00 00[ ]*vpmultishiftqb ymm30,ymm29,YMMWORD PTR \[rdx\+0x1000\] +[ ]*[a-f0-9]+:[ ]*62 62 95 20 83 72 80[ ]*vpmultishiftqb ymm30,ymm29,YMMWORD PTR \[rdx-0x1000\] +[ ]*[a-f0-9]+:[ ]*62 62 95 20 83 b2 e0 ef ff ff[ ]*vpmultishiftqb ymm30,ymm29,YMMWORD PTR \[rdx-0x1020\] +[ ]*[a-f0-9]+:[ ]*62 62 95 30 83 72 7f[ ]*vpmultishiftqb ymm30,ymm29,QWORD PTR \[rdx\+0x3f8\]\{1to4\} +[ ]*[a-f0-9]+:[ ]*62 62 95 30 83 b2 00 04 00 00[ ]*vpmultishiftqb ymm30,ymm29,QWORD PTR \[rdx\+0x400\]\{1to4\} +[ ]*[a-f0-9]+:[ ]*62 62 95 30 83 72 80[ ]*vpmultishiftqb ymm30,ymm29,QWORD PTR \[rdx-0x400\]\{1to4\} +[ ]*[a-f0-9]+:[ ]*62 62 95 30 83 b2 f8 fb ff ff[ ]*vpmultishiftqb ymm30,ymm29,QWORD PTR \[rdx-0x408\]\{1to4\} +#pass diff --git a/gas/testsuite/gas/i386/x86-64-avx512vbmi_vl.d b/gas/testsuite/gas/i386/x86-64-avx512vbmi_vl.d new file mode 100644 index 00000000000..a02fd81cc09 --- /dev/null +++ b/gas/testsuite/gas/i386/x86-64-avx512vbmi_vl.d @@ -0,0 +1,176 @@ +#as: +#objdump: -dw +#name: x86_64 AVX512VBMI/VL insns +#source: x86-64-avx512vbmi_vl.s + +.*: +file format .* + + +Disassembly of section \.text: + +0+ <_start>: +[ ]*[a-f0-9]+:[ ]*62 02 15 00 8d f4[ ]*vpermb %xmm28,%xmm29,%xmm30 +[ ]*[a-f0-9]+:[ ]*62 02 15 07 8d f4[ ]*vpermb %xmm28,%xmm29,%xmm30\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 02 15 87 8d f4[ ]*vpermb %xmm28,%xmm29,%xmm30\{%k7\}\{z\} +[ ]*[a-f0-9]+:[ ]*62 62 15 00 8d 31[ ]*vpermb \(%rcx\),%xmm29,%xmm30 +[ ]*[a-f0-9]+:[ ]*62 22 15 00 8d b4 f0 23 01 00 00[ ]*vpermb 0x123\(%rax,%r14,8\),%xmm29,%xmm30 +[ ]*[a-f0-9]+:[ ]*62 62 15 00 8d 72 7f[ ]*vpermb 0x7f0\(%rdx\),%xmm29,%xmm30 +[ ]*[a-f0-9]+:[ ]*62 62 15 00 8d b2 00 08 00 00[ ]*vpermb 0x800\(%rdx\),%xmm29,%xmm30 +[ ]*[a-f0-9]+:[ ]*62 62 15 00 8d 72 80[ ]*vpermb -0x800\(%rdx\),%xmm29,%xmm30 +[ ]*[a-f0-9]+:[ ]*62 62 15 00 8d b2 f0 f7 ff ff[ ]*vpermb -0x810\(%rdx\),%xmm29,%xmm30 +[ ]*[a-f0-9]+:[ ]*62 02 15 20 8d f4[ ]*vpermb %ymm28,%ymm29,%ymm30 +[ ]*[a-f0-9]+:[ ]*62 02 15 27 8d f4[ ]*vpermb %ymm28,%ymm29,%ymm30\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 02 15 a7 8d f4[ ]*vpermb %ymm28,%ymm29,%ymm30\{%k7\}\{z\} +[ ]*[a-f0-9]+:[ ]*62 62 15 20 8d 31[ ]*vpermb \(%rcx\),%ymm29,%ymm30 +[ ]*[a-f0-9]+:[ ]*62 22 15 20 8d b4 f0 23 01 00 00[ ]*vpermb 0x123\(%rax,%r14,8\),%ymm29,%ymm30 +[ ]*[a-f0-9]+:[ ]*62 62 15 20 8d 72 7f[ ]*vpermb 0xfe0\(%rdx\),%ymm29,%ymm30 +[ ]*[a-f0-9]+:[ ]*62 62 15 20 8d b2 00 10 00 00[ ]*vpermb 0x1000\(%rdx\),%ymm29,%ymm30 +[ ]*[a-f0-9]+:[ ]*62 62 15 20 8d 72 80[ ]*vpermb -0x1000\(%rdx\),%ymm29,%ymm30 +[ ]*[a-f0-9]+:[ ]*62 62 15 20 8d b2 e0 ef ff ff[ ]*vpermb -0x1020\(%rdx\),%ymm29,%ymm30 +[ ]*[a-f0-9]+:[ ]*62 02 15 00 75 f4[ ]*vpermi2b %xmm28,%xmm29,%xmm30 +[ ]*[a-f0-9]+:[ ]*62 02 15 07 75 f4[ ]*vpermi2b %xmm28,%xmm29,%xmm30\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 02 15 87 75 f4[ ]*vpermi2b %xmm28,%xmm29,%xmm30\{%k7\}\{z\} +[ ]*[a-f0-9]+:[ ]*62 62 15 00 75 31[ ]*vpermi2b \(%rcx\),%xmm29,%xmm30 +[ ]*[a-f0-9]+:[ ]*62 22 15 00 75 b4 f0 23 01 00 00[ ]*vpermi2b 0x123\(%rax,%r14,8\),%xmm29,%xmm30 +[ ]*[a-f0-9]+:[ ]*62 62 15 00 75 72 7f[ ]*vpermi2b 0x7f0\(%rdx\),%xmm29,%xmm30 +[ ]*[a-f0-9]+:[ ]*62 62 15 00 75 b2 00 08 00 00[ ]*vpermi2b 0x800\(%rdx\),%xmm29,%xmm30 +[ ]*[a-f0-9]+:[ ]*62 62 15 00 75 72 80[ ]*vpermi2b -0x800\(%rdx\),%xmm29,%xmm30 +[ ]*[a-f0-9]+:[ ]*62 62 15 00 75 b2 f0 f7 ff ff[ ]*vpermi2b -0x810\(%rdx\),%xmm29,%xmm30 +[ ]*[a-f0-9]+:[ ]*62 02 15 20 75 f4[ ]*vpermi2b %ymm28,%ymm29,%ymm30 +[ ]*[a-f0-9]+:[ ]*62 02 15 27 75 f4[ ]*vpermi2b %ymm28,%ymm29,%ymm30\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 02 15 a7 75 f4[ ]*vpermi2b %ymm28,%ymm29,%ymm30\{%k7\}\{z\} +[ ]*[a-f0-9]+:[ ]*62 62 15 20 75 31[ ]*vpermi2b \(%rcx\),%ymm29,%ymm30 +[ ]*[a-f0-9]+:[ ]*62 22 15 20 75 b4 f0 23 01 00 00[ ]*vpermi2b 0x123\(%rax,%r14,8\),%ymm29,%ymm30 +[ ]*[a-f0-9]+:[ ]*62 62 15 20 75 72 7f[ ]*vpermi2b 0xfe0\(%rdx\),%ymm29,%ymm30 +[ ]*[a-f0-9]+:[ ]*62 62 15 20 75 b2 00 10 00 00[ ]*vpermi2b 0x1000\(%rdx\),%ymm29,%ymm30 +[ ]*[a-f0-9]+:[ ]*62 62 15 20 75 72 80[ ]*vpermi2b -0x1000\(%rdx\),%ymm29,%ymm30 +[ ]*[a-f0-9]+:[ ]*62 62 15 20 75 b2 e0 ef ff ff[ ]*vpermi2b -0x1020\(%rdx\),%ymm29,%ymm30 +[ ]*[a-f0-9]+:[ ]*62 02 15 00 7d f4[ ]*vpermt2b %xmm28,%xmm29,%xmm30 +[ ]*[a-f0-9]+:[ ]*62 02 15 07 7d f4[ ]*vpermt2b %xmm28,%xmm29,%xmm30\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 02 15 87 7d f4[ ]*vpermt2b %xmm28,%xmm29,%xmm30\{%k7\}\{z\} +[ ]*[a-f0-9]+:[ ]*62 62 15 00 7d 31[ ]*vpermt2b \(%rcx\),%xmm29,%xmm30 +[ ]*[a-f0-9]+:[ ]*62 22 15 00 7d b4 f0 23 01 00 00[ ]*vpermt2b 0x123\(%rax,%r14,8\),%xmm29,%xmm30 +[ ]*[a-f0-9]+:[ ]*62 62 15 00 7d 72 7f[ ]*vpermt2b 0x7f0\(%rdx\),%xmm29,%xmm30 +[ ]*[a-f0-9]+:[ ]*62 62 15 00 7d b2 00 08 00 00[ ]*vpermt2b 0x800\(%rdx\),%xmm29,%xmm30 +[ ]*[a-f0-9]+:[ ]*62 62 15 00 7d 72 80[ ]*vpermt2b -0x800\(%rdx\),%xmm29,%xmm30 +[ ]*[a-f0-9]+:[ ]*62 62 15 00 7d b2 f0 f7 ff ff[ ]*vpermt2b -0x810\(%rdx\),%xmm29,%xmm30 +[ ]*[a-f0-9]+:[ ]*62 02 15 20 7d f4[ ]*vpermt2b %ymm28,%ymm29,%ymm30 +[ ]*[a-f0-9]+:[ ]*62 02 15 27 7d f4[ ]*vpermt2b %ymm28,%ymm29,%ymm30\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 02 15 a7 7d f4[ ]*vpermt2b %ymm28,%ymm29,%ymm30\{%k7\}\{z\} +[ ]*[a-f0-9]+:[ ]*62 62 15 20 7d 31[ ]*vpermt2b \(%rcx\),%ymm29,%ymm30 +[ ]*[a-f0-9]+:[ ]*62 22 15 20 7d b4 f0 23 01 00 00[ ]*vpermt2b 0x123\(%rax,%r14,8\),%ymm29,%ymm30 +[ ]*[a-f0-9]+:[ ]*62 62 15 20 7d 72 7f[ ]*vpermt2b 0xfe0\(%rdx\),%ymm29,%ymm30 +[ ]*[a-f0-9]+:[ ]*62 62 15 20 7d b2 00 10 00 00[ ]*vpermt2b 0x1000\(%rdx\),%ymm29,%ymm30 +[ ]*[a-f0-9]+:[ ]*62 62 15 20 7d 72 80[ ]*vpermt2b -0x1000\(%rdx\),%ymm29,%ymm30 +[ ]*[a-f0-9]+:[ ]*62 62 15 20 7d b2 e0 ef ff ff[ ]*vpermt2b -0x1020\(%rdx\),%ymm29,%ymm30 +[ ]*[a-f0-9]+:[ ]*62 02 95 00 83 f4[ ]*vpmultishiftqb %xmm28,%xmm29,%xmm30 +[ ]*[a-f0-9]+:[ ]*62 02 95 07 83 f4[ ]*vpmultishiftqb %xmm28,%xmm29,%xmm30\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 02 95 87 83 f4[ ]*vpmultishiftqb %xmm28,%xmm29,%xmm30\{%k7\}\{z\} +[ ]*[a-f0-9]+:[ ]*62 62 95 00 83 31[ ]*vpmultishiftqb \(%rcx\),%xmm29,%xmm30 +[ ]*[a-f0-9]+:[ ]*62 22 95 00 83 b4 f0 23 01 00 00[ ]*vpmultishiftqb 0x123\(%rax,%r14,8\),%xmm29,%xmm30 +[ ]*[a-f0-9]+:[ ]*62 62 95 10 83 31[ ]*vpmultishiftqb \(%rcx\)\{1to2\},%xmm29,%xmm30 +[ ]*[a-f0-9]+:[ ]*62 62 95 00 83 72 7f[ ]*vpmultishiftqb 0x7f0\(%rdx\),%xmm29,%xmm30 +[ ]*[a-f0-9]+:[ ]*62 62 95 00 83 b2 00 08 00 00[ ]*vpmultishiftqb 0x800\(%rdx\),%xmm29,%xmm30 +[ ]*[a-f0-9]+:[ ]*62 62 95 00 83 72 80[ ]*vpmultishiftqb -0x800\(%rdx\),%xmm29,%xmm30 +[ ]*[a-f0-9]+:[ ]*62 62 95 00 83 b2 f0 f7 ff ff[ ]*vpmultishiftqb -0x810\(%rdx\),%xmm29,%xmm30 +[ ]*[a-f0-9]+:[ ]*62 62 95 10 83 72 7f[ ]*vpmultishiftqb 0x3f8\(%rdx\)\{1to2\},%xmm29,%xmm30 +[ ]*[a-f0-9]+:[ ]*62 62 95 10 83 b2 00 04 00 00[ ]*vpmultishiftqb 0x400\(%rdx\)\{1to2\},%xmm29,%xmm30 +[ ]*[a-f0-9]+:[ ]*62 62 95 10 83 72 80[ ]*vpmultishiftqb -0x400\(%rdx\)\{1to2\},%xmm29,%xmm30 +[ ]*[a-f0-9]+:[ ]*62 62 95 10 83 b2 f8 fb ff ff[ ]*vpmultishiftqb -0x408\(%rdx\)\{1to2\},%xmm29,%xmm30 +[ ]*[a-f0-9]+:[ ]*62 02 95 20 83 f4[ ]*vpmultishiftqb %ymm28,%ymm29,%ymm30 +[ ]*[a-f0-9]+:[ ]*62 02 95 27 83 f4[ ]*vpmultishiftqb %ymm28,%ymm29,%ymm30\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 02 95 a7 83 f4[ ]*vpmultishiftqb %ymm28,%ymm29,%ymm30\{%k7\}\{z\} +[ ]*[a-f0-9]+:[ ]*62 62 95 20 83 31[ ]*vpmultishiftqb \(%rcx\),%ymm29,%ymm30 +[ ]*[a-f0-9]+:[ ]*62 22 95 20 83 b4 f0 23 01 00 00[ ]*vpmultishiftqb 0x123\(%rax,%r14,8\),%ymm29,%ymm30 +[ ]*[a-f0-9]+:[ ]*62 62 95 30 83 31[ ]*vpmultishiftqb \(%rcx\)\{1to4\},%ymm29,%ymm30 +[ ]*[a-f0-9]+:[ ]*62 62 95 20 83 72 7f[ ]*vpmultishiftqb 0xfe0\(%rdx\),%ymm29,%ymm30 +[ ]*[a-f0-9]+:[ ]*62 62 95 20 83 b2 00 10 00 00[ ]*vpmultishiftqb 0x1000\(%rdx\),%ymm29,%ymm30 +[ ]*[a-f0-9]+:[ ]*62 62 95 20 83 72 80[ ]*vpmultishiftqb -0x1000\(%rdx\),%ymm29,%ymm30 +[ ]*[a-f0-9]+:[ ]*62 62 95 20 83 b2 e0 ef ff ff[ ]*vpmultishiftqb -0x1020\(%rdx\),%ymm29,%ymm30 +[ ]*[a-f0-9]+:[ ]*62 62 95 30 83 72 7f[ ]*vpmultishiftqb 0x3f8\(%rdx\)\{1to4\},%ymm29,%ymm30 +[ ]*[a-f0-9]+:[ ]*62 62 95 30 83 b2 00 04 00 00[ ]*vpmultishiftqb 0x400\(%rdx\)\{1to4\},%ymm29,%ymm30 +[ ]*[a-f0-9]+:[ ]*62 62 95 30 83 72 80[ ]*vpmultishiftqb -0x400\(%rdx\)\{1to4\},%ymm29,%ymm30 +[ ]*[a-f0-9]+:[ ]*62 62 95 30 83 b2 f8 fb ff ff[ ]*vpmultishiftqb -0x408\(%rdx\)\{1to4\},%ymm29,%ymm30 +[ ]*[a-f0-9]+:[ ]*62 02 15 00 8d f4[ ]*vpermb %xmm28,%xmm29,%xmm30 +[ ]*[a-f0-9]+:[ ]*62 02 15 07 8d f4[ ]*vpermb %xmm28,%xmm29,%xmm30\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 02 15 87 8d f4[ ]*vpermb %xmm28,%xmm29,%xmm30\{%k7\}\{z\} +[ ]*[a-f0-9]+:[ ]*62 62 15 00 8d 31[ ]*vpermb \(%rcx\),%xmm29,%xmm30 +[ ]*[a-f0-9]+:[ ]*62 22 15 00 8d b4 f0 34 12 00 00[ ]*vpermb 0x1234\(%rax,%r14,8\),%xmm29,%xmm30 +[ ]*[a-f0-9]+:[ ]*62 62 15 00 8d 72 7f[ ]*vpermb 0x7f0\(%rdx\),%xmm29,%xmm30 +[ ]*[a-f0-9]+:[ ]*62 62 15 00 8d b2 00 08 00 00[ ]*vpermb 0x800\(%rdx\),%xmm29,%xmm30 +[ ]*[a-f0-9]+:[ ]*62 62 15 00 8d 72 80[ ]*vpermb -0x800\(%rdx\),%xmm29,%xmm30 +[ ]*[a-f0-9]+:[ ]*62 62 15 00 8d b2 f0 f7 ff ff[ ]*vpermb -0x810\(%rdx\),%xmm29,%xmm30 +[ ]*[a-f0-9]+:[ ]*62 02 15 20 8d f4[ ]*vpermb %ymm28,%ymm29,%ymm30 +[ ]*[a-f0-9]+:[ ]*62 02 15 27 8d f4[ ]*vpermb %ymm28,%ymm29,%ymm30\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 02 15 a7 8d f4[ ]*vpermb %ymm28,%ymm29,%ymm30\{%k7\}\{z\} +[ ]*[a-f0-9]+:[ ]*62 62 15 20 8d 31[ ]*vpermb \(%rcx\),%ymm29,%ymm30 +[ ]*[a-f0-9]+:[ ]*62 22 15 20 8d b4 f0 34 12 00 00[ ]*vpermb 0x1234\(%rax,%r14,8\),%ymm29,%ymm30 +[ ]*[a-f0-9]+:[ ]*62 62 15 20 8d 72 7f[ ]*vpermb 0xfe0\(%rdx\),%ymm29,%ymm30 +[ ]*[a-f0-9]+:[ ]*62 62 15 20 8d b2 00 10 00 00[ ]*vpermb 0x1000\(%rdx\),%ymm29,%ymm30 +[ ]*[a-f0-9]+:[ ]*62 62 15 20 8d 72 80[ ]*vpermb -0x1000\(%rdx\),%ymm29,%ymm30 +[ ]*[a-f0-9]+:[ ]*62 62 15 20 8d b2 e0 ef ff ff[ ]*vpermb -0x1020\(%rdx\),%ymm29,%ymm30 +[ ]*[a-f0-9]+:[ ]*62 02 15 00 75 f4[ ]*vpermi2b %xmm28,%xmm29,%xmm30 +[ ]*[a-f0-9]+:[ ]*62 02 15 07 75 f4[ ]*vpermi2b %xmm28,%xmm29,%xmm30\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 02 15 87 75 f4[ ]*vpermi2b %xmm28,%xmm29,%xmm30\{%k7\}\{z\} +[ ]*[a-f0-9]+:[ ]*62 62 15 00 75 31[ ]*vpermi2b \(%rcx\),%xmm29,%xmm30 +[ ]*[a-f0-9]+:[ ]*62 22 15 00 75 b4 f0 34 12 00 00[ ]*vpermi2b 0x1234\(%rax,%r14,8\),%xmm29,%xmm30 +[ ]*[a-f0-9]+:[ ]*62 62 15 00 75 72 7f[ ]*vpermi2b 0x7f0\(%rdx\),%xmm29,%xmm30 +[ ]*[a-f0-9]+:[ ]*62 62 15 00 75 b2 00 08 00 00[ ]*vpermi2b 0x800\(%rdx\),%xmm29,%xmm30 +[ ]*[a-f0-9]+:[ ]*62 62 15 00 75 72 80[ ]*vpermi2b -0x800\(%rdx\),%xmm29,%xmm30 +[ ]*[a-f0-9]+:[ ]*62 62 15 00 75 b2 f0 f7 ff ff[ ]*vpermi2b -0x810\(%rdx\),%xmm29,%xmm30 +[ ]*[a-f0-9]+:[ ]*62 02 15 20 75 f4[ ]*vpermi2b %ymm28,%ymm29,%ymm30 +[ ]*[a-f0-9]+:[ ]*62 02 15 27 75 f4[ ]*vpermi2b %ymm28,%ymm29,%ymm30\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 02 15 a7 75 f4[ ]*vpermi2b %ymm28,%ymm29,%ymm30\{%k7\}\{z\} +[ ]*[a-f0-9]+:[ ]*62 62 15 20 75 31[ ]*vpermi2b \(%rcx\),%ymm29,%ymm30 +[ ]*[a-f0-9]+:[ ]*62 22 15 20 75 b4 f0 34 12 00 00[ ]*vpermi2b 0x1234\(%rax,%r14,8\),%ymm29,%ymm30 +[ ]*[a-f0-9]+:[ ]*62 62 15 20 75 72 7f[ ]*vpermi2b 0xfe0\(%rdx\),%ymm29,%ymm30 +[ ]*[a-f0-9]+:[ ]*62 62 15 20 75 b2 00 10 00 00[ ]*vpermi2b 0x1000\(%rdx\),%ymm29,%ymm30 +[ ]*[a-f0-9]+:[ ]*62 62 15 20 75 72 80[ ]*vpermi2b -0x1000\(%rdx\),%ymm29,%ymm30 +[ ]*[a-f0-9]+:[ ]*62 62 15 20 75 b2 e0 ef ff ff[ ]*vpermi2b -0x1020\(%rdx\),%ymm29,%ymm30 +[ ]*[a-f0-9]+:[ ]*62 02 15 00 7d f4[ ]*vpermt2b %xmm28,%xmm29,%xmm30 +[ ]*[a-f0-9]+:[ ]*62 02 15 07 7d f4[ ]*vpermt2b %xmm28,%xmm29,%xmm30\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 02 15 87 7d f4[ ]*vpermt2b %xmm28,%xmm29,%xmm30\{%k7\}\{z\} +[ ]*[a-f0-9]+:[ ]*62 62 15 00 7d 31[ ]*vpermt2b \(%rcx\),%xmm29,%xmm30 +[ ]*[a-f0-9]+:[ ]*62 22 15 00 7d b4 f0 34 12 00 00[ ]*vpermt2b 0x1234\(%rax,%r14,8\),%xmm29,%xmm30 +[ ]*[a-f0-9]+:[ ]*62 62 15 00 7d 72 7f[ ]*vpermt2b 0x7f0\(%rdx\),%xmm29,%xmm30 +[ ]*[a-f0-9]+:[ ]*62 62 15 00 7d b2 00 08 00 00[ ]*vpermt2b 0x800\(%rdx\),%xmm29,%xmm30 +[ ]*[a-f0-9]+:[ ]*62 62 15 00 7d 72 80[ ]*vpermt2b -0x800\(%rdx\),%xmm29,%xmm30 +[ ]*[a-f0-9]+:[ ]*62 62 15 00 7d b2 f0 f7 ff ff[ ]*vpermt2b -0x810\(%rdx\),%xmm29,%xmm30 +[ ]*[a-f0-9]+:[ ]*62 02 15 20 7d f4[ ]*vpermt2b %ymm28,%ymm29,%ymm30 +[ ]*[a-f0-9]+:[ ]*62 02 15 27 7d f4[ ]*vpermt2b %ymm28,%ymm29,%ymm30\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 02 15 a7 7d f4[ ]*vpermt2b %ymm28,%ymm29,%ymm30\{%k7\}\{z\} +[ ]*[a-f0-9]+:[ ]*62 62 15 20 7d 31[ ]*vpermt2b \(%rcx\),%ymm29,%ymm30 +[ ]*[a-f0-9]+:[ ]*62 22 15 20 7d b4 f0 34 12 00 00[ ]*vpermt2b 0x1234\(%rax,%r14,8\),%ymm29,%ymm30 +[ ]*[a-f0-9]+:[ ]*62 62 15 20 7d 72 7f[ ]*vpermt2b 0xfe0\(%rdx\),%ymm29,%ymm30 +[ ]*[a-f0-9]+:[ ]*62 62 15 20 7d b2 00 10 00 00[ ]*vpermt2b 0x1000\(%rdx\),%ymm29,%ymm30 +[ ]*[a-f0-9]+:[ ]*62 62 15 20 7d 72 80[ ]*vpermt2b -0x1000\(%rdx\),%ymm29,%ymm30 +[ ]*[a-f0-9]+:[ ]*62 62 15 20 7d b2 e0 ef ff ff[ ]*vpermt2b -0x1020\(%rdx\),%ymm29,%ymm30 +[ ]*[a-f0-9]+:[ ]*62 02 95 00 83 f4[ ]*vpmultishiftqb %xmm28,%xmm29,%xmm30 +[ ]*[a-f0-9]+:[ ]*62 02 95 07 83 f4[ ]*vpmultishiftqb %xmm28,%xmm29,%xmm30\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 02 95 87 83 f4[ ]*vpmultishiftqb %xmm28,%xmm29,%xmm30\{%k7\}\{z\} +[ ]*[a-f0-9]+:[ ]*62 62 95 00 83 31[ ]*vpmultishiftqb \(%rcx\),%xmm29,%xmm30 +[ ]*[a-f0-9]+:[ ]*62 22 95 00 83 b4 f0 34 12 00 00[ ]*vpmultishiftqb 0x1234\(%rax,%r14,8\),%xmm29,%xmm30 +[ ]*[a-f0-9]+:[ ]*62 62 95 10 83 31[ ]*vpmultishiftqb \(%rcx\)\{1to2\},%xmm29,%xmm30 +[ ]*[a-f0-9]+:[ ]*62 62 95 00 83 72 7f[ ]*vpmultishiftqb 0x7f0\(%rdx\),%xmm29,%xmm30 +[ ]*[a-f0-9]+:[ ]*62 62 95 00 83 b2 00 08 00 00[ ]*vpmultishiftqb 0x800\(%rdx\),%xmm29,%xmm30 +[ ]*[a-f0-9]+:[ ]*62 62 95 00 83 72 80[ ]*vpmultishiftqb -0x800\(%rdx\),%xmm29,%xmm30 +[ ]*[a-f0-9]+:[ ]*62 62 95 00 83 b2 f0 f7 ff ff[ ]*vpmultishiftqb -0x810\(%rdx\),%xmm29,%xmm30 +[ ]*[a-f0-9]+:[ ]*62 62 95 10 83 72 7f[ ]*vpmultishiftqb 0x3f8\(%rdx\)\{1to2\},%xmm29,%xmm30 +[ ]*[a-f0-9]+:[ ]*62 62 95 10 83 b2 00 04 00 00[ ]*vpmultishiftqb 0x400\(%rdx\)\{1to2\},%xmm29,%xmm30 +[ ]*[a-f0-9]+:[ ]*62 62 95 10 83 72 80[ ]*vpmultishiftqb -0x400\(%rdx\)\{1to2\},%xmm29,%xmm30 +[ ]*[a-f0-9]+:[ ]*62 62 95 10 83 b2 f8 fb ff ff[ ]*vpmultishiftqb -0x408\(%rdx\)\{1to2\},%xmm29,%xmm30 +[ ]*[a-f0-9]+:[ ]*62 02 95 20 83 f4[ ]*vpmultishiftqb %ymm28,%ymm29,%ymm30 +[ ]*[a-f0-9]+:[ ]*62 02 95 27 83 f4[ ]*vpmultishiftqb %ymm28,%ymm29,%ymm30\{%k7\} +[ ]*[a-f0-9]+:[ ]*62 02 95 a7 83 f4[ ]*vpmultishiftqb %ymm28,%ymm29,%ymm30\{%k7\}\{z\} +[ ]*[a-f0-9]+:[ ]*62 62 95 20 83 31[ ]*vpmultishiftqb \(%rcx\),%ymm29,%ymm30 +[ ]*[a-f0-9]+:[ ]*62 22 95 20 83 b4 f0 34 12 00 00[ ]*vpmultishiftqb 0x1234\(%rax,%r14,8\),%ymm29,%ymm30 +[ ]*[a-f0-9]+:[ ]*62 62 95 30 83 31[ ]*vpmultishiftqb \(%rcx\)\{1to4\},%ymm29,%ymm30 +[ ]*[a-f0-9]+:[ ]*62 62 95 20 83 72 7f[ ]*vpmultishiftqb 0xfe0\(%rdx\),%ymm29,%ymm30 +[ ]*[a-f0-9]+:[ ]*62 62 95 20 83 b2 00 10 00 00[ ]*vpmultishiftqb 0x1000\(%rdx\),%ymm29,%ymm30 +[ ]*[a-f0-9]+:[ ]*62 62 95 20 83 72 80[ ]*vpmultishiftqb -0x1000\(%rdx\),%ymm29,%ymm30 +[ ]*[a-f0-9]+:[ ]*62 62 95 20 83 b2 e0 ef ff ff[ ]*vpmultishiftqb -0x1020\(%rdx\),%ymm29,%ymm30 +[ ]*[a-f0-9]+:[ ]*62 62 95 30 83 72 7f[ ]*vpmultishiftqb 0x3f8\(%rdx\)\{1to4\},%ymm29,%ymm30 +[ ]*[a-f0-9]+:[ ]*62 62 95 30 83 b2 00 04 00 00[ ]*vpmultishiftqb 0x400\(%rdx\)\{1to4\},%ymm29,%ymm30 +[ ]*[a-f0-9]+:[ ]*62 62 95 30 83 72 80[ ]*vpmultishiftqb -0x400\(%rdx\)\{1to4\},%ymm29,%ymm30 +[ ]*[a-f0-9]+:[ ]*62 62 95 30 83 b2 f8 fb ff ff[ ]*vpmultishiftqb -0x408\(%rdx\)\{1to4\},%ymm29,%ymm30 +#pass diff --git a/gas/testsuite/gas/i386/x86-64-avx512vbmi_vl.s b/gas/testsuite/gas/i386/x86-64-avx512vbmi_vl.s new file mode 100644 index 00000000000..fa451dffa66 --- /dev/null +++ b/gas/testsuite/gas/i386/x86-64-avx512vbmi_vl.s @@ -0,0 +1,171 @@ +# Check 64bit AVX512{VBMI,VL} instructions + + .allow_index_reg + .text +_start: + vpermb %xmm28, %xmm29, %xmm30 # AVX512{VBMI,VL} + vpermb %xmm28, %xmm29, %xmm30{%k7} # AVX512{VBMI,VL} + vpermb %xmm28, %xmm29, %xmm30{%k7}{z} # AVX512{VBMI,VL} + vpermb (%rcx), %xmm29, %xmm30 # AVX512{VBMI,VL} + vpermb 0x123(%rax,%r14,8), %xmm29, %xmm30 # AVX512{VBMI,VL} + vpermb 2032(%rdx), %xmm29, %xmm30 # AVX512{VBMI,VL} Disp8 + vpermb 2048(%rdx), %xmm29, %xmm30 # AVX512{VBMI,VL} + vpermb -2048(%rdx), %xmm29, %xmm30 # AVX512{VBMI,VL} Disp8 + vpermb -2064(%rdx), %xmm29, %xmm30 # AVX512{VBMI,VL} + vpermb %ymm28, %ymm29, %ymm30 # AVX512{VBMI,VL} + vpermb %ymm28, %ymm29, %ymm30{%k7} # AVX512{VBMI,VL} + vpermb %ymm28, %ymm29, %ymm30{%k7}{z} # AVX512{VBMI,VL} + vpermb (%rcx), %ymm29, %ymm30 # AVX512{VBMI,VL} + vpermb 0x123(%rax,%r14,8), %ymm29, %ymm30 # AVX512{VBMI,VL} + vpermb 4064(%rdx), %ymm29, %ymm30 # AVX512{VBMI,VL} Disp8 + vpermb 4096(%rdx), %ymm29, %ymm30 # AVX512{VBMI,VL} + vpermb -4096(%rdx), %ymm29, %ymm30 # AVX512{VBMI,VL} Disp8 + vpermb -4128(%rdx), %ymm29, %ymm30 # AVX512{VBMI,VL} + vpermi2b %xmm28, %xmm29, %xmm30 # AVX512{VBMI,VL} + vpermi2b %xmm28, %xmm29, %xmm30{%k7} # AVX512{VBMI,VL} + vpermi2b %xmm28, %xmm29, %xmm30{%k7}{z} # AVX512{VBMI,VL} + vpermi2b (%rcx), %xmm29, %xmm30 # AVX512{VBMI,VL} + vpermi2b 0x123(%rax,%r14,8), %xmm29, %xmm30 # AVX512{VBMI,VL} + vpermi2b 2032(%rdx), %xmm29, %xmm30 # AVX512{VBMI,VL} Disp8 + vpermi2b 2048(%rdx), %xmm29, %xmm30 # AVX512{VBMI,VL} + vpermi2b -2048(%rdx), %xmm29, %xmm30 # AVX512{VBMI,VL} Disp8 + vpermi2b -2064(%rdx), %xmm29, %xmm30 # AVX512{VBMI,VL} + vpermi2b %ymm28, %ymm29, %ymm30 # AVX512{VBMI,VL} + vpermi2b %ymm28, %ymm29, %ymm30{%k7} # AVX512{VBMI,VL} + vpermi2b %ymm28, %ymm29, %ymm30{%k7}{z} # AVX512{VBMI,VL} + vpermi2b (%rcx), %ymm29, %ymm30 # AVX512{VBMI,VL} + vpermi2b 0x123(%rax,%r14,8), %ymm29, %ymm30 # AVX512{VBMI,VL} + vpermi2b 4064(%rdx), %ymm29, %ymm30 # AVX512{VBMI,VL} Disp8 + vpermi2b 4096(%rdx), %ymm29, %ymm30 # AVX512{VBMI,VL} + vpermi2b -4096(%rdx), %ymm29, %ymm30 # AVX512{VBMI,VL} Disp8 + vpermi2b -4128(%rdx), %ymm29, %ymm30 # AVX512{VBMI,VL} + vpermt2b %xmm28, %xmm29, %xmm30 # AVX512{VBMI,VL} + vpermt2b %xmm28, %xmm29, %xmm30{%k7} # AVX512{VBMI,VL} + vpermt2b %xmm28, %xmm29, %xmm30{%k7}{z} # AVX512{VBMI,VL} + vpermt2b (%rcx), %xmm29, %xmm30 # AVX512{VBMI,VL} + vpermt2b 0x123(%rax,%r14,8), %xmm29, %xmm30 # AVX512{VBMI,VL} + vpermt2b 2032(%rdx), %xmm29, %xmm30 # AVX512{VBMI,VL} Disp8 + vpermt2b 2048(%rdx), %xmm29, %xmm30 # AVX512{VBMI,VL} + vpermt2b -2048(%rdx), %xmm29, %xmm30 # AVX512{VBMI,VL} Disp8 + vpermt2b -2064(%rdx), %xmm29, %xmm30 # AVX512{VBMI,VL} + vpermt2b %ymm28, %ymm29, %ymm30 # AVX512{VBMI,VL} + vpermt2b %ymm28, %ymm29, %ymm30{%k7} # AVX512{VBMI,VL} + vpermt2b %ymm28, %ymm29, %ymm30{%k7}{z} # AVX512{VBMI,VL} + vpermt2b (%rcx), %ymm29, %ymm30 # AVX512{VBMI,VL} + vpermt2b 0x123(%rax,%r14,8), %ymm29, %ymm30 # AVX512{VBMI,VL} + vpermt2b 4064(%rdx), %ymm29, %ymm30 # AVX512{VBMI,VL} Disp8 + vpermt2b 4096(%rdx), %ymm29, %ymm30 # AVX512{VBMI,VL} + vpermt2b -4096(%rdx), %ymm29, %ymm30 # AVX512{VBMI,VL} Disp8 + vpermt2b -4128(%rdx), %ymm29, %ymm30 # AVX512{VBMI,VL} + vpmultishiftqb %xmm28, %xmm29, %xmm30 # AVX512{VBMI,VL} + vpmultishiftqb %xmm28, %xmm29, %xmm30{%k7} # AVX512{VBMI,VL} + vpmultishiftqb %xmm28, %xmm29, %xmm30{%k7}{z} # AVX512{VBMI,VL} + vpmultishiftqb (%rcx), %xmm29, %xmm30 # AVX512{VBMI,VL} + vpmultishiftqb 0x123(%rax,%r14,8), %xmm29, %xmm30 # AVX512{VBMI,VL} + vpmultishiftqb (%rcx){1to2}, %xmm29, %xmm30 # AVX512{VBMI,VL} + vpmultishiftqb 2032(%rdx), %xmm29, %xmm30 # AVX512{VBMI,VL} Disp8 + vpmultishiftqb 2048(%rdx), %xmm29, %xmm30 # AVX512{VBMI,VL} + vpmultishiftqb -2048(%rdx), %xmm29, %xmm30 # AVX512{VBMI,VL} Disp8 + vpmultishiftqb -2064(%rdx), %xmm29, %xmm30 # AVX512{VBMI,VL} + vpmultishiftqb 1016(%rdx){1to2}, %xmm29, %xmm30 # AVX512{VBMI,VL} Disp8 + vpmultishiftqb 1024(%rdx){1to2}, %xmm29, %xmm30 # AVX512{VBMI,VL} + vpmultishiftqb -1024(%rdx){1to2}, %xmm29, %xmm30 # AVX512{VBMI,VL} Disp8 + vpmultishiftqb -1032(%rdx){1to2}, %xmm29, %xmm30 # AVX512{VBMI,VL} + vpmultishiftqb %ymm28, %ymm29, %ymm30 # AVX512{VBMI,VL} + vpmultishiftqb %ymm28, %ymm29, %ymm30{%k7} # AVX512{VBMI,VL} + vpmultishiftqb %ymm28, %ymm29, %ymm30{%k7}{z} # AVX512{VBMI,VL} + vpmultishiftqb (%rcx), %ymm29, %ymm30 # AVX512{VBMI,VL} + vpmultishiftqb 0x123(%rax,%r14,8), %ymm29, %ymm30 # AVX512{VBMI,VL} + vpmultishiftqb (%rcx){1to4}, %ymm29, %ymm30 # AVX512{VBMI,VL} + vpmultishiftqb 4064(%rdx), %ymm29, %ymm30 # AVX512{VBMI,VL} Disp8 + vpmultishiftqb 4096(%rdx), %ymm29, %ymm30 # AVX512{VBMI,VL} + vpmultishiftqb -4096(%rdx), %ymm29, %ymm30 # AVX512{VBMI,VL} Disp8 + vpmultishiftqb -4128(%rdx), %ymm29, %ymm30 # AVX512{VBMI,VL} + vpmultishiftqb 1016(%rdx){1to4}, %ymm29, %ymm30 # AVX512{VBMI,VL} Disp8 + vpmultishiftqb 1024(%rdx){1to4}, %ymm29, %ymm30 # AVX512{VBMI,VL} + vpmultishiftqb -1024(%rdx){1to4}, %ymm29, %ymm30 # AVX512{VBMI,VL} Disp8 + vpmultishiftqb -1032(%rdx){1to4}, %ymm29, %ymm30 # AVX512{VBMI,VL} + + .intel_syntax noprefix + vpermb xmm30, xmm29, xmm28 # AVX512{VBMI,VL} + vpermb xmm30{k7}, xmm29, xmm28 # AVX512{VBMI,VL} + vpermb xmm30{k7}{z}, xmm29, xmm28 # AVX512{VBMI,VL} + vpermb xmm30, xmm29, XMMWORD PTR [rcx] # AVX512{VBMI,VL} + vpermb xmm30, xmm29, XMMWORD PTR [rax+r14*8+0x1234] # AVX512{VBMI,VL} + vpermb xmm30, xmm29, XMMWORD PTR [rdx+2032] # AVX512{VBMI,VL} Disp8 + vpermb xmm30, xmm29, XMMWORD PTR [rdx+2048] # AVX512{VBMI,VL} + vpermb xmm30, xmm29, XMMWORD PTR [rdx-2048] # AVX512{VBMI,VL} Disp8 + vpermb xmm30, xmm29, XMMWORD PTR [rdx-2064] # AVX512{VBMI,VL} + vpermb ymm30, ymm29, ymm28 # AVX512{VBMI,VL} + vpermb ymm30{k7}, ymm29, ymm28 # AVX512{VBMI,VL} + vpermb ymm30{k7}{z}, ymm29, ymm28 # AVX512{VBMI,VL} + vpermb ymm30, ymm29, YMMWORD PTR [rcx] # AVX512{VBMI,VL} + vpermb ymm30, ymm29, YMMWORD PTR [rax+r14*8+0x1234] # AVX512{VBMI,VL} + vpermb ymm30, ymm29, YMMWORD PTR [rdx+4064] # AVX512{VBMI,VL} Disp8 + vpermb ymm30, ymm29, YMMWORD PTR [rdx+4096] # AVX512{VBMI,VL} + vpermb ymm30, ymm29, YMMWORD PTR [rdx-4096] # AVX512{VBMI,VL} Disp8 + vpermb ymm30, ymm29, YMMWORD PTR [rdx-4128] # AVX512{VBMI,VL} + vpermi2b xmm30, xmm29, xmm28 # AVX512{VBMI,VL} + vpermi2b xmm30{k7}, xmm29, xmm28 # AVX512{VBMI,VL} + vpermi2b xmm30{k7}{z}, xmm29, xmm28 # AVX512{VBMI,VL} + vpermi2b xmm30, xmm29, XMMWORD PTR [rcx] # AVX512{VBMI,VL} + vpermi2b xmm30, xmm29, XMMWORD PTR [rax+r14*8+0x1234] # AVX512{VBMI,VL} + vpermi2b xmm30, xmm29, XMMWORD PTR [rdx+2032] # AVX512{VBMI,VL} Disp8 + vpermi2b xmm30, xmm29, XMMWORD PTR [rdx+2048] # AVX512{VBMI,VL} + vpermi2b xmm30, xmm29, XMMWORD PTR [rdx-2048] # AVX512{VBMI,VL} Disp8 + vpermi2b xmm30, xmm29, XMMWORD PTR [rdx-2064] # AVX512{VBMI,VL} + vpermi2b ymm30, ymm29, ymm28 # AVX512{VBMI,VL} + vpermi2b ymm30{k7}, ymm29, ymm28 # AVX512{VBMI,VL} + vpermi2b ymm30{k7}{z}, ymm29, ymm28 # AVX512{VBMI,VL} + vpermi2b ymm30, ymm29, YMMWORD PTR [rcx] # AVX512{VBMI,VL} + vpermi2b ymm30, ymm29, YMMWORD PTR [rax+r14*8+0x1234] # AVX512{VBMI,VL} + vpermi2b ymm30, ymm29, YMMWORD PTR [rdx+4064] # AVX512{VBMI,VL} Disp8 + vpermi2b ymm30, ymm29, YMMWORD PTR [rdx+4096] # AVX512{VBMI,VL} + vpermi2b ymm30, ymm29, YMMWORD PTR [rdx-4096] # AVX512{VBMI,VL} Disp8 + vpermi2b ymm30, ymm29, YMMWORD PTR [rdx-4128] # AVX512{VBMI,VL} + vpermt2b xmm30, xmm29, xmm28 # AVX512{VBMI,VL} + vpermt2b xmm30{k7}, xmm29, xmm28 # AVX512{VBMI,VL} + vpermt2b xmm30{k7}{z}, xmm29, xmm28 # AVX512{VBMI,VL} + vpermt2b xmm30, xmm29, XMMWORD PTR [rcx] # AVX512{VBMI,VL} + vpermt2b xmm30, xmm29, XMMWORD PTR [rax+r14*8+0x1234] # AVX512{VBMI,VL} + vpermt2b xmm30, xmm29, XMMWORD PTR [rdx+2032] # AVX512{VBMI,VL} Disp8 + vpermt2b xmm30, xmm29, XMMWORD PTR [rdx+2048] # AVX512{VBMI,VL} + vpermt2b xmm30, xmm29, XMMWORD PTR [rdx-2048] # AVX512{VBMI,VL} Disp8 + vpermt2b xmm30, xmm29, XMMWORD PTR [rdx-2064] # AVX512{VBMI,VL} + vpermt2b ymm30, ymm29, ymm28 # AVX512{VBMI,VL} + vpermt2b ymm30{k7}, ymm29, ymm28 # AVX512{VBMI,VL} + vpermt2b ymm30{k7}{z}, ymm29, ymm28 # AVX512{VBMI,VL} + vpermt2b ymm30, ymm29, YMMWORD PTR [rcx] # AVX512{VBMI,VL} + vpermt2b ymm30, ymm29, YMMWORD PTR [rax+r14*8+0x1234] # AVX512{VBMI,VL} + vpermt2b ymm30, ymm29, YMMWORD PTR [rdx+4064] # AVX512{VBMI,VL} Disp8 + vpermt2b ymm30, ymm29, YMMWORD PTR [rdx+4096] # AVX512{VBMI,VL} + vpermt2b ymm30, ymm29, YMMWORD PTR [rdx-4096] # AVX512{VBMI,VL} Disp8 + vpermt2b ymm30, ymm29, YMMWORD PTR [rdx-4128] # AVX512{VBMI,VL} + vpmultishiftqb xmm30, xmm29, xmm28 # AVX512{VBMI,VL} + vpmultishiftqb xmm30{k7}, xmm29, xmm28 # AVX512{VBMI,VL} + vpmultishiftqb xmm30{k7}{z}, xmm29, xmm28 # AVX512{VBMI,VL} + vpmultishiftqb xmm30, xmm29, XMMWORD PTR [rcx] # AVX512{VBMI,VL} + vpmultishiftqb xmm30, xmm29, XMMWORD PTR [rax+r14*8+0x1234] # AVX512{VBMI,VL} + vpmultishiftqb xmm30, xmm29, [rcx]{1to2} # AVX512{VBMI,VL} + vpmultishiftqb xmm30, xmm29, XMMWORD PTR [rdx+2032] # AVX512{VBMI,VL} Disp8 + vpmultishiftqb xmm30, xmm29, XMMWORD PTR [rdx+2048] # AVX512{VBMI,VL} + vpmultishiftqb xmm30, xmm29, XMMWORD PTR [rdx-2048] # AVX512{VBMI,VL} Disp8 + vpmultishiftqb xmm30, xmm29, XMMWORD PTR [rdx-2064] # AVX512{VBMI,VL} + vpmultishiftqb xmm30, xmm29, [rdx+1016]{1to2} # AVX512{VBMI,VL} Disp8 + vpmultishiftqb xmm30, xmm29, [rdx+1024]{1to2} # AVX512{VBMI,VL} + vpmultishiftqb xmm30, xmm29, [rdx-1024]{1to2} # AVX512{VBMI,VL} Disp8 + vpmultishiftqb xmm30, xmm29, [rdx-1032]{1to2} # AVX512{VBMI,VL} + vpmultishiftqb ymm30, ymm29, ymm28 # AVX512{VBMI,VL} + vpmultishiftqb ymm30{k7}, ymm29, ymm28 # AVX512{VBMI,VL} + vpmultishiftqb ymm30{k7}{z}, ymm29, ymm28 # AVX512{VBMI,VL} + vpmultishiftqb ymm30, ymm29, YMMWORD PTR [rcx] # AVX512{VBMI,VL} + vpmultishiftqb ymm30, ymm29, YMMWORD PTR [rax+r14*8+0x1234] # AVX512{VBMI,VL} + vpmultishiftqb ymm30, ymm29, [rcx]{1to4} # AVX512{VBMI,VL} + vpmultishiftqb ymm30, ymm29, YMMWORD PTR [rdx+4064] # AVX512{VBMI,VL} Disp8 + vpmultishiftqb ymm30, ymm29, YMMWORD PTR [rdx+4096] # AVX512{VBMI,VL} + vpmultishiftqb ymm30, ymm29, YMMWORD PTR [rdx-4096] # AVX512{VBMI,VL} Disp8 + vpmultishiftqb ymm30, ymm29, YMMWORD PTR [rdx-4128] # AVX512{VBMI,VL} + vpmultishiftqb ymm30, ymm29, [rdx+1016]{1to4} # AVX512{VBMI,VL} Disp8 + vpmultishiftqb ymm30, ymm29, [rdx+1024]{1to4} # AVX512{VBMI,VL} + vpmultishiftqb ymm30, ymm29, [rdx-1024]{1to4} # AVX512{VBMI,VL} Disp8 + vpmultishiftqb ymm30, ymm29, [rdx-1032]{1to4} # AVX512{VBMI,VL} diff --git a/gas/testsuite/gas/i386/x86-64-clwb-intel.d b/gas/testsuite/gas/i386/x86-64-clwb-intel.d new file mode 100644 index 00000000000..5995c7856bd --- /dev/null +++ b/gas/testsuite/gas/i386/x86-64-clwb-intel.d @@ -0,0 +1,16 @@ +#as: +#objdump: -dw -Mintel +#name: x86_64 CLWB insns (Intel disassembly) +#source: x86-64-clwb.s + +.*: +file format .* + + +Disassembly of section \.text: + +0+ <_start>: +[ ]*[a-f0-9]+:[ ]*66 0f ae 31[ ]*clwb BYTE PTR \[rcx\] +[ ]*[a-f0-9]+:[ ]*66 42 0f ae b4 f0 23 01 00 00[ ]*clwb BYTE PTR \[rax\+r14\*8\+0x123\] +[ ]*[a-f0-9]+:[ ]*66 0f ae 31[ ]*clwb BYTE PTR \[rcx\] +[ ]*[a-f0-9]+:[ ]*66 42 0f ae b4 f0 34 12 00 00[ ]*clwb BYTE PTR \[rax\+r14\*8\+0x1234\] +#pass diff --git a/gas/testsuite/gas/i386/x86-64-clwb.d b/gas/testsuite/gas/i386/x86-64-clwb.d new file mode 100644 index 00000000000..eee47dd0d08 --- /dev/null +++ b/gas/testsuite/gas/i386/x86-64-clwb.d @@ -0,0 +1,16 @@ +#as: +#objdump: -dw +#name: x86_64 CLWB insns +#source: x86-64-clwb.s + +.*: +file format .* + + +Disassembly of section \.text: + +0+ <_start>: +[ ]*[a-f0-9]+:[ ]*66 0f ae 31[ ]*clwb \(%rcx\) +[ ]*[a-f0-9]+:[ ]*66 42 0f ae b4 f0 23 01 00 00[ ]*clwb 0x123\(%rax,%r14,8\) +[ ]*[a-f0-9]+:[ ]*66 0f ae 31[ ]*clwb \(%rcx\) +[ ]*[a-f0-9]+:[ ]*66 42 0f ae b4 f0 34 12 00 00[ ]*clwb 0x1234\(%rax,%r14,8\) +#pass diff --git a/gas/testsuite/gas/i386/x86-64-clwb.s b/gas/testsuite/gas/i386/x86-64-clwb.s new file mode 100644 index 00000000000..817fe9ec555 --- /dev/null +++ b/gas/testsuite/gas/i386/x86-64-clwb.s @@ -0,0 +1,12 @@ +# Check 64bit CLWB instructions + + .allow_index_reg + .text +_start: + + clwb (%rcx) # CLWB + clwb 0x123(%rax,%r14,8) # CLWB + + .intel_syntax noprefix + clwb BYTE PTR [rcx] # CLWB + clwb BYTE PTR [rax+r14*8+0x1234] # CLWB diff --git a/gas/testsuite/gas/i386/x86-64-pcommit-intel.d b/gas/testsuite/gas/i386/x86-64-pcommit-intel.d new file mode 100644 index 00000000000..ec9c1a6c26b --- /dev/null +++ b/gas/testsuite/gas/i386/x86-64-pcommit-intel.d @@ -0,0 +1,14 @@ +#as: +#objdump: -dw -Mintel +#name: x86_64 PCOMMIT insns (Intel disassembly) +#source: x86-64-pcommit.s + +.*: +file format .* + + +Disassembly of section \.text: + +0+ <_start>: +[ ]*[a-f0-9]+:[ ]*66 0f ae f8[ ]*pcommit +[ ]*[a-f0-9]+:[ ]*66 0f ae f8[ ]*pcommit +#pass diff --git a/gas/testsuite/gas/i386/x86-64-pcommit.d b/gas/testsuite/gas/i386/x86-64-pcommit.d new file mode 100644 index 00000000000..1a378cf4f68 --- /dev/null +++ b/gas/testsuite/gas/i386/x86-64-pcommit.d @@ -0,0 +1,14 @@ +#as: +#objdump: -dw +#name: x86_64 PCOMMIT insns +#source: x86-64-pcommit.s + +.*: +file format .* + + +Disassembly of section \.text: + +0+ <_start>: +[ ]*[a-f0-9]+:[ ]*66 0f ae f8[ ]*pcommit +[ ]*[a-f0-9]+:[ ]*66 0f ae f8[ ]*pcommit +#pass diff --git a/gas/testsuite/gas/i386/x86-64-pcommit.s b/gas/testsuite/gas/i386/x86-64-pcommit.s new file mode 100644 index 00000000000..b7913762f98 --- /dev/null +++ b/gas/testsuite/gas/i386/x86-64-pcommit.s @@ -0,0 +1,10 @@ +# Check 32bit PCOMMIT instructions + + .allow_index_reg + .text +_start: + + pcommit # PCOMMIT + + .intel_syntax noprefix + pcommit # PCOMMIT |