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| author | Ulrich Weigand <uweigand@de.ibm.com> | 2011-03-21 17:28:04 +0000 |
|---|---|---|
| committer | Ulrich Weigand <uweigand@de.ibm.com> | 2011-03-21 17:28:04 +0000 |
| commit | d19f7eee06b7e80d58529a61372f5765a7c2367d (patch) | |
| tree | 9ca92712593e2d848163495a2747b840bc3e9754 /gdb | |
| parent | 4a2fbb504b854c32aa38572515a48410f81a5ce6 (diff) | |
| download | binutils-d19f7eee06b7e80d58529a61372f5765a7c2367d.tar.gz binutils-d19f7eee06b7e80d58529a61372f5765a7c2367d.tar.bz2 binutils-d19f7eee06b7e80d58529a61372f5765a7c2367d.zip | |
* arm-tdep.c (arm_analyze_prologue): Do not abort parsing when
encountering a load via a non-SP register.
Diffstat (limited to 'gdb')
| -rw-r--r-- | gdb/ChangeLog | 5 | ||||
| -rw-r--r-- | gdb/arm-tdep.c | 26 |
2 files changed, 14 insertions, 17 deletions
diff --git a/gdb/ChangeLog b/gdb/ChangeLog index efc3aa23f0c..98b39a15121 100644 --- a/gdb/ChangeLog +++ b/gdb/ChangeLog @@ -1,3 +1,8 @@ +2011-03-21 Ulrich Weigand <ulrich.weigand@linaro.org> + + * arm-tdep.c (arm_analyze_prologue): Do not abort parsing when + encountering a load via a non-SP register. + 2011-03-21 Ulrich Weigand <uweigand@de.ibm.com> * tramp-frame.c (tramp_frame_prepend_unwinder): Set stop_reason diff --git a/gdb/arm-tdep.c b/gdb/arm-tdep.c index 754c431fabd..480015d01c6 100644 --- a/gdb/arm-tdep.c +++ b/gdb/arm-tdep.c @@ -1856,23 +1856,15 @@ arm_analyze_prologue (struct gdbarch *gdbarch, else if (arm_instruction_changes_pc (insn)) /* Don't scan past anything that might change control flow. */ break; - else if ((insn & 0xfe500000) == 0xe8100000) /* ldm */ - { - /* Ignore block loads from the stack, potentially copying - parameters from memory. */ - if (pv_is_register (regs[bits (insn, 16, 19)], ARM_SP_REGNUM)) - continue; - else - break; - } - else if ((insn & 0xfc500000) == 0xe4100000) - { - /* Similarly ignore single loads from the stack. */ - if (pv_is_register (regs[bits (insn, 16, 19)], ARM_SP_REGNUM)) - continue; - else - break; - } + else if ((insn & 0xfe500000) == 0xe8100000 /* ldm */ + && pv_is_register (regs[bits (insn, 16, 19)], ARM_SP_REGNUM)) + /* Ignore block loads from the stack, potentially copying + parameters from memory. */ + continue; + else if ((insn & 0xfc500000) == 0xe4100000 + && pv_is_register (regs[bits (insn, 16, 19)], ARM_SP_REGNUM)) + /* Similarly ignore single loads from the stack. */ + continue; else if ((insn & 0xffff0ff0) == 0xe1a00000) /* MOV Rd, Rm. Skip register copies, i.e. saves to another register instead of the stack. */ |