* config/tc-arm.c(do_t_ldst): Warn on loading into sp with

	writeback for appropriate cores/arch.
	* testsuite/gas/arm/ld-sp-warn-cortex-m3.d: New test.
	* testsuite/gas/arm/ld-sp-warn-cortex-m3.l: New test.
	* testsuite/gas/arm/ld-sp-warn-cortex-m4.d: New test.
	* testsuite/gas/arm/ld-sp-warn-cortex-m4.l: New test.
	* testsuite/gas/arm/ld-sp-warn-v7.d: New test.
	* testsuite/gas/arm/ld-sp-warn-v7.l: New test.
	* testsuite/gas/arm/ld-sp-warn-v7a.d: New test.
	* testsuite/gas/arm/ld-sp-warn-v7a.l: New test.
	* testsuite/gas/arm/ld-sp-warn-v7e-m.l: New test.
	* testsuite/gas/arm/ld-sp-warn-v7em.d: New test.
	* testsuite/gas/arm/ld-sp-warn-v7m.d: New test.
	* testsuite/gas/arm/ld-sp-warn-v7m.l: New test.
	* testsuite/gas/arm/ld-sp-warn-v7r.d: New test.
	* testsuite/gas/arm/ld-sp-warn-v7r.l: New test.
	* testsuite/gas/arm/ld-sp-warn.s: New test.

19 files changed, 117 insertions, 0 deletions

diff --git a/gas/config/tc-arm.c b/gas/config/tc-arm.c
index af8c4aa8739..a0b31a0f1d1 100644
--- a/gas/config/tc-arm.c
+++ b/gas/config/tc-arm.c
@@ -239,6 +239,15 @@ static int mfloat_abi_opt = -1;
 static arm_feature_set selected_cpu = ARM_ARCH_NONE;
 /* Must be long enough to hold any of the names in arm_cpus.  */
 static char selected_cpu_name[16];
+
+/* Return if no cpu was selected on command-line.  */
+static bfd_boolean
+no_cpu_selected (void)
+{
+  return selected_cpu.core == arm_arch_none.core
+    && selected_cpu.coproc == arm_arch_none.coproc;
+}
+
 #ifdef OBJ_ELF
 # ifdef EABI_DEFAULT
 static int meabi_flags = EABI_DEFAULT;
@@ -10378,6 +10387,21 @@ do_t_ldst (void)
 	}
       /* Definitely a 32-bit variant.  */
 
+      /* Warning for Erratum 752419.  */
+      if (opcode == T_MNEM_ldr
+	  && inst.operands[0].reg == REG_SP
+	  && inst.operands[1].writeback == 1
+	  && !inst.operands[1].immisreg)
+	{
+	  if (no_cpu_selected ()
+	      || (ARM_CPU_HAS_FEATURE (cpu_variant, arm_ext_v7)
+	          && !ARM_CPU_HAS_FEATURE (cpu_variant, arm_ext_v7a)
+	          && !ARM_CPU_HAS_FEATURE (cpu_variant, arm_ext_v7r)))
+	    as_warn (_("This instruction may be unpredictable "
+		       "if executed on M-profile cores "
+		       "with interrupts enabled."));
+	}
+
       /* Do some validations regarding addressing modes.  */
       if (inst.operands[1].immisreg && opcode != T_MNEM_ldr
 	  && opcode != T_MNEM_str)
diff --git a/gas/testsuite/ChangeLog b/gas/testsuite/ChangeLog
index b1c7e61d6f8..b533bc0d9ce 100644
--- a/gas/testsuite/ChangeLog
+++ b/gas/testsuite/ChangeLog
@@ -1,3 +1,21 @@
+2011-05-11  Tejas Belagod  <tejas.belagod@arm.com>
+
+	* gas/arm/ld-sp-warn-cortex-m3.d: New test.
+	* gas/arm/ld-sp-warn-cortex-m3.l: New test.
+	* gas/arm/ld-sp-warn-cortex-m4.d: New test.
+	* gas/arm/ld-sp-warn-cortex-m4.l: New test.
+	* gas/arm/ld-sp-warn-v7.d: New test.
+	* gas/arm/ld-sp-warn-v7.l: New test.
+	* gas/arm/ld-sp-warn-v7a.d: New test.
+	* gas/arm/ld-sp-warn-v7a.l: New test.
+	* gas/arm/ld-sp-warn-v7e-m.l: New test.
+	* gas/arm/ld-sp-warn-v7em.d: New test.
+	* gas/arm/ld-sp-warn-v7m.d: New test.
+	* gas/arm/ld-sp-warn-v7m.l: New test.
+	* gas/arm/ld-sp-warn-v7r.d: New test.
+	* gas/arm/ld-sp-warn-v7r.l: New test.
+	* gas/arm/ld-sp-warn.s: New test.
+
 2010-05-10  Quentin Neill  <quentin.neill@amd.com>
 
 	* gas/i386/i386.exp: Add new bdver2 test cases.
diff --git a/gas/testsuite/gas/arm/ld-sp-warn-cortex-m3.d b/gas/testsuite/gas/arm/ld-sp-warn-cortex-m3.d
new file mode 100644
index 00000000000..c1f89b405cd
--- /dev/null
+++ b/gas/testsuite/gas/arm/ld-sp-warn-cortex-m3.d
@@ -0,0 +1,4 @@
+# name: Erratum 752419: Warn Loads with writebacks to SP (cortex m3)
+# as: -mcpu=cortex-m3
+# source: ld-sp-warn.s
+# error-output: ld-sp-warn-cortex-m3.l
diff --git a/gas/testsuite/gas/arm/ld-sp-warn-cortex-m3.l b/gas/testsuite/gas/arm/ld-sp-warn-cortex-m3.l
new file mode 100644
index 00000000000..48ac57fa6e7
--- /dev/null
+++ b/gas/testsuite/gas/arm/ld-sp-warn-cortex-m3.l
@@ -0,0 +1,5 @@
+[^:]*: Assembler messages:
+[^:]*:3: Warning: This instruction may be unpredictable if executed on M-profile cores with interrupts enabled.
+[^:]*:4: Warning: This instruction may be unpredictable if executed on M-profile cores with interrupts enabled.
+[^:]*:7: Error: Thumb does not support register indexing with writeback -- `ldr r1,\[r0,r1\]!'
+[^:]*:8: Error: r13 not allowed here -- `ldrsb sp,\[r2,#16\]!'
diff --git a/gas/testsuite/gas/arm/ld-sp-warn-cortex-m4.d b/gas/testsuite/gas/arm/ld-sp-warn-cortex-m4.d
new file mode 100644
index 00000000000..0ae6d98eca2
--- /dev/null
+++ b/gas/testsuite/gas/arm/ld-sp-warn-cortex-m4.d
@@ -0,0 +1,4 @@
+# name: Erratum 752419: Warn Loads with writebacks to SP (cortex m4)
+# as: -mcpu=cortex-m4
+# source: ld-sp-warn.s
+# error-output: ld-sp-warn-cortex-m4.l
diff --git a/gas/testsuite/gas/arm/ld-sp-warn-cortex-m4.l b/gas/testsuite/gas/arm/ld-sp-warn-cortex-m4.l
new file mode 100644
index 00000000000..48ac57fa6e7
--- /dev/null
+++ b/gas/testsuite/gas/arm/ld-sp-warn-cortex-m4.l
@@ -0,0 +1,5 @@
+[^:]*: Assembler messages:
+[^:]*:3: Warning: This instruction may be unpredictable if executed on M-profile cores with interrupts enabled.
+[^:]*:4: Warning: This instruction may be unpredictable if executed on M-profile cores with interrupts enabled.
+[^:]*:7: Error: Thumb does not support register indexing with writeback -- `ldr r1,\[r0,r1\]!'
+[^:]*:8: Error: r13 not allowed here -- `ldrsb sp,\[r2,#16\]!'
diff --git a/gas/testsuite/gas/arm/ld-sp-warn-v7.d b/gas/testsuite/gas/arm/ld-sp-warn-v7.d
new file mode 100644
index 00000000000..4d3b0a5b584
--- /dev/null
+++ b/gas/testsuite/gas/arm/ld-sp-warn-v7.d
@@ -0,0 +1,4 @@
+# name: Erratum 752419: Warn Loads with writebacks to SP (v7)
+# as: -march=armv7
+# source: ld-sp-warn.s
+# error-output: ld-sp-warn-v7.l
diff --git a/gas/testsuite/gas/arm/ld-sp-warn-v7.l b/gas/testsuite/gas/arm/ld-sp-warn-v7.l
new file mode 100644
index 00000000000..48ac57fa6e7
--- /dev/null
+++ b/gas/testsuite/gas/arm/ld-sp-warn-v7.l
@@ -0,0 +1,5 @@
+[^:]*: Assembler messages:
+[^:]*:3: Warning: This instruction may be unpredictable if executed on M-profile cores with interrupts enabled.
+[^:]*:4: Warning: This instruction may be unpredictable if executed on M-profile cores with interrupts enabled.
+[^:]*:7: Error: Thumb does not support register indexing with writeback -- `ldr r1,\[r0,r1\]!'
+[^:]*:8: Error: r13 not allowed here -- `ldrsb sp,\[r2,#16\]!'
diff --git a/gas/testsuite/gas/arm/ld-sp-warn-v7a.d b/gas/testsuite/gas/arm/ld-sp-warn-v7a.d
new file mode 100644
index 00000000000..2f7dc8dc4ff
--- /dev/null
+++ b/gas/testsuite/gas/arm/ld-sp-warn-v7a.d
@@ -0,0 +1,4 @@
+# name: Erratum 752419: Warn Loads with writebacks to SP (v7a)
+# as: -march=armv7-a
+# source: ld-sp-warn.s
+# error-output: ld-sp-warn-v7a.l
diff --git a/gas/testsuite/gas/arm/ld-sp-warn-v7a.l b/gas/testsuite/gas/arm/ld-sp-warn-v7a.l
new file mode 100644
index 00000000000..40f0999e33e
--- /dev/null
+++ b/gas/testsuite/gas/arm/ld-sp-warn-v7a.l
@@ -0,0 +1,3 @@
+[^:]*: Assembler messages:
+[^:]*:7: Error: Thumb does not support register indexing with writeback -- `ldr r1,\[r0,r1\]!'
+[^:]*:8: Error: r13 not allowed here -- `ldrsb sp,\[r2,#16\]!'
diff --git a/gas/testsuite/gas/arm/ld-sp-warn-v7e-m.l b/gas/testsuite/gas/arm/ld-sp-warn-v7e-m.l
new file mode 100644
index 00000000000..48ac57fa6e7
--- /dev/null
+++ b/gas/testsuite/gas/arm/ld-sp-warn-v7e-m.l
@@ -0,0 +1,5 @@
+[^:]*: Assembler messages:
+[^:]*:3: Warning: This instruction may be unpredictable if executed on M-profile cores with interrupts enabled.
+[^:]*:4: Warning: This instruction may be unpredictable if executed on M-profile cores with interrupts enabled.
+[^:]*:7: Error: Thumb does not support register indexing with writeback -- `ldr r1,\[r0,r1\]!'
+[^:]*:8: Error: r13 not allowed here -- `ldrsb sp,\[r2,#16\]!'
diff --git a/gas/testsuite/gas/arm/ld-sp-warn-v7em.d b/gas/testsuite/gas/arm/ld-sp-warn-v7em.d
new file mode 100644
index 00000000000..d69368e26a6
--- /dev/null
+++ b/gas/testsuite/gas/arm/ld-sp-warn-v7em.d
@@ -0,0 +1,4 @@
+# name: Erratum 752419: Warn Loads with writebacks to SP (v7em)
+# as: -march=armv7e-m
+# source: ld-sp-warn.s
+# error-output: ld-sp-warn-v7e-m.l
diff --git a/gas/testsuite/gas/arm/ld-sp-warn-v7m.d b/gas/testsuite/gas/arm/ld-sp-warn-v7m.d
new file mode 100644
index 00000000000..f26835771df
--- /dev/null
+++ b/gas/testsuite/gas/arm/ld-sp-warn-v7m.d
@@ -0,0 +1,4 @@
+# name: Erratum 752419: Warn Loads with writebacks to SP  (v7m)
+# as: -march=armv7m
+# source: ld-sp-warn.s
+# error-output: ld-sp-warn-v7m.l
diff --git a/gas/testsuite/gas/arm/ld-sp-warn-v7m.l b/gas/testsuite/gas/arm/ld-sp-warn-v7m.l
new file mode 100644
index 00000000000..48ac57fa6e7
--- /dev/null
+++ b/gas/testsuite/gas/arm/ld-sp-warn-v7m.l
@@ -0,0 +1,5 @@
+[^:]*: Assembler messages:
+[^:]*:3: Warning: This instruction may be unpredictable if executed on M-profile cores with interrupts enabled.
+[^:]*:4: Warning: This instruction may be unpredictable if executed on M-profile cores with interrupts enabled.
+[^:]*:7: Error: Thumb does not support register indexing with writeback -- `ldr r1,\[r0,r1\]!'
+[^:]*:8: Error: r13 not allowed here -- `ldrsb sp,\[r2,#16\]!'
diff --git a/gas/testsuite/gas/arm/ld-sp-warn-v7r.d b/gas/testsuite/gas/arm/ld-sp-warn-v7r.d
new file mode 100644
index 00000000000..59a5db4ff2f
--- /dev/null
+++ b/gas/testsuite/gas/arm/ld-sp-warn-v7r.d
@@ -0,0 +1,4 @@
+# name: Erratum 752419: Warn Loads with writebacks to SP  (v7r)
+# as: -march=armv7-r
+# source: ld-sp-warn.s
+# error-output: ld-sp-warn-v7r.l
diff --git a/gas/testsuite/gas/arm/ld-sp-warn-v7r.l b/gas/testsuite/gas/arm/ld-sp-warn-v7r.l
new file mode 100644
index 00000000000..40f0999e33e
--- /dev/null
+++ b/gas/testsuite/gas/arm/ld-sp-warn-v7r.l
@@ -0,0 +1,3 @@
+[^:]*: Assembler messages:
+[^:]*:7: Error: Thumb does not support register indexing with writeback -- `ldr r1,\[r0,r1\]!'
+[^:]*:8: Error: r13 not allowed here -- `ldrsb sp,\[r2,#16\]!'
diff --git a/gas/testsuite/gas/arm/ld-sp-warn.d b/gas/testsuite/gas/arm/ld-sp-warn.d
new file mode 100644
index 00000000000..dcbbdd2649e
--- /dev/null
+++ b/gas/testsuite/gas/arm/ld-sp-warn.d
@@ -0,0 +1,3 @@
+# name: Erratum 752419: Warn Loads with writebacks to SP
+# source: ld-sp-warn.s
+# error-output: ld-sp-warn.l
diff --git a/gas/testsuite/gas/arm/ld-sp-warn.l b/gas/testsuite/gas/arm/ld-sp-warn.l
new file mode 100644
index 00000000000..48ac57fa6e7
--- /dev/null
+++ b/gas/testsuite/gas/arm/ld-sp-warn.l
@@ -0,0 +1,5 @@
+[^:]*: Assembler messages:
+[^:]*:3: Warning: This instruction may be unpredictable if executed on M-profile cores with interrupts enabled.
+[^:]*:4: Warning: This instruction may be unpredictable if executed on M-profile cores with interrupts enabled.
+[^:]*:7: Error: Thumb does not support register indexing with writeback -- `ldr r1,\[r0,r1\]!'
+[^:]*:8: Error: r13 not allowed here -- `ldrsb sp,\[r2,#16\]!'
diff --git a/gas/testsuite/gas/arm/ld-sp-warn.s b/gas/testsuite/gas/arm/ld-sp-warn.s
new file mode 100644
index 00000000000..87e3e9535d0
--- /dev/null
+++ b/gas/testsuite/gas/arm/ld-sp-warn.s
@@ -0,0 +1,8 @@
+.syntax unified
+.thumb
+ldr sp, [r0, #16]!
+ldr sp, [r1], #8
+ldr sp, [r0, #16]
+ldr r1, [r0, #16]
+ldr r1, [r0, r1]!
+ldrsb sp, [r2, #16]!