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| author | Joern Rennecke <joern.rennecke@embecosm.com> | 2002-06-19 14:28:09 +0000 |
|---|---|---|
| committer | Joern Rennecke <joern.rennecke@embecosm.com> | 2002-06-19 14:28:09 +0000 |
| commit | 5db33d76e135084aeffd36529325a76376cbf6e0 (patch) | |
| tree | be399f2b3ad6b903a2fda5421843ef6cd083715f /gas | |
| parent | cc36acdfd5cabcf82bfdfd4951fa8a9480601848 (diff) | |
| download | binutils-5db33d76e135084aeffd36529325a76376cbf6e0.tar.gz binutils-5db33d76e135084aeffd36529325a76376cbf6e0.tar.bz2 binutils-5db33d76e135084aeffd36529325a76376cbf6e0.zip | |
* config/tc-sh.c (get_specific): Revert 2002-05-01 change.
(assemble_ppi): Generate warning if the same register is used
twice as destination in the same padd / pmuls instruction.
Diffstat (limited to 'gas')
| -rw-r--r-- | gas/ChangeLog | 6 | ||||
| -rw-r--r-- | gas/config/tc-sh.c | 30 |
2 files changed, 15 insertions, 21 deletions
diff --git a/gas/ChangeLog b/gas/ChangeLog index 81c4d9632b4..caebb52ab0c 100644 --- a/gas/ChangeLog +++ b/gas/ChangeLog @@ -1,3 +1,9 @@ +Wed Jun 19 15:12:00 2002 Dhananjay R. Deshpande <dhananjayd@kpit.com> + + * config/tc-sh.c (get_specific): Revert 2002-05-01 change. + (assemble_ppi): Generate warning if the same register is used + twice as destination in the same padd / pmuls instruction. + 2002-06-18 Dave Brolley <brolley@redhat.com> From Catherine Moore, Michael Meissner, Richard Sandiford, Dave Brolley: diff --git a/gas/config/tc-sh.c b/gas/config/tc-sh.c index e62a6f95bd0..968ab4cdc49 100644 --- a/gas/config/tc-sh.c +++ b/gas/config/tc-sh.c @@ -1589,27 +1589,6 @@ get_specific (opcode, operands) sh_operand_info *user = operands + n; sh_arg_type arg = this_try->arg[n]; - /* If this is a parallel insn check to see if both - parts have the same destination register. */ - if ((n == 2) && (this_try->nibbles[0] == PPI)) - { - static boolean bIsPPI = false; - static int nLastDestReg; - - if (!bIsPPI) - { - bIsPPI = true; - nLastDestReg = user->reg; - } - else /* Second insn. */ - { - if (nLastDestReg == user->reg) - as_warn (_("destination register is same for parallel insns")); - - bIsPPI = false; - } - } - switch (arg) { case A_DISP_PC: @@ -2280,6 +2259,15 @@ assemble_ppi (op_end, opcode) default: as_bad (_("bad padd / psub pmuls output operand")); } + /* Generate waring if destination register for padd / psub + and pmuls is same ( only for A0 or A1 ) + If last nibble is 1010 then A0 is used in both padd / psub + and pmuls. If it is 1111 then A1 is used as destination + register in both padd / psub and pmuls */ + + if ((((field_b | reg_efg) & 0x000F) == 0x000A) + || (((field_b | reg_efg) & 0x000F) == 0x000F)) + as_warn (_("destination register is same for parallel insns")); } field_b += 0x4000 + reg_efg; break; |