diff options
author | nobody <> | 2000-02-22 16:18:14 +0000 |
---|---|---|
committer | nobody <> | 2000-02-22 16:18:14 +0000 |
commit | 0afa4c73eb98b409eb36cf10e91625a595439ad7 (patch) | |
tree | 0825dc3693176d04de20f41794a640b398ddf5c5 /bfd/coff-sh.c | |
parent | cc89ffe60ba6d7f80278431ac8da8385d34c3af7 (diff) | |
download | binutils-egcs_20000222.tar.gz binutils-egcs_20000222.tar.bz2 binutils-egcs_20000222.zip |
This commit was manufactured by cvs2svn to create tag 'egcs_20000222'.egcs_20000222
Sprout from cygnus 2000-02-22 16:18:13 UTC Ian Lance Taylor <ian@airs.com> 'import libiberty from egcs'
Delete:
.cvsignore
COPYING
COPYING.LIB
ChangeLog
Makefile.in
README
bfd/COPYING
bfd/ChangeLog
bfd/ChangeLog-9193
bfd/ChangeLog-9495
bfd/ChangeLog-9697
bfd/Makefile.am
bfd/Makefile.in
bfd/PORTING
bfd/README
bfd/TODO
bfd/acinclude.m4
bfd/aclocal.m4
bfd/aix386-core.c
bfd/aout-adobe.c
bfd/aout-arm.c
bfd/aout-encap.c
bfd/aout-ns32k.c
bfd/aout-sparcle.c
bfd/aout-target.h
bfd/aout-tic30.c
bfd/aout0.c
bfd/aout32.c
bfd/aout64.c
bfd/aoutf1.h
bfd/aoutx.h
bfd/archive.c
bfd/archures.c
bfd/bfd-in.h
bfd/bfd-in2.h
bfd/bfd.c
bfd/binary.c
bfd/bout.c
bfd/cache.c
bfd/cf-i386lynx.c
bfd/cf-m68klynx.c
bfd/cf-sparclynx.c
bfd/cisco-core.c
bfd/coff-a29k.c
bfd/coff-alpha.c
bfd/coff-apollo.c
bfd/coff-arm.c
bfd/coff-aux.c
bfd/coff-go32.c
bfd/coff-h8300.c
bfd/coff-h8500.c
bfd/coff-i386.c
bfd/coff-i860.c
bfd/coff-i960.c
bfd/coff-m68k.c
bfd/coff-m88k.c
bfd/coff-mcore.c
bfd/coff-mips.c
bfd/coff-pmac.c
bfd/coff-ppc.c
bfd/coff-rs6000.c
bfd/coff-sh.c
bfd/coff-sparc.c
bfd/coff-stgo32.c
bfd/coff-svm68k.c
bfd/coff-tic30.c
bfd/coff-tic80.c
bfd/coff-u68k.c
bfd/coff-w65.c
bfd/coff-we32k.c
bfd/coff-z8k.c
bfd/coffcode.h
bfd/coffgen.c
bfd/cofflink.c
bfd/coffswap.h
bfd/config.bfd
bfd/config.in
bfd/configure
bfd/configure.bat
bfd/configure.com
bfd/configure.host
bfd/configure.in
bfd/corefile.c
bfd/cpu-a29k.c
bfd/cpu-alpha.c
bfd/cpu-arc.c
bfd/cpu-arm.c
bfd/cpu-d10v.c
bfd/cpu-d30v.c
bfd/cpu-fr30.c
bfd/cpu-h8300.c
bfd/cpu-h8500.c
bfd/cpu-hppa.c
bfd/cpu-i386.c
bfd/cpu-i860.c
bfd/cpu-i960.c
bfd/cpu-m10200.c
bfd/cpu-m10300.c
bfd/cpu-m32r.c
bfd/cpu-m68k.c
bfd/cpu-m88k.c
bfd/cpu-mcore.c
bfd/cpu-mips.c
bfd/cpu-ns32k.c
bfd/cpu-powerpc.c
bfd/cpu-rs6000.c
bfd/cpu-sh.c
bfd/cpu-sparc.c
bfd/cpu-tic30.c
bfd/cpu-tic80.c
bfd/cpu-v850.c
bfd/cpu-vax.c
bfd/cpu-w65.c
bfd/cpu-we32k.c
bfd/cpu-z8k.c
bfd/demo64.c
bfd/dep-in.sed
bfd/doc/ChangeLog
bfd/doc/Makefile.am
bfd/doc/Makefile.in
bfd/doc/bfd.texinfo
bfd/doc/bfdint.texi
bfd/doc/bfdsumm.texi
bfd/doc/chew.c
bfd/doc/doc.str
bfd/doc/makefile.vms
bfd/doc/proto.str
bfd/dwarf1.c
bfd/dwarf2.c
bfd/ecoff.c
bfd/ecofflink.c
bfd/ecoffswap.h
bfd/elf-bfd.h
bfd/elf-m10200.c
bfd/elf-m10300.c
bfd/elf.c
bfd/elf32-arc.c
bfd/elf32-arm.h
bfd/elf32-d10v.c
bfd/elf32-d30v.c
bfd/elf32-fr30.c
bfd/elf32-gen.c
bfd/elf32-hppa.c
bfd/elf32-hppa.h
bfd/elf32-i386.c
bfd/elf32-i860.c
bfd/elf32-m32r.c
bfd/elf32-m68k.c
bfd/elf32-m88k.c
bfd/elf32-mcore.c
bfd/elf32-mips.c
bfd/elf32-ppc.c
bfd/elf32-sh.c
bfd/elf32-sparc.c
bfd/elf32-v850.c
bfd/elf32.c
bfd/elf64-alpha.c
bfd/elf64-gen.c
bfd/elf64-mips.c
bfd/elf64-sparc.c
bfd/elf64.c
bfd/elfarm-nabi.c
bfd/elfarm-oabi.c
bfd/elfcode.h
bfd/elfcore.h
bfd/elflink.c
bfd/elflink.h
bfd/elfxx-target.h
bfd/epoc-pe-arm.c
bfd/epoc-pei-arm.c
bfd/format.c
bfd/freebsd.h
bfd/gen-aout.c
bfd/genlink.h
bfd/go32stub.h
bfd/hash.c
bfd/host-aout.c
bfd/hosts/alphalinux.h
bfd/hosts/alphavms.h
bfd/hosts/decstation.h
bfd/hosts/delta68.h
bfd/hosts/dpx2.h
bfd/hosts/hp300bsd.h
bfd/hosts/i386bsd.h
bfd/hosts/i386linux.h
bfd/hosts/i386mach3.h
bfd/hosts/i386sco.h
bfd/hosts/i860mach3.h
bfd/hosts/m68kaux.h
bfd/hosts/m68klinux.h
bfd/hosts/m88kmach3.h
bfd/hosts/mipsbsd.h
bfd/hosts/mipsmach3.h
bfd/hosts/news-mips.h
bfd/hosts/news.h
bfd/hosts/pc532mach.h
bfd/hosts/riscos.h
bfd/hosts/symmetry.h
bfd/hosts/tahoe.h
bfd/hosts/vaxbsd.h
bfd/hosts/vaxult.h
bfd/hosts/vaxult2.h
bfd/hp300bsd.c
bfd/hp300hpux.c
bfd/hppa_stubs.h
bfd/hppabsd-core.c
bfd/hpux-core.c
bfd/i386aout.c
bfd/i386bsd.c
bfd/i386dynix.c
bfd/i386freebsd.c
bfd/i386linux.c
bfd/i386lynx.c
bfd/i386mach3.c
bfd/i386msdos.c
bfd/i386netbsd.c
bfd/i386os9k.c
bfd/ieee.c
bfd/ihex.c
bfd/init.c
bfd/irix-core.c
bfd/libaout.h
bfd/libbfd-in.h
bfd/libbfd.c
bfd/libbfd.h
bfd/libcoff-in.h
bfd/libcoff.h
bfd/libecoff.h
bfd/libhppa.h
bfd/libieee.h
bfd/libnlm.h
bfd/liboasys.h
bfd/linker.c
bfd/lynx-core.c
bfd/m68k4knetbsd.c
bfd/m68klinux.c
bfd/m68klynx.c
bfd/m68knetbsd.c
bfd/m88kmach3.c
bfd/makefile.dos
bfd/makefile.vms
bfd/mipsbsd.c
bfd/mpw-config.in
bfd/mpw-make.sed
bfd/netbsd-core.c
bfd/netbsd.h
bfd/newsos3.c
bfd/nlm-target.h
bfd/nlm.c
bfd/nlm32-alpha.c
bfd/nlm32-i386.c
bfd/nlm32-ppc.c
bfd/nlm32-sparc.c
bfd/nlm32.c
bfd/nlm64.c
bfd/nlmcode.h
bfd/nlmswap.h
bfd/ns32k.h
bfd/ns32knetbsd.c
bfd/oasys.c
bfd/opncls.c
bfd/osf-core.c
bfd/pc532-mach.c
bfd/pe-arm.c
bfd/pe-i386.c
bfd/pe-mcore.c
bfd/pe-ppc.c
bfd/pei-arm.c
bfd/pei-i386.c
bfd/pei-mcore.c
bfd/pei-ppc.c
bfd/peicode.h
bfd/po/Make-in
bfd/po/POTFILES.in
bfd/po/bfd.pot
bfd/ppcboot.c
bfd/ptrace-core.c
bfd/reloc.c
bfd/reloc16.c
bfd/riscix.c
bfd/rs6000-core.c
bfd/sco5-core.c
bfd/section.c
bfd/som.c
bfd/som.h
bfd/sparclinux.c
bfd/sparclynx.c
bfd/sparcnetbsd.c
bfd/srec.c
bfd/stab-syms.c
bfd/stabs.c
bfd/stamp-h.in
bfd/sunos.c
bfd/syms.c
bfd/sysdep.h
bfd/targets.c
bfd/targmatch.sed
bfd/tekhex.c
bfd/trad-core.c
bfd/vaxnetbsd.c
bfd/versados.c
bfd/vms-gsd.c
bfd/vms-hdr.c
bfd/vms-misc.c
bfd/vms-tir.c
bfd/vms.c
bfd/vms.h
bfd/xcofflink.c
binutils/ChangeLog
binutils/Makefile.am
binutils/Makefile.in
binutils/NEWS
binutils/README
binutils/acinclude.m4
binutils/aclocal.m4
binutils/addr2line.1
binutils/addr2line.c
binutils/ar.1
binutils/ar.c
binutils/arlex.l
binutils/arparse.y
binutils/arsup.c
binutils/arsup.h
binutils/binutils.texi
binutils/bucomm.c
binutils/bucomm.h
binutils/budbg.h
binutils/coffdump.c
binutils/coffgrok.c
binutils/coffgrok.h
binutils/config.in
binutils/configure
binutils/configure.bat
binutils/configure.com
binutils/configure.in
binutils/cxxfilt.man
binutils/debug.c
binutils/debug.h
binutils/deflex.l
binutils/defparse.y
binutils/dep-in.sed
binutils/dlltool.c
binutils/dlltool.h
binutils/dllwrap.c
binutils/dyn-string.c
binutils/dyn-string.h
binutils/filemode.c
binutils/ieee.c
binutils/is-ranlib.c
binutils/is-strip.c
binutils/mac-binutils.r
binutils/makefile.vms-in
binutils/maybe-ranlib.c
binutils/maybe-strip.c
binutils/mpw-config.in
binutils/mpw-make.sed
binutils/nlmconv.1
binutils/nlmconv.c
binutils/nlmconv.h
binutils/nlmheader.y
binutils/nm.1
binutils/nm.c
binutils/not-ranlib.c
binutils/not-strip.c
binutils/objcopy.1
binutils/objcopy.c
binutils/objdump.1
binutils/objdump.c
binutils/po/Make-in
binutils/po/POTFILES.in
binutils/po/binutils.pot
binutils/prdbg.c
binutils/ranlib.1
binutils/ranlib.sh
binutils/rclex.l
binutils/rcparse.y
binutils/rdcoff.c
binutils/rddbg.c
binutils/readelf.c
binutils/rename.c
binutils/resbin.c
binutils/rescoff.c
binutils/resrc.c
binutils/resres.c
binutils/sanity.sh
binutils/size.1
binutils/size.c
binutils/srconv.c
binutils/stabs.c
binutils/stamp-h.in
binutils/strings.1
binutils/strings.c
binutils/strip.1
binutils/sysdump.c
binutils/sysinfo.y
binutils/syslex.l
binutils/sysroff.info
binutils/testsuite/ChangeLog
binutils/testsuite/binutils-all/ar.exp
binutils/testsuite/binutils-all/bintest.s
binutils/testsuite/binutils-all/hppa/addendbug.s
binutils/testsuite/binutils-all/hppa/objdump.exp
binutils/testsuite/binutils-all/nm.exp
binutils/testsuite/binutils-all/objcopy.exp
binutils/testsuite/binutils-all/objdump.exp
binutils/testsuite/binutils-all/readelf.exp
binutils/testsuite/binutils-all/readelf.h
binutils/testsuite/binutils-all/readelf.r
binutils/testsuite/binutils-all/readelf.s
binutils/testsuite/binutils-all/readelf.ss
binutils/testsuite/binutils-all/readelf.wi
binutils/testsuite/binutils-all/size.exp
binutils/testsuite/binutils-all/testprog.c
binutils/testsuite/config/default.exp
binutils/testsuite/config/hppa.sed
binutils/testsuite/lib/utils-lib.exp
binutils/version.c
binutils/windres.c
binutils/windres.h
binutils/winduni.c
binutils/winduni.h
binutils/wrstabs.c
config-ml.in
config.guess
config.if
config.sub
config/ChangeLog
config/acinclude.m4
config/mh-a68bsd
config/mh-aix386
config/mh-aix43
config/mh-apollo68
config/mh-armpic
config/mh-cxux
config/mh-cygwin
config/mh-decstation
config/mh-delta88
config/mh-dgux
config/mh-dgux386
config/mh-djgpp
config/mh-elfalphapic
config/mh-hp300
config/mh-hpux
config/mh-hpux8
config/mh-interix
config/mh-irix4
config/mh-irix5
config/mh-irix6
config/mh-lynxos
config/mh-lynxrs6k
config/mh-m68kpic
config/mh-mingw32
config/mh-ncr3000
config/mh-ncrsvr43
config/mh-necv4
config/mh-papic
config/mh-ppcpic
config/mh-riscos
config/mh-sco
config/mh-solaris
config/mh-sparcpic
config/mh-sun3
config/mh-sysv
config/mh-sysv4
config/mh-sysv5
config/mh-vaxult2
config/mh-x86pic
config/mpw-mh-mpw
config/mpw/ChangeLog
config/mpw/MoveIfChange
config/mpw/README
config/mpw/forward-include
config/mpw/g-mpw-make.sed
config/mpw/mpw-touch
config/mpw/mpw-true
config/mpw/null-command
config/mpw/open-brace
config/mpw/tr-7to8-src
config/mpw/true
config/mt-armpic
config/mt-d30v
config/mt-elfalphapic
config/mt-linux
config/mt-m68kpic
config/mt-netware
config/mt-ospace
config/mt-papic
config/mt-ppcpic
config/mt-sparcpic
config/mt-v810
config/mt-x86pic
configure
configure.bat
configure.in
etc/ChangeLog
etc/Makefile.in
etc/add-log.el
etc/add-log.vi
etc/configbuild.ein
etc/configbuild.fig
etc/configbuild.jin
etc/configbuild.tin
etc/configdev.ein
etc/configdev.fig
etc/configdev.jin
etc/configdev.tin
etc/configure
etc/configure.in
etc/configure.texi
etc/make-stds.texi
etc/standards.texi
gas/CONTRIBUTORS
gas/COPYING
gas/ChangeLog
gas/ChangeLog-9295
gas/ChangeLog-9697
gas/Makefile.am
gas/Makefile.in
gas/NEWS
gas/README
gas/README-vms
gas/acinclude.m4
gas/aclocal.m4
gas/app.c
gas/as.c
gas/as.h
gas/asintl.h
gas/atof-generic.c
gas/bignum-copy.c
gas/bignum.h
gas/bit_fix.h
gas/cgen.c
gas/cgen.h
gas/cond.c
gas/config-gas.com
gas/config.in
gas/config/aout_gnu.h
gas/config/atof-ieee.c
gas/config/atof-tahoe.c
gas/config/atof-vax.c
gas/config/e-i386coff.c
gas/config/e-i386elf.c
gas/config/e-mipsecoff.c
gas/config/e-mipself.c
gas/config/go32.cfg
gas/config/itbl-mips.h
gas/config/m68k-parse.h
gas/config/m68k-parse.y
gas/config/m88k-opcode.h
gas/config/obj-aout.c
gas/config/obj-aout.h
gas/config/obj-bout.c
gas/config/obj-bout.h
gas/config/obj-coff.c
gas/config/obj-coff.h
gas/config/obj-ecoff.c
gas/config/obj-ecoff.h
gas/config/obj-elf.c
gas/config/obj-elf.h
gas/config/obj-evax.c
gas/config/obj-evax.h
gas/config/obj-generic.c
gas/config/obj-generic.h
gas/config/obj-hp300.c
gas/config/obj-hp300.h
gas/config/obj-ieee.c
gas/config/obj-ieee.h
gas/config/obj-multi.c
gas/config/obj-multi.h
gas/config/obj-som.c
gas/config/obj-som.h
gas/config/obj-vms.c
gas/config/obj-vms.h
gas/config/tc-a29k.c
gas/config/tc-a29k.h
gas/config/tc-alpha.c
gas/config/tc-alpha.h
gas/config/tc-arc.c
gas/config/tc-arc.h
gas/config/tc-arm.c
gas/config/tc-arm.h
gas/config/tc-d10v.c
gas/config/tc-d10v.h
gas/config/tc-d30v.c
gas/config/tc-d30v.h
gas/config/tc-fr30.c
gas/config/tc-fr30.h
gas/config/tc-generic.c
gas/config/tc-generic.h
gas/config/tc-h8300.c
gas/config/tc-h8300.h
gas/config/tc-h8500.c
gas/config/tc-h8500.h
gas/config/tc-hppa.c
gas/config/tc-hppa.h
gas/config/tc-i386.c
gas/config/tc-i386.h
gas/config/tc-i860.c
gas/config/tc-i860.h
gas/config/tc-i960.c
gas/config/tc-i960.h
gas/config/tc-m32r.c
gas/config/tc-m32r.h
gas/config/tc-m68851.h
gas/config/tc-m68k.c
gas/config/tc-m68k.h
gas/config/tc-m88k.c
gas/config/tc-m88k.h
gas/config/tc-mcore.c
gas/config/tc-mcore.h
gas/config/tc-mips.c
gas/config/tc-mips.h
gas/config/tc-mn10200.c
gas/config/tc-mn10200.h
gas/config/tc-mn10300.c
gas/config/tc-mn10300.h
gas/config/tc-ns32k.c
gas/config/tc-ns32k.h
gas/config/tc-ppc.c
gas/config/tc-ppc.h
gas/config/tc-sh.c
gas/config/tc-sh.h
gas/config/tc-sparc.c
gas/config/tc-sparc.h
gas/config/tc-tahoe.c
gas/config/tc-tahoe.h
gas/config/tc-tic30.c
gas/config/tc-tic30.h
gas/config/tc-tic80.c
gas/config/tc-tic80.h
gas/config/tc-v850.c
gas/config/tc-v850.h
gas/config/tc-vax.c
gas/config/tc-vax.h
gas/config/tc-w65.c
gas/config/tc-w65.h
gas/config/tc-z8k.c
gas/config/tc-z8k.h
gas/config/te-386bsd.h
gas/config/te-aux.h
gas/config/te-delt88.h
gas/config/te-delta.h
gas/config/te-dpx2.h
gas/config/te-dynix.h
gas/config/te-epoc-pe.h
gas/config/te-generic.h
gas/config/te-go32.h
gas/config/te-hp300.h
gas/config/te-hppa.h
gas/config/te-i386aix.h
gas/config/te-ic960.h
gas/config/te-linux.h
gas/config/te-lnews.h
gas/config/te-lynx.h
gas/config/te-mach.h
gas/config/te-macos.h
gas/config/te-multi.h
gas/config/te-nbsd.h
gas/config/te-nbsd532.h
gas/config/te-pc532mach.h
gas/config/te-pe.h
gas/config/te-ppcnw.h
gas/config/te-psos.h
gas/config/te-riscix.h
gas/config/te-sparcaout.h
gas/config/te-sun3.h
gas/config/te-svr4.h
gas/config/te-sysv32.h
gas/config/vax-inst.h
gas/config/vms-a-conf.h
gas/config/vms-conf.h
gas/configure
gas/configure.bat
gas/configure.in
gas/debug.c
gas/dep-in.sed
gas/depend.c
gas/doc/Makefile.am
gas/doc/Makefile.in
gas/doc/all.texi
gas/doc/as.1
gas/doc/as.texinfo
gas/doc/c-a29k.texi
gas/doc/c-arm.texi
gas/doc/c-d10v.texi
gas/doc/c-d30v.texi
gas/doc/c-h8300.texi
gas/doc/c-h8500.texi
gas/doc/c-hppa.texi
gas/doc/c-i386.texi
gas/doc/c-i960.texi
gas/doc/c-m32r.texi
gas/doc/c-m68k.texi
gas/doc/c-mips.texi
gas/doc/c-ns32k.texi
gas/doc/c-sh.texi
gas/doc/c-sparc.texi
gas/doc/c-v850.texi
gas/doc/c-vax.texi
gas/doc/c-z8k.texi
gas/doc/gasp.texi
gas/doc/h8.texi
gas/doc/internals.texi
gas/ecoff.c
gas/ecoff.h
gas/ehopt.c
gas/emul-target.h
gas/emul.h
gas/expr.c
gas/expr.h
gas/flonum-copy.c
gas/flonum-konst.c
gas/flonum-mult.c
gas/flonum.h
gas/frags.c
gas/frags.h
gas/gasp.c
gas/gdbinit.in
gas/hash.c
gas/hash.h
gas/input-file.c
gas/input-file.h
gas/input-scrub.c
gas/itbl-lex.l
gas/itbl-ops.c
gas/itbl-ops.h
gas/itbl-parse.y
gas/link.cmd
gas/listing.c
gas/listing.h
gas/literal.c
gas/mac-as.r
gas/macro.c
gas/macro.h
gas/makefile.vms
gas/messages.c
gas/mpw-config.in
gas/mpw-make.sed
gas/obj.h
gas/output-file.c
gas/output-file.h
gas/po/Make-in
gas/po/POTFILES.in
gas/po/gas.pot
gas/read.c
gas/read.h
gas/sb.c
gas/sb.h
gas/stabs.c
gas/stamp-h.in
gas/struc-symbol.h
gas/subsegs.c
gas/subsegs.h
gas/symbols.c
gas/symbols.h
gas/tc.h
gas/testsuite/ChangeLog
gas/testsuite/config/default.exp
gas/testsuite/gas/all/align.d
gas/testsuite/gas/all/align.s
gas/testsuite/gas/all/cofftag.d
gas/testsuite/gas/all/cofftag.s
gas/testsuite/gas/all/comment.s
gas/testsuite/gas/all/cond.d
gas/testsuite/gas/all/cond.s
gas/testsuite/gas/all/diff1.s
gas/testsuite/gas/all/float.s
gas/testsuite/gas/all/gas.exp
gas/testsuite/gas/all/itbl
gas/testsuite/gas/all/itbl-test.c
gas/testsuite/gas/all/itbl.s
gas/testsuite/gas/all/p1480.s
gas/testsuite/gas/all/p2425.s
gas/testsuite/gas/all/struct.d
gas/testsuite/gas/all/struct.s
gas/testsuite/gas/all/x930509.s
gas/testsuite/gas/alpha/fp.d
gas/testsuite/gas/alpha/fp.exp
gas/testsuite/gas/alpha/fp.s
gas/testsuite/gas/arc/alias.d
gas/testsuite/gas/arc/alias.s
gas/testsuite/gas/arc/arc.exp
gas/testsuite/gas/arc/branch.d
gas/testsuite/gas/arc/branch.s
gas/testsuite/gas/arc/flag.d
gas/testsuite/gas/arc/flag.s
gas/testsuite/gas/arc/insn3.d
gas/testsuite/gas/arc/insn3.s
gas/testsuite/gas/arc/j.d
gas/testsuite/gas/arc/j.s
gas/testsuite/gas/arc/ld.d
gas/testsuite/gas/arc/ld.s
gas/testsuite/gas/arc/math.d
gas/testsuite/gas/arc/math.s
gas/testsuite/gas/arc/sshift.d
gas/testsuite/gas/arc/sshift.s
gas/testsuite/gas/arc/st.d
gas/testsuite/gas/arc/st.s
gas/testsuite/gas/arc/warn.exp
gas/testsuite/gas/arc/warn.s
gas/testsuite/gas/arm/arch4t.s
gas/testsuite/gas/arm/arm.exp
gas/testsuite/gas/arm/arm3.s
gas/testsuite/gas/arm/arm6.s
gas/testsuite/gas/arm/arm7dm.s
gas/testsuite/gas/arm/arm7t.d
gas/testsuite/gas/arm/arm7t.s
gas/testsuite/gas/arm/copro.s
gas/testsuite/gas/arm/float.s
gas/testsuite/gas/arm/immed.s
gas/testsuite/gas/arm/inst.d
gas/testsuite/gas/arm/inst.s
gas/testsuite/gas/arm/le-fpconst.d
gas/testsuite/gas/arm/le-fpconst.s
gas/testsuite/gas/arm/thumb.s
gas/testsuite/gas/d30v/align.d
gas/testsuite/gas/d30v/align.s
gas/testsuite/gas/d30v/array.d
gas/testsuite/gas/d30v/array.s
gas/testsuite/gas/d30v/bittest.d
gas/testsuite/gas/d30v/bittest.l
gas/testsuite/gas/d30v/bittest.s
gas/testsuite/gas/d30v/d30.exp
gas/testsuite/gas/d30v/guard-debug.d
gas/testsuite/gas/d30v/guard-debug.s
gas/testsuite/gas/d30v/guard.d
gas/testsuite/gas/d30v/guard.s
gas/testsuite/gas/d30v/inst.d
gas/testsuite/gas/d30v/inst.s
gas/testsuite/gas/d30v/label-debug.d
gas/testsuite/gas/d30v/label-debug.s
gas/testsuite/gas/d30v/label.d
gas/testsuite/gas/d30v/label.s
gas/testsuite/gas/d30v/mul.d
gas/testsuite/gas/d30v/mul.s
gas/testsuite/gas/d30v/opt.d
gas/testsuite/gas/d30v/opt.s
gas/testsuite/gas/d30v/reloc.d
gas/testsuite/gas/d30v/reloc.s
gas/testsuite/gas/d30v/serial.l
gas/testsuite/gas/d30v/serial.s
gas/testsuite/gas/d30v/serial2.l
gas/testsuite/gas/d30v/serial2.s
gas/testsuite/gas/d30v/serial2O.l
gas/testsuite/gas/d30v/serial2O.s
gas/testsuite/gas/d30v/warn_oddreg.l
gas/testsuite/gas/d30v/warn_oddreg.s
gas/testsuite/gas/fr30/allinsn.d
gas/testsuite/gas/fr30/allinsn.exp
gas/testsuite/gas/fr30/allinsn.s
gas/testsuite/gas/fr30/fr30.exp
gas/testsuite/gas/h8300/addsub.s
gas/testsuite/gas/h8300/addsubh.s
gas/testsuite/gas/h8300/addsubs.s
gas/testsuite/gas/h8300/bitops1.s
gas/testsuite/gas/h8300/bitops1h.s
gas/testsuite/gas/h8300/bitops1s.s
gas/testsuite/gas/h8300/bitops2.s
gas/testsuite/gas/h8300/bitops2h.s
gas/testsuite/gas/h8300/bitops2s.s
gas/testsuite/gas/h8300/bitops3.s
gas/testsuite/gas/h8300/bitops3h.s
gas/testsuite/gas/h8300/bitops3s.s
gas/testsuite/gas/h8300/bitops4.s
gas/testsuite/gas/h8300/bitops4h.s
gas/testsuite/gas/h8300/bitops4s.s
gas/testsuite/gas/h8300/branch.s
gas/testsuite/gas/h8300/branchh.s
gas/testsuite/gas/h8300/branchs.s
gas/testsuite/gas/h8300/cbranch.s
gas/testsuite/gas/h8300/cbranchh.s
gas/testsuite/gas/h8300/cbranchs.s
gas/testsuite/gas/h8300/cmpsi2.s
gas/testsuite/gas/h8300/compare.s
gas/testsuite/gas/h8300/compareh.s
gas/testsuite/gas/h8300/compares.s
gas/testsuite/gas/h8300/decimal.s
gas/testsuite/gas/h8300/decimalh.s
gas/testsuite/gas/h8300/decimals.s
gas/testsuite/gas/h8300/divmul.s
gas/testsuite/gas/h8300/divmulh.s
gas/testsuite/gas/h8300/divmuls.s
gas/testsuite/gas/h8300/extendh.s
gas/testsuite/gas/h8300/extends.s
gas/testsuite/gas/h8300/ffxx1.d
gas/testsuite/gas/h8300/ffxx1.s
gas/testsuite/gas/h8300/h8300.exp
gas/testsuite/gas/h8300/incdec.s
gas/testsuite/gas/h8300/incdech.s
gas/testsuite/gas/h8300/incdecs.s
gas/testsuite/gas/h8300/logical.s
gas/testsuite/gas/h8300/logicalh.s
gas/testsuite/gas/h8300/logicals.s
gas/testsuite/gas/h8300/macs.s
gas/testsuite/gas/h8300/misc.s
gas/testsuite/gas/h8300/misch.s
gas/testsuite/gas/h8300/miscs.s
gas/testsuite/gas/h8300/mov32bug.s
gas/testsuite/gas/h8300/movb.s
gas/testsuite/gas/h8300/movbh.s
gas/testsuite/gas/h8300/movbs.s
gas/testsuite/gas/h8300/movlh.s
gas/testsuite/gas/h8300/movls.s
gas/testsuite/gas/h8300/movw.s
gas/testsuite/gas/h8300/movwh.s
gas/testsuite/gas/h8300/movws.s
gas/testsuite/gas/h8300/multiples.s
gas/testsuite/gas/h8300/pushpop.s
gas/testsuite/gas/h8300/pushpoph.s
gas/testsuite/gas/h8300/pushpops.s
gas/testsuite/gas/h8300/rotsh.s
gas/testsuite/gas/h8300/rotshh.s
gas/testsuite/gas/h8300/rotshs.s
gas/testsuite/gas/hppa/README
gas/testsuite/gas/hppa/basic/add.s
gas/testsuite/gas/hppa/basic/addi.s
gas/testsuite/gas/hppa/basic/basic.exp
gas/testsuite/gas/hppa/basic/branch.s
gas/testsuite/gas/hppa/basic/comclr.s
gas/testsuite/gas/hppa/basic/copr.s
gas/testsuite/gas/hppa/basic/coprmem.s
gas/testsuite/gas/hppa/basic/dcor.s
gas/testsuite/gas/hppa/basic/deposit.s
gas/testsuite/gas/hppa/basic/ds.s
gas/testsuite/gas/hppa/basic/extract.s
gas/testsuite/gas/hppa/basic/fmem.s
gas/testsuite/gas/hppa/basic/fmemLRbug.s
gas/testsuite/gas/hppa/basic/fp_comp.s
gas/testsuite/gas/hppa/basic/fp_conv.s
gas/testsuite/gas/hppa/basic/fp_fcmp.s
gas/testsuite/gas/hppa/basic/fp_misc.s
gas/testsuite/gas/hppa/basic/imem.s
gas/testsuite/gas/hppa/basic/immed.s
gas/testsuite/gas/hppa/basic/logical.s
gas/testsuite/gas/hppa/basic/purge.s
gas/testsuite/gas/hppa/basic/sh1add.s
gas/testsuite/gas/hppa/basic/sh2add.s
gas/testsuite/gas/hppa/basic/sh3add.s
gas/testsuite/gas/hppa/basic/shift.s
gas/testsuite/gas/hppa/basic/special.s
gas/testsuite/gas/hppa/basic/spop.s
gas/testsuite/gas/hppa/basic/sub.s
gas/testsuite/gas/hppa/basic/subi.s
gas/testsuite/gas/hppa/basic/system.s
gas/testsuite/gas/hppa/basic/unit.s
gas/testsuite/gas/hppa/basic/weird.s
gas/testsuite/gas/hppa/parse/align1.s
gas/testsuite/gas/hppa/parse/align2.s
gas/testsuite/gas/hppa/parse/appbug.s
gas/testsuite/gas/hppa/parse/badfmpyadd.s
gas/testsuite/gas/hppa/parse/block1.s
gas/testsuite/gas/hppa/parse/block2.s
gas/testsuite/gas/hppa/parse/calldatabug.s
gas/testsuite/gas/hppa/parse/callinfobug.s
gas/testsuite/gas/hppa/parse/defbug.s
gas/testsuite/gas/hppa/parse/entrybug.s
gas/testsuite/gas/hppa/parse/exportbug.s
gas/testsuite/gas/hppa/parse/exprbug.s
gas/testsuite/gas/hppa/parse/fixup7bug.s
gas/testsuite/gas/hppa/parse/global.s
gas/testsuite/gas/hppa/parse/labelbug.s
gas/testsuite/gas/hppa/parse/linesepbug.s
gas/testsuite/gas/hppa/parse/lselbug.s
gas/testsuite/gas/hppa/parse/nosubspace.s
gas/testsuite/gas/hppa/parse/parse.exp
gas/testsuite/gas/hppa/parse/procbug.s
gas/testsuite/gas/hppa/parse/regpopbug.s
gas/testsuite/gas/hppa/parse/spacebug.s
gas/testsuite/gas/hppa/parse/ssbug.s
gas/testsuite/gas/hppa/parse/stdreg.s
gas/testsuite/gas/hppa/parse/stringer.s
gas/testsuite/gas/hppa/parse/undefbug.s
gas/testsuite/gas/hppa/parse/versionbug.s
gas/testsuite/gas/hppa/parse/xmpyubug.s
gas/testsuite/gas/hppa/reloc/applybug.s
gas/testsuite/gas/hppa/reloc/blebug.s
gas/testsuite/gas/hppa/reloc/blebug2.s
gas/testsuite/gas/hppa/reloc/blebug3.s
gas/testsuite/gas/hppa/reloc/exitbug.s
gas/testsuite/gas/hppa/reloc/fixupbug.s
gas/testsuite/gas/hppa/reloc/funcrelocbug.s
gas/testsuite/gas/hppa/reloc/labelopbug.s
gas/testsuite/gas/hppa/reloc/longcall.s
gas/testsuite/gas/hppa/reloc/picreloc.s
gas/testsuite/gas/hppa/reloc/plabelbug.s
gas/testsuite/gas/hppa/reloc/r_no_reloc.s
gas/testsuite/gas/hppa/reloc/reduce.s
gas/testsuite/gas/hppa/reloc/reduce2.s
gas/testsuite/gas/hppa/reloc/reduce3.s
gas/testsuite/gas/hppa/reloc/reloc.exp
gas/testsuite/gas/hppa/reloc/roundmode.s
gas/testsuite/gas/hppa/reloc/selectorbug.s
gas/testsuite/gas/hppa/unsorted/align3.s
gas/testsuite/gas/hppa/unsorted/align4.s
gas/testsuite/gas/hppa/unsorted/brlenbug.s
gas/testsuite/gas/hppa/unsorted/common.s
gas/testsuite/gas/hppa/unsorted/fragbug.s
gas/testsuite/gas/hppa/unsorted/globalbug.s
gas/testsuite/gas/hppa/unsorted/importbug.s
gas/testsuite/gas/hppa/unsorted/labeldiffs.s
gas/testsuite/gas/hppa/unsorted/locallabel.s
gas/testsuite/gas/hppa/unsorted/ss_align.s
gas/testsuite/gas/hppa/unsorted/unsorted.exp
gas/testsuite/gas/i386/amd.d
gas/testsuite/gas/i386/amd.s
gas/testsuite/gas/i386/float.l
gas/testsuite/gas/i386/float.s
gas/testsuite/gas/i386/general.l
gas/testsuite/gas/i386/general.s
gas/testsuite/gas/i386/i386.exp
gas/testsuite/gas/i386/inval.l
gas/testsuite/gas/i386/inval.s
gas/testsuite/gas/i386/modrm.l
gas/testsuite/gas/i386/modrm.s
gas/testsuite/gas/i386/opcode.d
gas/testsuite/gas/i386/opcode.s
gas/testsuite/gas/i386/prefix.d
gas/testsuite/gas/i386/prefix.s
gas/testsuite/gas/i386/reloc.d
gas/testsuite/gas/i386/reloc.s
gas/testsuite/gas/i386/white.l
gas/testsuite/gas/i386/white.s
gas/testsuite/gas/ieee-fp/x930509a.exp
gas/testsuite/gas/ieee-fp/x930509a.s
gas/testsuite/gas/m32r/allinsn.d
gas/testsuite/gas/m32r/allinsn.exp
gas/testsuite/gas/m32r/allinsn.s
gas/testsuite/gas/m32r/fslot.d
gas/testsuite/gas/m32r/fslot.s
gas/testsuite/gas/m32r/high-1.d
gas/testsuite/gas/m32r/high-1.s
gas/testsuite/gas/m32r/m32r.exp
gas/testsuite/gas/m32r/outofrange.s
gas/testsuite/gas/m32r/relax-1.d
gas/testsuite/gas/m32r/relax-1.s
gas/testsuite/gas/m32r/uppercase.d
gas/testsuite/gas/m32r/uppercase.s
gas/testsuite/gas/m68k-coff/gas.exp
gas/testsuite/gas/m68k-coff/p2389.s
gas/testsuite/gas/m68k-coff/p2389a.s
gas/testsuite/gas/m68k-coff/p2430.s
gas/testsuite/gas/m68k-coff/p2430a.s
gas/testsuite/gas/m68k-coff/t1.s
gas/testsuite/gas/m68k/all.exp
gas/testsuite/gas/m68k/bitfield.d
gas/testsuite/gas/m68k/bitfield.s
gas/testsuite/gas/m68k/cas.d
gas/testsuite/gas/m68k/cas.s
gas/testsuite/gas/m68k/disperr.s
gas/testsuite/gas/m68k/fmoveml.d
gas/testsuite/gas/m68k/fmoveml.s
gas/testsuite/gas/m68k/link.d
gas/testsuite/gas/m68k/link.s
gas/testsuite/gas/m68k/op68000.d
gas/testsuite/gas/m68k/operands.d
gas/testsuite/gas/m68k/operands.s
gas/testsuite/gas/m68k/p2410.s
gas/testsuite/gas/m68k/p2663.s
gas/testsuite/gas/m68k/pcrel.d
gas/testsuite/gas/m68k/pcrel.s
gas/testsuite/gas/m68k/pic1.s
gas/testsuite/gas/m68k/t2.d
gas/testsuite/gas/m68k/t2.s
gas/testsuite/gas/m88k/init.d
gas/testsuite/gas/m88k/init.s
gas/testsuite/gas/m88k/m88k.exp
gas/testsuite/gas/macros/err.s
gas/testsuite/gas/macros/irp.d
gas/testsuite/gas/macros/irp.s
gas/testsuite/gas/macros/macros.exp
gas/testsuite/gas/macros/rept.d
gas/testsuite/gas/macros/rept.s
gas/testsuite/gas/macros/semi.d
gas/testsuite/gas/macros/semi.s
gas/testsuite/gas/macros/test1.d
gas/testsuite/gas/macros/test1.s
gas/testsuite/gas/macros/test2.d
gas/testsuite/gas/macros/test2.s
gas/testsuite/gas/macros/test3.d
gas/testsuite/gas/macros/test3.s
gas/testsuite/gas/mcore/allinsn.d
gas/testsuite/gas/mcore/allinsn.exp
gas/testsuite/gas/mcore/allinsn.s
gas/testsuite/gas/mips/abs.d
gas/testsuite/gas/mips/abs.s
gas/testsuite/gas/mips/add.d
gas/testsuite/gas/mips/add.s
gas/testsuite/gas/mips/and.d
gas/testsuite/gas/mips/and.s
gas/testsuite/gas/mips/beq.d
gas/testsuite/gas/mips/beq.s
gas/testsuite/gas/mips/bge.d
gas/testsuite/gas/mips/bge.s
gas/testsuite/gas/mips/bgeu.d
gas/testsuite/gas/mips/bgeu.s
gas/testsuite/gas/mips/blt.d
gas/testsuite/gas/mips/blt.s
gas/testsuite/gas/mips/bltu.d
gas/testsuite/gas/mips/bltu.s
gas/testsuite/gas/mips/break20.d
gas/testsuite/gas/mips/break20.s
gas/testsuite/gas/mips/delay.d
gas/testsuite/gas/mips/delay.s
gas/testsuite/gas/mips/div-ilocks.d
gas/testsuite/gas/mips/div.d
gas/testsuite/gas/mips/div.s
gas/testsuite/gas/mips/dli.d
gas/testsuite/gas/mips/dli.s
gas/testsuite/gas/mips/elf_e_flags.c
gas/testsuite/gas/mips/elf_e_flags.s
gas/testsuite/gas/mips/elf_e_flags1.d
gas/testsuite/gas/mips/elf_e_flags2.d
gas/testsuite/gas/mips/elf_e_flags3.d
gas/testsuite/gas/mips/elf_e_flags4.d
gas/testsuite/gas/mips/itbl
gas/testsuite/gas/mips/itbl.s
gas/testsuite/gas/mips/jal-empic.d
gas/testsuite/gas/mips/jal-svr4pic.d
gas/testsuite/gas/mips/jal-svr4pic.s
gas/testsuite/gas/mips/jal-xgot.d
gas/testsuite/gas/mips/jal.d
gas/testsuite/gas/mips/jal.s
gas/testsuite/gas/mips/la-empic.d
gas/testsuite/gas/mips/la-empic.s
gas/testsuite/gas/mips/la-svr4pic.d
gas/testsuite/gas/mips/la-xgot.d
gas/testsuite/gas/mips/la.d
gas/testsuite/gas/mips/la.s
gas/testsuite/gas/mips/lb-empic.d
gas/testsuite/gas/mips/lb-pic.s
gas/testsuite/gas/mips/lb-svr4pic.d
gas/testsuite/gas/mips/lb-xgot-ilocks.d
gas/testsuite/gas/mips/lb-xgot.d
gas/testsuite/gas/mips/lb.d
gas/testsuite/gas/mips/lb.s
gas/testsuite/gas/mips/ld-empic.d
gas/testsuite/gas/mips/ld-ilocks-addr32.d
gas/testsuite/gas/mips/ld-ilocks.d
gas/testsuite/gas/mips/ld-pic.s
gas/testsuite/gas/mips/ld-svr4pic.d
gas/testsuite/gas/mips/ld-xgot.d
gas/testsuite/gas/mips/ld.d
gas/testsuite/gas/mips/ld.s
gas/testsuite/gas/mips/li.d
gas/testsuite/gas/mips/li.s
gas/testsuite/gas/mips/lif-empic.d
gas/testsuite/gas/mips/lif-svr4pic.d
gas/testsuite/gas/mips/lif-xgot.d
gas/testsuite/gas/mips/lifloat.d
gas/testsuite/gas/mips/lifloat.s
gas/testsuite/gas/mips/lineno.d
gas/testsuite/gas/mips/lineno.s
gas/testsuite/gas/mips/mips.exp
gas/testsuite/gas/mips/mips16.d
gas/testsuite/gas/mips/mips16.s
gas/testsuite/gas/mips/mips4.d
gas/testsuite/gas/mips/mips4.s
gas/testsuite/gas/mips/mips4010.d
gas/testsuite/gas/mips/mips4010.s
gas/testsuite/gas/mips/mips4100.d
gas/testsuite/gas/mips/mips4100.s
gas/testsuite/gas/mips/mips4650.d
gas/testsuite/gas/mips/mips4650.s
gas/testsuite/gas/mips/mul-ilocks.d
gas/testsuite/gas/mips/mul.d
gas/testsuite/gas/mips/mul.s
gas/testsuite/gas/mips/nodelay.d
gas/testsuite/gas/mips/rol.d
gas/testsuite/gas/mips/rol.s
gas/testsuite/gas/mips/sb.d
gas/testsuite/gas/mips/sb.s
gas/testsuite/gas/mips/sync.d
gas/testsuite/gas/mips/sync.s
gas/testsuite/gas/mips/trap20.d
gas/testsuite/gas/mips/trap20.s
gas/testsuite/gas/mips/trunc.d
gas/testsuite/gas/mips/trunc.s
gas/testsuite/gas/mips/uld.d
gas/testsuite/gas/mips/uld.s
gas/testsuite/gas/mips/ulh-empic.d
gas/testsuite/gas/mips/ulh-pic.s
gas/testsuite/gas/mips/ulh-svr4pic.d
gas/testsuite/gas/mips/ulh-xgot.d
gas/testsuite/gas/mips/ulh.d
gas/testsuite/gas/mips/ulh.s
gas/testsuite/gas/mips/ulw.d
gas/testsuite/gas/mips/ulw.s
gas/testsuite/gas/mips/usd.d
gas/testsuite/gas/mips/usd.s
gas/testsuite/gas/mips/ush.d
gas/testsuite/gas/mips/ush.s
gas/testsuite/gas/mips/usw.d
gas/testsuite/gas/mips/usw.s
gas/testsuite/gas/mn10200/add.s
gas/testsuite/gas/mn10200/basic.exp
gas/testsuite/gas/mn10200/bcc.s
gas/testsuite/gas/mn10200/bccx.s
gas/testsuite/gas/mn10200/bit.s
gas/testsuite/gas/mn10200/cmp.s
gas/testsuite/gas/mn10200/ext.s
gas/testsuite/gas/mn10200/logical.s
gas/testsuite/gas/mn10200/mov1.s
gas/testsuite/gas/mn10200/mov2.s
gas/testsuite/gas/mn10200/mov3.s
gas/testsuite/gas/mn10200/mov4.s
gas/testsuite/gas/mn10200/movb.s
gas/testsuite/gas/mn10200/movbu.s
gas/testsuite/gas/mn10200/movx.s
gas/testsuite/gas/mn10200/muldiv.s
gas/testsuite/gas/mn10200/other.s
gas/testsuite/gas/mn10200/shift.s
gas/testsuite/gas/mn10200/sub.s
gas/testsuite/gas/mn10300/add.s
gas/testsuite/gas/mn10300/basic.exp
gas/testsuite/gas/mn10300/bcc.s
gas/testsuite/gas/mn10300/bit.s
gas/testsuite/gas/mn10300/cmp.s
gas/testsuite/gas/mn10300/ext.s
gas/testsuite/gas/mn10300/extend.s
gas/testsuite/gas/mn10300/logical.s
gas/testsuite/gas/mn10300/loop.s
gas/testsuite/gas/mn10300/mov1.s
gas/testsuite/gas/mn10300/mov2.s
gas/testsuite/gas/mn10300/mov3.s
gas/testsuite/gas/mn10300/mov4.s
gas/testsuite/gas/mn10300/movbu.s
gas/testsuite/gas/mn10300/movhu.s
gas/testsuite/gas/mn10300/movm.s
gas/testsuite/gas/mn10300/muldiv.s
gas/testsuite/gas/mn10300/other.s
gas/testsuite/gas/mn10300/shift.s
gas/testsuite/gas/mn10300/sub.s
gas/testsuite/gas/mn10300/udf.s
gas/testsuite/gas/mri/char.d
gas/testsuite/gas/mri/char.s
gas/testsuite/gas/mri/comment.d
gas/testsuite/gas/mri/comment.s
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install-sh
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ld/emultempl/README
ld/emultempl/aix.em
ld/emultempl/armcoff.em
ld/emultempl/armelf.em
ld/emultempl/armelf_oabi.em
ld/emultempl/beos.em
ld/emultempl/elf32.em
ld/emultempl/generic.em
ld/emultempl/gld960.em
ld/emultempl/gld960c.em
ld/emultempl/hppaelf.em
ld/emultempl/linux.em
ld/emultempl/lnk960.em
ld/emultempl/mipsecoff.em
ld/emultempl/pe.em
ld/emultempl/stringify.sed
ld/emultempl/sunos.em
ld/emultempl/vanilla.em
ld/gen-doc.texi
ld/genscripts.sh
ld/h8-doc.texi
ld/ld.1
ld/ld.h
ld/ld.texinfo
ld/ldcref.c
ld/ldctor.c
ld/ldctor.h
ld/ldemul.c
ld/ldemul.h
ld/ldexp.c
ld/ldexp.h
ld/ldfile.c
ld/ldfile.h
ld/ldgram.y
ld/ldint.texinfo
ld/ldlang.c
ld/ldlang.h
ld/ldlex.h
ld/ldlex.l
ld/ldmain.c
ld/ldmain.h
ld/ldmisc.c
ld/ldmisc.h
ld/ldver.c
ld/ldver.h
ld/ldwrite.c
ld/ldwrite.h
ld/lexsup.c
ld/mac-ld.r
ld/mpw-config.in
ld/mpw-elfmips.c
ld/mpw-eppcmac.c
ld/mpw-esh.c
ld/mpw-idtmips.c
ld/mpw-make.sed
ld/mri.c
ld/mri.h
ld/pe-dll.c
ld/po/Make-in
ld/po/POTFILES.in
ld/po/ld.pot
ld/scripttempl/README
ld/scripttempl/a29k.sc
ld/scripttempl/aix.sc
ld/scripttempl/alpha.sc
ld/scripttempl/aout.sc
ld/scripttempl/armaout.sc
ld/scripttempl/armcoff.sc
ld/scripttempl/delta68.sc
ld/scripttempl/ebmon29k.sc
ld/scripttempl/elf.sc
ld/scripttempl/elfd10v.sc
ld/scripttempl/elfd30v.sc
ld/scripttempl/elfppc.sc
ld/scripttempl/go32coff.sc
ld/scripttempl/h8300.sc
ld/scripttempl/h8300h.sc
ld/scripttempl/h8300s.sc
ld/scripttempl/h8500.sc
ld/scripttempl/h8500b.sc
ld/scripttempl/h8500c.sc
ld/scripttempl/h8500m.sc
ld/scripttempl/h8500s.sc
ld/scripttempl/hppaelf.sc
ld/scripttempl/i386beos.sc
ld/scripttempl/i386coff.sc
ld/scripttempl/i386go32.sc
ld/scripttempl/i386lynx.sc
ld/scripttempl/i386msdos.sc
ld/scripttempl/i960.sc
ld/scripttempl/m68kaux.sc
ld/scripttempl/m68kcoff.sc
ld/scripttempl/m68klynx.sc
ld/scripttempl/m88kbcs.sc
ld/scripttempl/mcorepe.sc
ld/scripttempl/mips.sc
ld/scripttempl/mipsbsd.sc
ld/scripttempl/nw.sc
ld/scripttempl/pe.sc
ld/scripttempl/ppcpe.sc
ld/scripttempl/psos.sc
ld/scripttempl/riscix.sc
ld/scripttempl/sa29200.sc
ld/scripttempl/sh.sc
ld/scripttempl/sparccoff.sc
ld/scripttempl/sparclynx.sc
ld/scripttempl/st2000.sc
ld/scripttempl/tic30aout.sc
ld/scripttempl/tic30coff.sc
ld/scripttempl/tic80coff.sc
ld/scripttempl/v850.sc
ld/scripttempl/vanilla.sc
ld/scripttempl/w65.sc
ld/scripttempl/z8000.sc
ld/stamp-h.in
ld/sysdep.h
ld/testsuite/ChangeLog
ld/testsuite/config/default.exp
ld/testsuite/ld-bootstrap/bootstrap.exp
ld/testsuite/ld-cdtest/cdtest-bar.cc
ld/testsuite/ld-cdtest/cdtest-foo.cc
ld/testsuite/ld-cdtest/cdtest-foo.h
ld/testsuite/ld-cdtest/cdtest-main.cc
ld/testsuite/ld-cdtest/cdtest.dat
ld/testsuite/ld-cdtest/cdtest.exp
ld/testsuite/ld-checks/asm.s
ld/testsuite/ld-checks/checks.exp
ld/testsuite/ld-checks/script
ld/testsuite/ld-elfvers/vers.exp
ld/testsuite/ld-elfvers/vers1.c
ld/testsuite/ld-elfvers/vers1.dsym
ld/testsuite/ld-elfvers/vers1.map
ld/testsuite/ld-elfvers/vers1.sym
ld/testsuite/ld-elfvers/vers1.ver
ld/testsuite/ld-elfvers/vers13.asym
ld/testsuite/ld-elfvers/vers15.c
ld/testsuite/ld-elfvers/vers15.dsym
ld/testsuite/ld-elfvers/vers15.sym
ld/testsuite/ld-elfvers/vers15.ver
ld/testsuite/ld-elfvers/vers16.c
ld/testsuite/ld-elfvers/vers16.dsym
ld/testsuite/ld-elfvers/vers16.map
ld/testsuite/ld-elfvers/vers16a.c
ld/testsuite/ld-elfvers/vers16a.dsym
ld/testsuite/ld-elfvers/vers16a.ver
ld/testsuite/ld-elfvers/vers2.c
ld/testsuite/ld-elfvers/vers2.dsym
ld/testsuite/ld-elfvers/vers2.map
ld/testsuite/ld-elfvers/vers2.ver
ld/testsuite/ld-elfvers/vers3.c
ld/testsuite/ld-elfvers/vers3.dsym
ld/testsuite/ld-elfvers/vers3.ver
ld/testsuite/ld-elfvers/vers4.c
ld/testsuite/ld-elfvers/vers4.sym
ld/testsuite/ld-elfvers/vers4a.dsym
ld/testsuite/ld-elfvers/vers4a.sym
ld/testsuite/ld-elfvers/vers4a.ver
ld/testsuite/ld-elfvers/vers5.c
ld/testsuite/ld-elfvers/vers6.c
ld/testsuite/ld-elfvers/vers6.dsym
ld/testsuite/ld-elfvers/vers6.sym
ld/testsuite/ld-elfvers/vers6.ver
ld/testsuite/ld-elfvers/vers7.c
ld/testsuite/ld-elfvers/vers7.map
ld/testsuite/ld-elfvers/vers7a.c
ld/testsuite/ld-elfvers/vers7a.dsym
ld/testsuite/ld-elfvers/vers7a.sym
ld/testsuite/ld-elfvers/vers7a.ver
ld/testsuite/ld-elfvers/vers8.c
ld/testsuite/ld-elfvers/vers8.map
ld/testsuite/ld-elfvers/vers8.ver
ld/testsuite/ld-elfvers/vers9.c
ld/testsuite/ld-elfvers/vers9.dsym
ld/testsuite/ld-elfvers/vers9.sym
ld/testsuite/ld-elfvers/vers9.ver
ld/testsuite/ld-empic/empic.exp
ld/testsuite/ld-empic/relax.t
ld/testsuite/ld-empic/relax1.c
ld/testsuite/ld-empic/relax2.c
ld/testsuite/ld-empic/relax3.c
ld/testsuite/ld-empic/relax4.c
ld/testsuite/ld-empic/run.c
ld/testsuite/ld-empic/runtest1.c
ld/testsuite/ld-empic/runtest2.c
ld/testsuite/ld-empic/runtesti.s
ld/testsuite/ld-scripts/cross1.c
ld/testsuite/ld-scripts/cross1.t
ld/testsuite/ld-scripts/cross2.c
ld/testsuite/ld-scripts/cross2.t
ld/testsuite/ld-scripts/cross3.c
ld/testsuite/ld-scripts/crossref.exp
ld/testsuite/ld-scripts/defined.exp
ld/testsuite/ld-scripts/defined.s
ld/testsuite/ld-scripts/defined.t
ld/testsuite/ld-scripts/phdrs.exp
ld/testsuite/ld-scripts/phdrs.s
ld/testsuite/ld-scripts/phdrs.t
ld/testsuite/ld-scripts/script.exp
ld/testsuite/ld-scripts/script.s
ld/testsuite/ld-scripts/script.t
ld/testsuite/ld-scripts/scriptm.t
ld/testsuite/ld-scripts/sizeof.exp
ld/testsuite/ld-scripts/sizeof.s
ld/testsuite/ld-scripts/sizeof.t
ld/testsuite/ld-scripts/weak.exp
ld/testsuite/ld-scripts/weak.t
ld/testsuite/ld-scripts/weak1.s
ld/testsuite/ld-scripts/weak2.s
ld/testsuite/ld-selective/1.c
ld/testsuite/ld-selective/2.c
ld/testsuite/ld-selective/3.cc
ld/testsuite/ld-selective/4.cc
ld/testsuite/ld-selective/5.cc
ld/testsuite/ld-selective/selective.exp
ld/testsuite/ld-sh/sh.exp
ld/testsuite/ld-sh/sh1.s
ld/testsuite/ld-sh/sh2.c
ld/testsuite/ld-sh/start.s
ld/testsuite/ld-shared/elf-offset.ld
ld/testsuite/ld-shared/main.c
ld/testsuite/ld-shared/sh1.c
ld/testsuite/ld-shared/sh2.c
ld/testsuite/ld-shared/shared.dat
ld/testsuite/ld-shared/shared.exp
ld/testsuite/ld-shared/sun4.dat
ld/testsuite/ld-shared/xcoff.dat
ld/testsuite/ld-srec/sr1.c
ld/testsuite/ld-srec/sr2.c
ld/testsuite/ld-srec/sr3.cc
ld/testsuite/ld-srec/srec.exp
ld/testsuite/ld-undefined/undefined.c
ld/testsuite/ld-undefined/undefined.exp
ld/testsuite/ld-versados/t1-1.ro
ld/testsuite/ld-versados/t1-2.ro
ld/testsuite/ld-versados/t1.ld
ld/testsuite/ld-versados/t1.ook
ld/testsuite/ld-versados/t2-1.ro
ld/testsuite/ld-versados/t2-2.ro
ld/testsuite/ld-versados/t2-3.ro
ld/testsuite/ld-versados/t2.ld
ld/testsuite/ld-versados/t2.ook
ld/testsuite/ld-versados/versados.exp
ld/testsuite/lib/ld-lib.exp
ltconfig
ltmain.sh
makeall.bat
makefile.vms
missing
mkinstalldirs
move-if-change
mpw-README
mpw-build.in
mpw-config.in
mpw-configure
mpw-install
opcodes/ChangeLog
opcodes/Makefile.am
opcodes/Makefile.in
opcodes/a29k-dis.c
opcodes/acinclude.m4
opcodes/aclocal.m4
opcodes/alpha-dis.c
opcodes/alpha-opc.c
opcodes/arc-dis.c
opcodes/arc-opc.c
opcodes/arm-dis.c
opcodes/arm-opc.h
opcodes/cgen-asm.c
opcodes/cgen-dis.c
opcodes/cgen-opc.c
opcodes/config.in
opcodes/configure
opcodes/configure.bat
opcodes/configure.in
opcodes/d10v-dis.c
opcodes/d10v-opc.c
opcodes/d30v-dis.c
opcodes/d30v-opc.c
opcodes/dep-in.sed
opcodes/dis-buf.c
opcodes/disassemble.c
opcodes/fr30-asm.c
opcodes/fr30-desc.c
opcodes/fr30-desc.h
opcodes/fr30-dis.c
opcodes/fr30-ibld.c
opcodes/fr30-opc.c
opcodes/fr30-opc.h
opcodes/h8300-dis.c
opcodes/h8500-dis.c
opcodes/h8500-opc.h
opcodes/hppa-dis.c
opcodes/i386-dis.c
opcodes/i960-dis.c
opcodes/m10200-dis.c
opcodes/m10200-opc.c
opcodes/m10300-dis.c
opcodes/m10300-opc.c
opcodes/m32r-asm.c
opcodes/m32r-desc.c
opcodes/m32r-desc.h
opcodes/m32r-dis.c
opcodes/m32r-ibld.c
opcodes/m32r-opc.c
opcodes/m32r-opc.h
opcodes/m32r-opinst.c
opcodes/m68k-dis.c
opcodes/m68k-opc.c
opcodes/m88k-dis.c
opcodes/makefile.vms
opcodes/mcore-dis.c
opcodes/mcore-opc.h
opcodes/mips-dis.c
opcodes/mips-opc.c
opcodes/mips16-opc.c
opcodes/mpw-config.in
opcodes/mpw-make.sed
opcodes/ns32k-dis.c
opcodes/opintl.h
opcodes/po/Make-in
opcodes/po/POTFILES.in
opcodes/po/opcodes.pot
opcodes/ppc-dis.c
opcodes/ppc-opc.c
opcodes/sh-dis.c
opcodes/sh-opc.h
opcodes/sparc-dis.c
opcodes/sparc-opc.c
opcodes/stamp-h.in
opcodes/sysdep.h
opcodes/tic30-dis.c
opcodes/tic80-dis.c
opcodes/tic80-opc.c
opcodes/v850-dis.c
opcodes/v850-opc.c
opcodes/vax-dis.c
opcodes/w65-dis.c
opcodes/w65-opc.h
opcodes/z8k-dis.c
opcodes/z8k-opc.h
opcodes/z8kgen.c
setup.com
symlink-tree
ylwrap
Diffstat (limited to 'bfd/coff-sh.c')
-rw-r--r-- | bfd/coff-sh.c | 2959 |
1 files changed, 0 insertions, 2959 deletions
diff --git a/bfd/coff-sh.c b/bfd/coff-sh.c deleted file mode 100644 index e3d6eec00d9..00000000000 --- a/bfd/coff-sh.c +++ /dev/null @@ -1,2959 +0,0 @@ -/* BFD back-end for Hitachi Super-H COFF binaries. - Copyright 1993, 94, 95, 96, 97, 1998 Free Software Foundation, Inc. - Contributed by Cygnus Support. - Written by Steve Chamberlain, <sac@cygnus.com>. - Relaxing code written by Ian Lance Taylor, <ian@cygnus.com>. - -This file is part of BFD, the Binary File Descriptor library. - -This program is free software; you can redistribute it and/or modify -it under the terms of the GNU General Public License as published by -the Free Software Foundation; either version 2 of the License, or -(at your option) any later version. - -This program is distributed in the hope that it will be useful, -but WITHOUT ANY WARRANTY; without even the implied warranty of -MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -GNU General Public License for more details. - -You should have received a copy of the GNU General Public License -along with this program; if not, write to the Free Software -Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ - -#include "bfd.h" -#include "sysdep.h" -#include "libbfd.h" -#include "bfdlink.h" -#include "coff/sh.h" -#include "coff/internal.h" -#include "libcoff.h" - -/* Internal functions. */ -static bfd_reloc_status_type sh_reloc - PARAMS ((bfd *, arelent *, asymbol *, PTR, asection *, bfd *, char **)); -static long get_symbol_value PARAMS ((asymbol *)); -static boolean sh_merge_private_data PARAMS ((bfd *, bfd *)); -static boolean sh_relax_section - PARAMS ((bfd *, asection *, struct bfd_link_info *, boolean *)); -static boolean sh_relax_delete_bytes - PARAMS ((bfd *, asection *, bfd_vma, int)); -static const struct sh_opcode *sh_insn_info PARAMS ((unsigned int)); -static boolean sh_align_loads - PARAMS ((bfd *, asection *, struct internal_reloc *, bfd_byte *, boolean *)); -static boolean sh_swap_insns - PARAMS ((bfd *, asection *, PTR, bfd_byte *, bfd_vma)); -static boolean sh_relocate_section - PARAMS ((bfd *, struct bfd_link_info *, bfd *, asection *, bfd_byte *, - struct internal_reloc *, struct internal_syment *, asection **)); -static bfd_byte *sh_coff_get_relocated_section_contents - PARAMS ((bfd *, struct bfd_link_info *, struct bfd_link_order *, - bfd_byte *, boolean, asymbol **)); - -/* Default section alignment to 2**4. */ -#define COFF_DEFAULT_SECTION_ALIGNMENT_POWER (4) - -/* Generate long file names. */ -#define COFF_LONG_FILENAMES - -/* The supported relocations. There are a lot of relocations defined - in coff/internal.h which we do not expect to ever see. */ -static reloc_howto_type sh_coff_howtos[] = -{ - { 0 }, - { 1 }, - { 2 }, - { 3 }, /* R_SH_PCREL8 */ - { 4 }, /* R_SH_PCREL16 */ - { 5 }, /* R_SH_HIGH8 */ - { 6 }, /* R_SH_IMM24 */ - { 7 }, /* R_SH_LOW16 */ - { 8 }, - { 9 }, /* R_SH_PCDISP8BY4 */ - - HOWTO (R_SH_PCDISP8BY2, /* type */ - 1, /* rightshift */ - 1, /* size (0 = byte, 1 = short, 2 = long) */ - 8, /* bitsize */ - true, /* pc_relative */ - 0, /* bitpos */ - complain_overflow_signed, /* complain_on_overflow */ - sh_reloc, /* special_function */ - "r_pcdisp8by2", /* name */ - true, /* partial_inplace */ - 0xff, /* src_mask */ - 0xff, /* dst_mask */ - true), /* pcrel_offset */ - - { 11 }, /* R_SH_PCDISP8 */ - - HOWTO (R_SH_PCDISP, /* type */ - 1, /* rightshift */ - 1, /* size (0 = byte, 1 = short, 2 = long) */ - 12, /* bitsize */ - true, /* pc_relative */ - 0, /* bitpos */ - complain_overflow_signed, /* complain_on_overflow */ - sh_reloc, /* special_function */ - "r_pcdisp12by2", /* name */ - true, /* partial_inplace */ - 0xfff, /* src_mask */ - 0xfff, /* dst_mask */ - true), /* pcrel_offset */ - - { 13 }, - - HOWTO (R_SH_IMM32, /* type */ - 0, /* rightshift */ - 2, /* size (0 = byte, 1 = short, 2 = long) */ - 32, /* bitsize */ - false, /* pc_relative */ - 0, /* bitpos */ - complain_overflow_bitfield, /* complain_on_overflow */ - sh_reloc, /* special_function */ - "r_imm32", /* name */ - true, /* partial_inplace */ - 0xffffffff, /* src_mask */ - 0xffffffff, /* dst_mask */ - false), /* pcrel_offset */ - - { 15 }, - { 16 }, /* R_SH_IMM8 */ - { 17 }, /* R_SH_IMM8BY2 */ - { 18 }, /* R_SH_IMM8BY4 */ - { 19 }, /* R_SH_IMM4 */ - { 20 }, /* R_SH_IMM4BY2 */ - { 21 }, /* R_SH_IMM4BY4 */ - - HOWTO (R_SH_PCRELIMM8BY2, /* type */ - 1, /* rightshift */ - 1, /* size (0 = byte, 1 = short, 2 = long) */ - 8, /* bitsize */ - true, /* pc_relative */ - 0, /* bitpos */ - complain_overflow_unsigned, /* complain_on_overflow */ - sh_reloc, /* special_function */ - "r_pcrelimm8by2", /* name */ - true, /* partial_inplace */ - 0xff, /* src_mask */ - 0xff, /* dst_mask */ - true), /* pcrel_offset */ - - HOWTO (R_SH_PCRELIMM8BY4, /* type */ - 2, /* rightshift */ - 1, /* size (0 = byte, 1 = short, 2 = long) */ - 8, /* bitsize */ - true, /* pc_relative */ - 0, /* bitpos */ - complain_overflow_unsigned, /* complain_on_overflow */ - sh_reloc, /* special_function */ - "r_pcrelimm8by4", /* name */ - true, /* partial_inplace */ - 0xff, /* src_mask */ - 0xff, /* dst_mask */ - true), /* pcrel_offset */ - - HOWTO (R_SH_IMM16, /* type */ - 0, /* rightshift */ - 1, /* size (0 = byte, 1 = short, 2 = long) */ - 16, /* bitsize */ - false, /* pc_relative */ - 0, /* bitpos */ - complain_overflow_bitfield, /* complain_on_overflow */ - sh_reloc, /* special_function */ - "r_imm16", /* name */ - true, /* partial_inplace */ - 0xffff, /* src_mask */ - 0xffff, /* dst_mask */ - false), /* pcrel_offset */ - - HOWTO (R_SH_SWITCH16, /* type */ - 0, /* rightshift */ - 1, /* size (0 = byte, 1 = short, 2 = long) */ - 16, /* bitsize */ - false, /* pc_relative */ - 0, /* bitpos */ - complain_overflow_bitfield, /* complain_on_overflow */ - sh_reloc, /* special_function */ - "r_switch16", /* name */ - true, /* partial_inplace */ - 0xffff, /* src_mask */ - 0xffff, /* dst_mask */ - false), /* pcrel_offset */ - - HOWTO (R_SH_SWITCH32, /* type */ - 0, /* rightshift */ - 2, /* size (0 = byte, 1 = short, 2 = long) */ - 32, /* bitsize */ - false, /* pc_relative */ - 0, /* bitpos */ - complain_overflow_bitfield, /* complain_on_overflow */ - sh_reloc, /* special_function */ - "r_switch32", /* name */ - true, /* partial_inplace */ - 0xffffffff, /* src_mask */ - 0xffffffff, /* dst_mask */ - false), /* pcrel_offset */ - - HOWTO (R_SH_USES, /* type */ - 0, /* rightshift */ - 1, /* size (0 = byte, 1 = short, 2 = long) */ - 16, /* bitsize */ - false, /* pc_relative */ - 0, /* bitpos */ - complain_overflow_bitfield, /* complain_on_overflow */ - sh_reloc, /* special_function */ - "r_uses", /* name */ - true, /* partial_inplace */ - 0xffff, /* src_mask */ - 0xffff, /* dst_mask */ - false), /* pcrel_offset */ - - HOWTO (R_SH_COUNT, /* type */ - 0, /* rightshift */ - 2, /* size (0 = byte, 1 = short, 2 = long) */ - 32, /* bitsize */ - false, /* pc_relative */ - 0, /* bitpos */ - complain_overflow_bitfield, /* complain_on_overflow */ - sh_reloc, /* special_function */ - "r_count", /* name */ - true, /* partial_inplace */ - 0xffffffff, /* src_mask */ - 0xffffffff, /* dst_mask */ - false), /* pcrel_offset */ - - HOWTO (R_SH_ALIGN, /* type */ - 0, /* rightshift */ - 2, /* size (0 = byte, 1 = short, 2 = long) */ - 32, /* bitsize */ - false, /* pc_relative */ - 0, /* bitpos */ - complain_overflow_bitfield, /* complain_on_overflow */ - sh_reloc, /* special_function */ - "r_align", /* name */ - true, /* partial_inplace */ - 0xffffffff, /* src_mask */ - 0xffffffff, /* dst_mask */ - false), /* pcrel_offset */ - - HOWTO (R_SH_CODE, /* type */ - 0, /* rightshift */ - 2, /* size (0 = byte, 1 = short, 2 = long) */ - 32, /* bitsize */ - false, /* pc_relative */ - 0, /* bitpos */ - complain_overflow_bitfield, /* complain_on_overflow */ - sh_reloc, /* special_function */ - "r_code", /* name */ - true, /* partial_inplace */ - 0xffffffff, /* src_mask */ - 0xffffffff, /* dst_mask */ - false), /* pcrel_offset */ - - HOWTO (R_SH_DATA, /* type */ - 0, /* rightshift */ - 2, /* size (0 = byte, 1 = short, 2 = long) */ - 32, /* bitsize */ - false, /* pc_relative */ - 0, /* bitpos */ - complain_overflow_bitfield, /* complain_on_overflow */ - sh_reloc, /* special_function */ - "r_data", /* name */ - true, /* partial_inplace */ - 0xffffffff, /* src_mask */ - 0xffffffff, /* dst_mask */ - false), /* pcrel_offset */ - - HOWTO (R_SH_LABEL, /* type */ - 0, /* rightshift */ - 2, /* size (0 = byte, 1 = short, 2 = long) */ - 32, /* bitsize */ - false, /* pc_relative */ - 0, /* bitpos */ - complain_overflow_bitfield, /* complain_on_overflow */ - sh_reloc, /* special_function */ - "r_label", /* name */ - true, /* partial_inplace */ - 0xffffffff, /* src_mask */ - 0xffffffff, /* dst_mask */ - false), /* pcrel_offset */ - - HOWTO (R_SH_SWITCH8, /* type */ - 0, /* rightshift */ - 0, /* size (0 = byte, 1 = short, 2 = long) */ - 8, /* bitsize */ - false, /* pc_relative */ - 0, /* bitpos */ - complain_overflow_bitfield, /* complain_on_overflow */ - sh_reloc, /* special_function */ - "r_switch8", /* name */ - true, /* partial_inplace */ - 0xff, /* src_mask */ - 0xff, /* dst_mask */ - false) /* pcrel_offset */ -}; - -#define SH_COFF_HOWTO_COUNT (sizeof sh_coff_howtos / sizeof sh_coff_howtos[0]) - -/* Check for a bad magic number. */ -#define BADMAG(x) SHBADMAG(x) - -/* Customize coffcode.h (this is not currently used). */ -#define SH 1 - -/* FIXME: This should not be set here. */ -#define __A_MAGIC_SET__ - -/* Swap the r_offset field in and out. */ -#define SWAP_IN_RELOC_OFFSET bfd_h_get_32 -#define SWAP_OUT_RELOC_OFFSET bfd_h_put_32 - -/* Swap out extra information in the reloc structure. */ -#define SWAP_OUT_RELOC_EXTRA(abfd, src, dst) \ - do \ - { \ - dst->r_stuff[0] = 'S'; \ - dst->r_stuff[1] = 'C'; \ - } \ - while (0) - -/* Get the value of a symbol, when performing a relocation. */ - -static long -get_symbol_value (symbol) - asymbol *symbol; -{ - bfd_vma relocation; - - if (bfd_is_com_section (symbol->section)) - relocation = 0; - else - relocation = (symbol->value + - symbol->section->output_section->vma + - symbol->section->output_offset); - - return relocation; -} - -/* This macro is used in coffcode.h to get the howto corresponding to - an internal reloc. */ - -#define RTYPE2HOWTO(relent, internal) \ - ((relent)->howto = \ - ((internal)->r_type < SH_COFF_HOWTO_COUNT \ - ? &sh_coff_howtos[(internal)->r_type] \ - : (reloc_howto_type *) NULL)) - -/* This is the same as the macro in coffcode.h, except that it copies - r_offset into reloc_entry->addend for some relocs. */ -#define CALC_ADDEND(abfd, ptr, reloc, cache_ptr) \ - { \ - coff_symbol_type *coffsym = (coff_symbol_type *) NULL; \ - if (ptr && bfd_asymbol_bfd (ptr) != abfd) \ - coffsym = (obj_symbols (abfd) \ - + (cache_ptr->sym_ptr_ptr - symbols)); \ - else if (ptr) \ - coffsym = coff_symbol_from (abfd, ptr); \ - if (coffsym != (coff_symbol_type *) NULL \ - && coffsym->native->u.syment.n_scnum == 0) \ - cache_ptr->addend = 0; \ - else if (ptr && bfd_asymbol_bfd (ptr) == abfd \ - && ptr->section != (asection *) NULL) \ - cache_ptr->addend = - (ptr->section->vma + ptr->value); \ - else \ - cache_ptr->addend = 0; \ - if ((reloc).r_type == R_SH_SWITCH8 \ - || (reloc).r_type == R_SH_SWITCH16 \ - || (reloc).r_type == R_SH_SWITCH32 \ - || (reloc).r_type == R_SH_USES \ - || (reloc).r_type == R_SH_COUNT \ - || (reloc).r_type == R_SH_ALIGN) \ - cache_ptr->addend = (reloc).r_offset; \ - } - -/* This is the howto function for the SH relocations. */ - -static bfd_reloc_status_type -sh_reloc (abfd, reloc_entry, symbol_in, data, input_section, output_bfd, - error_message) - bfd *abfd; - arelent *reloc_entry; - asymbol *symbol_in; - PTR data; - asection *input_section; - bfd *output_bfd; - char **error_message; -{ - unsigned long insn; - bfd_vma sym_value; - unsigned short r_type; - bfd_vma addr = reloc_entry->address; - bfd_byte *hit_data = addr + (bfd_byte *) data; - - r_type = reloc_entry->howto->type; - - if (output_bfd != NULL) - { - /* Partial linking--do nothing. */ - reloc_entry->address += input_section->output_offset; - return bfd_reloc_ok; - } - - /* Almost all relocs have to do with relaxing. If any work must be - done for them, it has been done in sh_relax_section. */ - if (r_type != R_SH_IMM32 - && (r_type != R_SH_PCDISP - || (symbol_in->flags & BSF_LOCAL) != 0)) - return bfd_reloc_ok; - - if (symbol_in != NULL - && bfd_is_und_section (symbol_in->section)) - return bfd_reloc_undefined; - - sym_value = get_symbol_value (symbol_in); - - switch (r_type) - { - case R_SH_IMM32: - insn = bfd_get_32 (abfd, hit_data); - insn += sym_value + reloc_entry->addend; - bfd_put_32 (abfd, insn, hit_data); - break; - case R_SH_PCDISP: - insn = bfd_get_16 (abfd, hit_data); - sym_value += reloc_entry->addend; - sym_value -= (input_section->output_section->vma - + input_section->output_offset - + addr - + 4); - sym_value += (insn & 0xfff) << 1; - if (insn & 0x800) - sym_value -= 0x1000; - insn = (insn & 0xf000) | (sym_value & 0xfff); - bfd_put_16 (abfd, insn, hit_data); - if (sym_value < (bfd_vma) -0x1000 || sym_value >= 0x1000) - return bfd_reloc_overflow; - break; - default: - abort (); - break; - } - - return bfd_reloc_ok; -} - -/* This routine checks for linking big and little endian objects - together. */ - -static boolean -sh_merge_private_data (ibfd, obfd) - bfd *ibfd; - bfd *obfd; -{ - if (ibfd->xvec->byteorder != obfd->xvec->byteorder - && obfd->xvec->byteorder != BFD_ENDIAN_UNKNOWN) - { - (*_bfd_error_handler) - ("%s: compiled for a %s endian system and target is %s endian", - bfd_get_filename (ibfd), - bfd_big_endian (ibfd) ? "big" : "little", - bfd_big_endian (obfd) ? "big" : "little"); - - bfd_set_error (bfd_error_wrong_format); - return false; - } - - return true; -} - -#define coff_bfd_merge_private_bfd_data sh_merge_private_data - -/* We can do relaxing. */ -#define coff_bfd_relax_section sh_relax_section - -/* We use the special COFF backend linker. */ -#define coff_relocate_section sh_relocate_section - -/* When relaxing, we need to use special code to get the relocated - section contents. */ -#define coff_bfd_get_relocated_section_contents \ - sh_coff_get_relocated_section_contents - -#include "coffcode.h" - -/* This function handles relaxing on the SH. - - Function calls on the SH look like this: - - movl L1,r0 - ... - jsr @r0 - ... - L1: - .long function - - The compiler and assembler will cooperate to create R_SH_USES - relocs on the jsr instructions. The r_offset field of the - R_SH_USES reloc is the PC relative offset to the instruction which - loads the register (the r_offset field is computed as though it - were a jump instruction, so the offset value is actually from four - bytes past the instruction). The linker can use this reloc to - determine just which function is being called, and thus decide - whether it is possible to replace the jsr with a bsr. - - If multiple function calls are all based on a single register load - (i.e., the same function is called multiple times), the compiler - guarantees that each function call will have an R_SH_USES reloc. - Therefore, if the linker is able to convert each R_SH_USES reloc - which refers to that address, it can safely eliminate the register - load. - - When the assembler creates an R_SH_USES reloc, it examines it to - determine which address is being loaded (L1 in the above example). - It then counts the number of references to that address, and - creates an R_SH_COUNT reloc at that address. The r_offset field of - the R_SH_COUNT reloc will be the number of references. If the - linker is able to eliminate a register load, it can use the - R_SH_COUNT reloc to see whether it can also eliminate the function - address. - - SH relaxing also handles another, unrelated, matter. On the SH, if - a load or store instruction is not aligned on a four byte boundary, - the memory cycle interferes with the 32 bit instruction fetch, - causing a one cycle bubble in the pipeline. Therefore, we try to - align load and store instructions on four byte boundaries if we - can, by swapping them with one of the adjacent instructions. */ - -static boolean -sh_relax_section (abfd, sec, link_info, again) - bfd *abfd; - asection *sec; - struct bfd_link_info *link_info; - boolean *again; -{ - struct internal_reloc *internal_relocs; - struct internal_reloc *free_relocs = NULL; - boolean have_code; - struct internal_reloc *irel, *irelend; - bfd_byte *contents = NULL; - bfd_byte *free_contents = NULL; - - *again = false; - - if (link_info->relocateable - || (sec->flags & SEC_RELOC) == 0 - || sec->reloc_count == 0) - return true; - - /* If this is the first time we have been called for this section, - initialize the cooked size. */ - if (sec->_cooked_size == 0) - sec->_cooked_size = sec->_raw_size; - - internal_relocs = (_bfd_coff_read_internal_relocs - (abfd, sec, link_info->keep_memory, - (bfd_byte *) NULL, false, - (struct internal_reloc *) NULL)); - if (internal_relocs == NULL) - goto error_return; - if (! link_info->keep_memory) - free_relocs = internal_relocs; - - have_code = false; - - irelend = internal_relocs + sec->reloc_count; - for (irel = internal_relocs; irel < irelend; irel++) - { - bfd_vma laddr, paddr, symval; - unsigned short insn; - struct internal_reloc *irelfn, *irelscan, *irelcount; - struct internal_syment sym; - bfd_signed_vma foff; - - if (irel->r_type == R_SH_CODE) - have_code = true; - - if (irel->r_type != R_SH_USES) - continue; - - /* Get the section contents. */ - if (contents == NULL) - { - if (coff_section_data (abfd, sec) != NULL - && coff_section_data (abfd, sec)->contents != NULL) - contents = coff_section_data (abfd, sec)->contents; - else - { - contents = (bfd_byte *) bfd_malloc (sec->_raw_size); - if (contents == NULL) - goto error_return; - free_contents = contents; - - if (! bfd_get_section_contents (abfd, sec, contents, - (file_ptr) 0, sec->_raw_size)) - goto error_return; - } - } - - /* The r_offset field of the R_SH_USES reloc will point us to - the register load. The 4 is because the r_offset field is - computed as though it were a jump offset, which are based - from 4 bytes after the jump instruction. */ - laddr = irel->r_vaddr - sec->vma + 4; - /* Careful to sign extend the 32-bit offset. */ - laddr += ((irel->r_offset & 0xffffffff) ^ 0x80000000) - 0x80000000; - if (laddr >= sec->_raw_size) - { - (*_bfd_error_handler) ("%s: 0x%lx: warning: bad R_SH_USES offset", - bfd_get_filename (abfd), - (unsigned long) irel->r_vaddr); - continue; - } - insn = bfd_get_16 (abfd, contents + laddr); - - /* If the instruction is not mov.l NN,rN, we don't know what to do. */ - if ((insn & 0xf000) != 0xd000) - { - ((*_bfd_error_handler) - ("%s: 0x%lx: warning: R_SH_USES points to unrecognized insn 0x%x", - bfd_get_filename (abfd), (unsigned long) irel->r_vaddr, insn)); - continue; - } - - /* Get the address from which the register is being loaded. The - displacement in the mov.l instruction is quadrupled. It is a - displacement from four bytes after the movl instruction, but, - before adding in the PC address, two least significant bits - of the PC are cleared. We assume that the section is aligned - on a four byte boundary. */ - paddr = insn & 0xff; - paddr *= 4; - paddr += (laddr + 4) &~ 3; - if (paddr >= sec->_raw_size) - { - ((*_bfd_error_handler) - ("%s: 0x%lx: warning: bad R_SH_USES load offset", - bfd_get_filename (abfd), (unsigned long) irel->r_vaddr)); - continue; - } - - /* Get the reloc for the address from which the register is - being loaded. This reloc will tell us which function is - actually being called. */ - paddr += sec->vma; - for (irelfn = internal_relocs; irelfn < irelend; irelfn++) - if (irelfn->r_vaddr == paddr - && irelfn->r_type == R_SH_IMM32) - break; - if (irelfn >= irelend) - { - ((*_bfd_error_handler) - ("%s: 0x%lx: warning: could not find expected reloc", - bfd_get_filename (abfd), (unsigned long) paddr)); - continue; - } - - /* Get the value of the symbol referred to by the reloc. */ - if (! _bfd_coff_get_external_symbols (abfd)) - goto error_return; - bfd_coff_swap_sym_in (abfd, - ((bfd_byte *) obj_coff_external_syms (abfd) - + (irelfn->r_symndx - * bfd_coff_symesz (abfd))), - &sym); - if (sym.n_scnum != 0 && sym.n_scnum != sec->target_index) - { - ((*_bfd_error_handler) - ("%s: 0x%lx: warning: symbol in unexpected section", - bfd_get_filename (abfd), (unsigned long) paddr)); - continue; - } - - if (sym.n_sclass != C_EXT) - { - symval = (sym.n_value - - sec->vma - + sec->output_section->vma - + sec->output_offset); - } - else - { - struct coff_link_hash_entry *h; - - h = obj_coff_sym_hashes (abfd)[irelfn->r_symndx]; - BFD_ASSERT (h != NULL); - if (h->root.type != bfd_link_hash_defined - && h->root.type != bfd_link_hash_defweak) - { - /* This appears to be a reference to an undefined - symbol. Just ignore it--it will be caught by the - regular reloc processing. */ - continue; - } - - symval = (h->root.u.def.value - + h->root.u.def.section->output_section->vma - + h->root.u.def.section->output_offset); - } - - symval += bfd_get_32 (abfd, contents + paddr - sec->vma); - - /* See if this function call can be shortened. */ - foff = (symval - - (irel->r_vaddr - - sec->vma - + sec->output_section->vma - + sec->output_offset - + 4)); - if (foff < -0x1000 || foff >= 0x1000) - { - /* After all that work, we can't shorten this function call. */ - continue; - } - - /* Shorten the function call. */ - - /* For simplicity of coding, we are going to modify the section - contents, the section relocs, and the BFD symbol table. We - must tell the rest of the code not to free up this - information. It would be possible to instead create a table - of changes which have to be made, as is done in coff-mips.c; - that would be more work, but would require less memory when - the linker is run. */ - - if (coff_section_data (abfd, sec) == NULL) - { - sec->used_by_bfd = - ((PTR) bfd_zalloc (abfd, sizeof (struct coff_section_tdata))); - if (sec->used_by_bfd == NULL) - goto error_return; - } - - coff_section_data (abfd, sec)->relocs = internal_relocs; - coff_section_data (abfd, sec)->keep_relocs = true; - free_relocs = NULL; - - coff_section_data (abfd, sec)->contents = contents; - coff_section_data (abfd, sec)->keep_contents = true; - free_contents = NULL; - - obj_coff_keep_syms (abfd) = true; - - /* Replace the jsr with a bsr. */ - - /* Change the R_SH_USES reloc into an R_SH_PCDISP reloc, and - replace the jsr with a bsr. */ - irel->r_type = R_SH_PCDISP; - irel->r_symndx = irelfn->r_symndx; - if (sym.n_sclass != C_EXT) - { - /* If this needs to be changed because of future relaxing, - it will be handled here like other internal PCDISP - relocs. */ - bfd_put_16 (abfd, - 0xb000 | ((foff >> 1) & 0xfff), - contents + irel->r_vaddr - sec->vma); - } - else - { - /* We can't fully resolve this yet, because the external - symbol value may be changed by future relaxing. We let - the final link phase handle it. */ - bfd_put_16 (abfd, 0xb000, contents + irel->r_vaddr - sec->vma); - } - - /* See if there is another R_SH_USES reloc referring to the same - register load. */ - for (irelscan = internal_relocs; irelscan < irelend; irelscan++) - if (irelscan->r_type == R_SH_USES - && laddr == irelscan->r_vaddr - sec->vma + 4 + irelscan->r_offset) - break; - if (irelscan < irelend) - { - /* Some other function call depends upon this register load, - and we have not yet converted that function call. - Indeed, we may never be able to convert it. There is - nothing else we can do at this point. */ - continue; - } - - /* Look for a R_SH_COUNT reloc on the location where the - function address is stored. Do this before deleting any - bytes, to avoid confusion about the address. */ - for (irelcount = internal_relocs; irelcount < irelend; irelcount++) - if (irelcount->r_vaddr == paddr - && irelcount->r_type == R_SH_COUNT) - break; - - /* Delete the register load. */ - if (! sh_relax_delete_bytes (abfd, sec, laddr, 2)) - goto error_return; - - /* That will change things, so, just in case it permits some - other function call to come within range, we should relax - again. Note that this is not required, and it may be slow. */ - *again = true; - - /* Now check whether we got a COUNT reloc. */ - if (irelcount >= irelend) - { - ((*_bfd_error_handler) - ("%s: 0x%lx: warning: could not find expected COUNT reloc", - bfd_get_filename (abfd), (unsigned long) paddr)); - continue; - } - - /* The number of uses is stored in the r_offset field. We've - just deleted one. */ - if (irelcount->r_offset == 0) - { - ((*_bfd_error_handler) ("%s: 0x%lx: warning: bad count", - bfd_get_filename (abfd), - (unsigned long) paddr)); - continue; - } - - --irelcount->r_offset; - - /* If there are no more uses, we can delete the address. Reload - the address from irelfn, in case it was changed by the - previous call to sh_relax_delete_bytes. */ - if (irelcount->r_offset == 0) - { - if (! sh_relax_delete_bytes (abfd, sec, - irelfn->r_vaddr - sec->vma, 4)) - goto error_return; - } - - /* We've done all we can with that function call. */ - } - - /* Look for load and store instructions that we can align on four - byte boundaries. */ - if (have_code) - { - boolean swapped; - - /* Get the section contents. */ - if (contents == NULL) - { - if (coff_section_data (abfd, sec) != NULL - && coff_section_data (abfd, sec)->contents != NULL) - contents = coff_section_data (abfd, sec)->contents; - else - { - contents = (bfd_byte *) bfd_malloc (sec->_raw_size); - if (contents == NULL) - goto error_return; - free_contents = contents; - - if (! bfd_get_section_contents (abfd, sec, contents, - (file_ptr) 0, sec->_raw_size)) - goto error_return; - } - } - - if (! sh_align_loads (abfd, sec, internal_relocs, contents, &swapped)) - goto error_return; - - if (swapped) - { - if (coff_section_data (abfd, sec) == NULL) - { - sec->used_by_bfd = - ((PTR) bfd_zalloc (abfd, sizeof (struct coff_section_tdata))); - if (sec->used_by_bfd == NULL) - goto error_return; - } - - coff_section_data (abfd, sec)->relocs = internal_relocs; - coff_section_data (abfd, sec)->keep_relocs = true; - free_relocs = NULL; - - coff_section_data (abfd, sec)->contents = contents; - coff_section_data (abfd, sec)->keep_contents = true; - free_contents = NULL; - - obj_coff_keep_syms (abfd) = true; - } - } - - if (free_relocs != NULL) - { - free (free_relocs); - free_relocs = NULL; - } - - if (free_contents != NULL) - { - if (! link_info->keep_memory) - free (free_contents); - else - { - /* Cache the section contents for coff_link_input_bfd. */ - if (coff_section_data (abfd, sec) == NULL) - { - sec->used_by_bfd = - ((PTR) bfd_zalloc (abfd, sizeof (struct coff_section_tdata))); - if (sec->used_by_bfd == NULL) - goto error_return; - coff_section_data (abfd, sec)->relocs = NULL; - } - coff_section_data (abfd, sec)->contents = contents; - } - } - - return true; - - error_return: - if (free_relocs != NULL) - free (free_relocs); - if (free_contents != NULL) - free (free_contents); - return false; -} - -/* Delete some bytes from a section while relaxing. */ - -static boolean -sh_relax_delete_bytes (abfd, sec, addr, count) - bfd *abfd; - asection *sec; - bfd_vma addr; - int count; -{ - bfd_byte *contents; - struct internal_reloc *irel, *irelend; - struct internal_reloc *irelalign; - bfd_vma toaddr; - bfd_byte *esym, *esymend; - bfd_size_type symesz; - struct coff_link_hash_entry **sym_hash; - asection *o; - - contents = coff_section_data (abfd, sec)->contents; - - /* The deletion must stop at the next ALIGN reloc for an aligment - power larger than the number of bytes we are deleting. */ - - irelalign = NULL; - toaddr = sec->_cooked_size; - - irel = coff_section_data (abfd, sec)->relocs; - irelend = irel + sec->reloc_count; - for (; irel < irelend; irel++) - { - if (irel->r_type == R_SH_ALIGN - && irel->r_vaddr - sec->vma > addr - && count < (1 << irel->r_offset)) - { - irelalign = irel; - toaddr = irel->r_vaddr - sec->vma; - break; - } - } - - /* Actually delete the bytes. */ - memmove (contents + addr, contents + addr + count, toaddr - addr - count); - if (irelalign == NULL) - sec->_cooked_size -= count; - else - { - int i; - -#define NOP_OPCODE (0x0009) - - BFD_ASSERT ((count & 1) == 0); - for (i = 0; i < count; i += 2) - bfd_put_16 (abfd, NOP_OPCODE, contents + toaddr - count + i); - } - - /* Adjust all the relocs. */ - for (irel = coff_section_data (abfd, sec)->relocs; irel < irelend; irel++) - { - bfd_vma nraddr, stop; - bfd_vma start = 0; - int insn = 0; - struct internal_syment sym; - int off, adjust, oinsn; - bfd_signed_vma voff = 0; - boolean overflow; - - /* Get the new reloc address. */ - nraddr = irel->r_vaddr - sec->vma; - if ((irel->r_vaddr - sec->vma > addr - && irel->r_vaddr - sec->vma < toaddr) - || (irel->r_type == R_SH_ALIGN - && irel->r_vaddr - sec->vma == toaddr)) - nraddr -= count; - - /* See if this reloc was for the bytes we have deleted, in which - case we no longer care about it. Don't delete relocs which - represent addresses, though. */ - if (irel->r_vaddr - sec->vma >= addr - && irel->r_vaddr - sec->vma < addr + count - && irel->r_type != R_SH_ALIGN - && irel->r_type != R_SH_CODE - && irel->r_type != R_SH_DATA - && irel->r_type != R_SH_LABEL) - irel->r_type = R_SH_UNUSED; - - /* If this is a PC relative reloc, see if the range it covers - includes the bytes we have deleted. */ - switch (irel->r_type) - { - default: - break; - - case R_SH_PCDISP8BY2: - case R_SH_PCDISP: - case R_SH_PCRELIMM8BY2: - case R_SH_PCRELIMM8BY4: - start = irel->r_vaddr - sec->vma; - insn = bfd_get_16 (abfd, contents + nraddr); - break; - } - - switch (irel->r_type) - { - default: - start = stop = addr; - break; - - case R_SH_IMM32: - /* If this reloc is against a symbol defined in this - section, and the symbol will not be adjusted below, we - must check the addend to see it will put the value in - range to be adjusted, and hence must be changed. */ - bfd_coff_swap_sym_in (abfd, - ((bfd_byte *) obj_coff_external_syms (abfd) - + (irel->r_symndx - * bfd_coff_symesz (abfd))), - &sym); - if (sym.n_sclass != C_EXT - && sym.n_scnum == sec->target_index - && ((bfd_vma) sym.n_value <= addr - || (bfd_vma) sym.n_value >= toaddr)) - { - bfd_vma val; - - val = bfd_get_32 (abfd, contents + nraddr); - val += sym.n_value; - if (val > addr && val < toaddr) - bfd_put_32 (abfd, val - count, contents + nraddr); - } - start = stop = addr; - break; - - case R_SH_PCDISP8BY2: - off = insn & 0xff; - if (off & 0x80) - off -= 0x100; - stop = (bfd_vma) ((bfd_signed_vma) start + 4 + off * 2); - break; - - case R_SH_PCDISP: - bfd_coff_swap_sym_in (abfd, - ((bfd_byte *) obj_coff_external_syms (abfd) - + (irel->r_symndx - * bfd_coff_symesz (abfd))), - &sym); - if (sym.n_sclass == C_EXT) - start = stop = addr; - else - { - off = insn & 0xfff; - if (off & 0x800) - off -= 0x1000; - stop = (bfd_vma) ((bfd_signed_vma) start + 4 + off * 2); - } - break; - - case R_SH_PCRELIMM8BY2: - off = insn & 0xff; - stop = start + 4 + off * 2; - break; - - case R_SH_PCRELIMM8BY4: - off = insn & 0xff; - stop = (start &~ (bfd_vma) 3) + 4 + off * 4; - break; - - case R_SH_SWITCH8: - case R_SH_SWITCH16: - case R_SH_SWITCH32: - /* These relocs types represent - .word L2-L1 - The r_offset field holds the difference between the reloc - address and L1. That is the start of the reloc, and - adding in the contents gives us the top. We must adjust - both the r_offset field and the section contents. */ - - start = irel->r_vaddr - sec->vma; - stop = (bfd_vma) ((bfd_signed_vma) start - (long) irel->r_offset); - - if (start > addr - && start < toaddr - && (stop <= addr || stop >= toaddr)) - irel->r_offset += count; - else if (stop > addr - && stop < toaddr - && (start <= addr || start >= toaddr)) - irel->r_offset -= count; - - start = stop; - - if (irel->r_type == R_SH_SWITCH16) - voff = bfd_get_signed_16 (abfd, contents + nraddr); - else if (irel->r_type == R_SH_SWITCH8) - voff = bfd_get_8 (abfd, contents + nraddr); - else - voff = bfd_get_signed_32 (abfd, contents + nraddr); - stop = (bfd_vma) ((bfd_signed_vma) start + voff); - - break; - - case R_SH_USES: - start = irel->r_vaddr - sec->vma; - stop = (bfd_vma) ((bfd_signed_vma) start - + (long) irel->r_offset - + 4); - break; - } - - if (start > addr - && start < toaddr - && (stop <= addr || stop >= toaddr)) - adjust = count; - else if (stop > addr - && stop < toaddr - && (start <= addr || start >= toaddr)) - adjust = - count; - else - adjust = 0; - - if (adjust != 0) - { - oinsn = insn; - overflow = false; - switch (irel->r_type) - { - default: - abort (); - break; - - case R_SH_PCDISP8BY2: - case R_SH_PCRELIMM8BY2: - insn += adjust / 2; - if ((oinsn & 0xff00) != (insn & 0xff00)) - overflow = true; - bfd_put_16 (abfd, insn, contents + nraddr); - break; - - case R_SH_PCDISP: - insn += adjust / 2; - if ((oinsn & 0xf000) != (insn & 0xf000)) - overflow = true; - bfd_put_16 (abfd, insn, contents + nraddr); - break; - - case R_SH_PCRELIMM8BY4: - BFD_ASSERT (adjust == count || count >= 4); - if (count >= 4) - insn += adjust / 4; - else - { - if ((irel->r_vaddr & 3) == 0) - ++insn; - } - if ((oinsn & 0xff00) != (insn & 0xff00)) - overflow = true; - bfd_put_16 (abfd, insn, contents + nraddr); - break; - - case R_SH_SWITCH8: - voff += adjust; - if (voff < 0 || voff >= 0xff) - overflow = true; - bfd_put_8 (abfd, voff, contents + nraddr); - break; - - case R_SH_SWITCH16: - voff += adjust; - if (voff < - 0x8000 || voff >= 0x8000) - overflow = true; - bfd_put_signed_16 (abfd, voff, contents + nraddr); - break; - - case R_SH_SWITCH32: - voff += adjust; - bfd_put_signed_32 (abfd, voff, contents + nraddr); - break; - - case R_SH_USES: - irel->r_offset += adjust; - break; - } - - if (overflow) - { - ((*_bfd_error_handler) - ("%s: 0x%lx: fatal: reloc overflow while relaxing", - bfd_get_filename (abfd), (unsigned long) irel->r_vaddr)); - bfd_set_error (bfd_error_bad_value); - return false; - } - } - - irel->r_vaddr = nraddr + sec->vma; - } - - /* Look through all the other sections. If there contain any IMM32 - relocs against internal symbols which we are not going to adjust - below, we may need to adjust the addends. */ - for (o = abfd->sections; o != NULL; o = o->next) - { - struct internal_reloc *internal_relocs; - struct internal_reloc *irelscan, *irelscanend; - bfd_byte *ocontents; - - if (o == sec - || (o->flags & SEC_RELOC) == 0 - || o->reloc_count == 0) - continue; - - /* We always cache the relocs. Perhaps, if info->keep_memory is - false, we should free them, if we are permitted to, when we - leave sh_coff_relax_section. */ - internal_relocs = (_bfd_coff_read_internal_relocs - (abfd, o, true, (bfd_byte *) NULL, false, - (struct internal_reloc *) NULL)); - if (internal_relocs == NULL) - return false; - - ocontents = NULL; - irelscanend = internal_relocs + o->reloc_count; - for (irelscan = internal_relocs; irelscan < irelscanend; irelscan++) - { - struct internal_syment sym; - - if (irelscan->r_type != R_SH_IMM32) - continue; - - bfd_coff_swap_sym_in (abfd, - ((bfd_byte *) obj_coff_external_syms (abfd) - + (irelscan->r_symndx - * bfd_coff_symesz (abfd))), - &sym); - if (sym.n_sclass != C_EXT - && sym.n_scnum == sec->target_index - && ((bfd_vma) sym.n_value <= addr - || (bfd_vma) sym.n_value >= toaddr)) - { - bfd_vma val; - - if (ocontents == NULL) - { - if (coff_section_data (abfd, o)->contents != NULL) - ocontents = coff_section_data (abfd, o)->contents; - else - { - /* We always cache the section contents. - Perhaps, if info->keep_memory is false, we - should free them, if we are permitted to, - when we leave sh_coff_relax_section. */ - ocontents = (bfd_byte *) bfd_malloc (o->_raw_size); - if (ocontents == NULL) - return false; - if (! bfd_get_section_contents (abfd, o, ocontents, - (file_ptr) 0, - o->_raw_size)) - return false; - coff_section_data (abfd, o)->contents = ocontents; - } - } - - val = bfd_get_32 (abfd, ocontents + irelscan->r_vaddr - o->vma); - val += sym.n_value; - if (val > addr && val < toaddr) - bfd_put_32 (abfd, val - count, - ocontents + irelscan->r_vaddr - o->vma); - - coff_section_data (abfd, o)->keep_contents = true; - } - } - } - - /* Adjusting the internal symbols will not work if something has - already retrieved the generic symbols. It would be possible to - make this work by adjusting the generic symbols at the same time. - However, this case should not arise in normal usage. */ - if (obj_symbols (abfd) != NULL - || obj_raw_syments (abfd) != NULL) - { - ((*_bfd_error_handler) - ("%s: fatal: generic symbols retrieved before relaxing", - bfd_get_filename (abfd))); - bfd_set_error (bfd_error_invalid_operation); - return false; - } - - /* Adjust all the symbols. */ - sym_hash = obj_coff_sym_hashes (abfd); - symesz = bfd_coff_symesz (abfd); - esym = (bfd_byte *) obj_coff_external_syms (abfd); - esymend = esym + obj_raw_syment_count (abfd) * symesz; - while (esym < esymend) - { - struct internal_syment isym; - - bfd_coff_swap_sym_in (abfd, (PTR) esym, (PTR) &isym); - - if (isym.n_scnum == sec->target_index - && (bfd_vma) isym.n_value > addr - && (bfd_vma) isym.n_value < toaddr) - { - isym.n_value -= count; - - bfd_coff_swap_sym_out (abfd, (PTR) &isym, (PTR) esym); - - if (*sym_hash != NULL) - { - BFD_ASSERT ((*sym_hash)->root.type == bfd_link_hash_defined - || (*sym_hash)->root.type == bfd_link_hash_defweak); - BFD_ASSERT ((*sym_hash)->root.u.def.value >= addr - && (*sym_hash)->root.u.def.value < toaddr); - (*sym_hash)->root.u.def.value -= count; - } - } - - esym += (isym.n_numaux + 1) * symesz; - sym_hash += isym.n_numaux + 1; - } - - /* See if we can move the ALIGN reloc forward. We have adjusted - r_vaddr for it already. */ - if (irelalign != NULL) - { - bfd_vma alignto, alignaddr; - - alignto = BFD_ALIGN (toaddr, 1 << irelalign->r_offset); - alignaddr = BFD_ALIGN (irelalign->r_vaddr - sec->vma, - 1 << irelalign->r_offset); - if (alignto != alignaddr) - { - /* Tail recursion. */ - return sh_relax_delete_bytes (abfd, sec, alignaddr, - alignto - alignaddr); - } - } - - return true; -} - -/* This is yet another version of the SH opcode table, used to rapidly - get information about a particular instruction. */ - -/* The opcode map is represented by an array of these structures. The - array is indexed by the high order four bits in the instruction. */ - -struct sh_major_opcode -{ - /* A pointer to the instruction list. This is an array which - contains all the instructions with this major opcode. */ - const struct sh_minor_opcode *minor_opcodes; - /* The number of elements in minor_opcodes. */ - unsigned short count; -}; - -/* This structure holds information for a set of SH opcodes. The - instruction code is anded with the mask value, and the resulting - value is used to search the order opcode list. */ - -struct sh_minor_opcode -{ - /* The sorted opcode list. */ - const struct sh_opcode *opcodes; - /* The number of elements in opcodes. */ - unsigned short count; - /* The mask value to use when searching the opcode list. */ - unsigned short mask; -}; - -/* This structure holds information for an SH instruction. An array - of these structures is sorted in order by opcode. */ - -struct sh_opcode -{ - /* The code for this instruction, after it has been anded with the - mask value in the sh_major_opcode structure. */ - unsigned short opcode; - /* Flags for this instruction. */ - unsigned short flags; -}; - -/* Flag which appear in the sh_opcode structure. */ - -/* This instruction loads a value from memory. */ -#define LOAD (0x1) - -/* This instruction stores a value to memory. */ -#define STORE (0x2) - -/* This instruction is a branch. */ -#define BRANCH (0x4) - -/* This instruction has a delay slot. */ -#define DELAY (0x8) - -/* This instruction uses the value in the register in the field at - mask 0x0f00 of the instruction. */ -#define USES1 (0x10) - -/* This instruction uses the value in the register in the field at - mask 0x00f0 of the instruction. */ -#define USES2 (0x20) - -/* This instruction uses the value in register 0. */ -#define USESR0 (0x40) - -/* This instruction sets the value in the register in the field at - mask 0x0f00 of the instruction. */ -#define SETS1 (0x80) - -/* This instruction sets the value in the register in the field at - mask 0x00f0 of the instruction. */ -#define SETS2 (0x100) - -/* This instruction sets register 0. */ -#define SETSR0 (0x200) - -/* This instruction sets a special register. */ -#define SETSSP (0x400) - -/* This instruction uses a special register. */ -#define USESSP (0x800) - -/* This instruction uses the floating point register in the field at - mask 0x0f00 of the instruction. */ -#define USESF1 (0x1000) - -/* This instruction uses the floating point register in the field at - mask 0x00f0 of the instruction. */ -#define USESF2 (0x2000) - -/* This instruction uses floating point register 0. */ -#define USESF0 (0x4000) - -/* This instruction sets the floating point register in the field at - mask 0x0f00 of the instruction. */ -#define SETSF1 (0x8000) - -static boolean sh_insn_uses_reg - PARAMS ((unsigned int, const struct sh_opcode *, unsigned int)); -static boolean sh_insn_uses_freg - PARAMS ((unsigned int, const struct sh_opcode *, unsigned int)); -static boolean sh_insns_conflict - PARAMS ((unsigned int, const struct sh_opcode *, unsigned int, - const struct sh_opcode *)); -static boolean sh_load_use - PARAMS ((unsigned int, const struct sh_opcode *, unsigned int, - const struct sh_opcode *)); - -/* The opcode maps. */ - -#define MAP(a) a, sizeof a / sizeof a[0] - -static const struct sh_opcode sh_opcode00[] = -{ - { 0x0008, SETSSP }, /* clrt */ - { 0x0009, 0 }, /* nop */ - { 0x000b, BRANCH | DELAY | USESSP }, /* rts */ - { 0x0018, SETSSP }, /* sett */ - { 0x0019, SETSSP }, /* div0u */ - { 0x001b, 0 }, /* sleep */ - { 0x0028, SETSSP }, /* clrmac */ - { 0x002b, BRANCH | DELAY | SETSSP }, /* rte */ - { 0x0038, USESSP | SETSSP }, /* ldtlb */ - { 0x0048, SETSSP }, /* clrs */ - { 0x0058, SETSSP } /* sets */ -}; - -static const struct sh_opcode sh_opcode01[] = -{ - { 0x0002, SETS1 | USESSP }, /* stc sr,rn */ - { 0x0003, BRANCH | DELAY | USES1 | SETSSP }, /* bsrf rn */ - { 0x000a, SETS1 | USESSP }, /* sts mach,rn */ - { 0x0012, SETS1 | USESSP }, /* stc gbr,rn */ - { 0x001a, SETS1 | USESSP }, /* sts macl,rn */ - { 0x0022, SETS1 | USESSP }, /* stc vbr,rn */ - { 0x0023, BRANCH | DELAY | USES1 }, /* braf rn */ - { 0x0029, SETS1 | USESSP }, /* movt rn */ - { 0x002a, SETS1 | USESSP }, /* sts pr,rn */ - { 0x0032, SETS1 | USESSP }, /* stc ssr,rn */ - { 0x0042, SETS1 | USESSP }, /* stc spc,rn */ - { 0x005a, SETS1 | USESSP }, /* sts fpul,rn */ - { 0x006a, SETS1 | USESSP }, /* sts fpscr,rn */ - { 0x0082, SETS1 | USESSP }, /* stc r0_bank,rn */ - { 0x0083, LOAD | USES1 }, /* pref @rn */ - { 0x0092, SETS1 | USESSP }, /* stc r1_bank,rn */ - { 0x00a2, SETS1 | USESSP }, /* stc r2_bank,rn */ - { 0x00b2, SETS1 | USESSP }, /* stc r3_bank,rn */ - { 0x00c2, SETS1 | USESSP }, /* stc r4_bank,rn */ - { 0x00d2, SETS1 | USESSP }, /* stc r5_bank,rn */ - { 0x00e2, SETS1 | USESSP }, /* stc r6_bank,rn */ - { 0x00f2, SETS1 | USESSP } /* stc r7_bank,rn */ -}; - -static const struct sh_opcode sh_opcode02[] = -{ - { 0x0004, STORE | USES1 | USES2 | USESR0 }, /* mov.b rm,@(r0,rn) */ - { 0x0005, STORE | USES1 | USES2 | USESR0 }, /* mov.w rm,@(r0,rn) */ - { 0x0006, STORE | USES1 | USES2 | USESR0 }, /* mov.l rm,@(r0,rn) */ - { 0x0007, SETSSP | USES1 | USES2 }, /* mul.l rm,rn */ - { 0x000c, LOAD | SETS1 | USES2 | USESR0 }, /* mov.b @(r0,rm),rn */ - { 0x000d, LOAD | SETS1 | USES2 | USESR0 }, /* mov.w @(r0,rm),rn */ - { 0x000e, LOAD | SETS1 | USES2 | USESR0 }, /* mov.l @(r0,rm),rn */ - { 0x000f, LOAD|SETS1|SETS2|SETSSP|USES1|USES2|USESSP }, /* mac.l @rm+,@rn+ */ -}; - -static const struct sh_minor_opcode sh_opcode0[] = -{ - { MAP (sh_opcode00), 0xffff }, - { MAP (sh_opcode01), 0xf0ff }, - { MAP (sh_opcode02), 0xf00f } -}; - -static const struct sh_opcode sh_opcode10[] = -{ - { 0x1000, STORE | USES1 | USES2 } /* mov.l rm,@(disp,rn) */ -}; - -static const struct sh_minor_opcode sh_opcode1[] = -{ - { MAP (sh_opcode10), 0xf000 } -}; - -static const struct sh_opcode sh_opcode20[] = -{ - { 0x2000, STORE | USES1 | USES2 }, /* mov.b rm,@rn */ - { 0x2001, STORE | USES1 | USES2 }, /* mov.w rm,@rn */ - { 0x2002, STORE | USES1 | USES2 }, /* mov.l rm,@rn */ - { 0x2004, STORE | SETS1 | USES1 | USES2 }, /* mov.b rm,@-rn */ - { 0x2005, STORE | SETS1 | USES1 | USES2 }, /* mov.w rm,@-rn */ - { 0x2006, STORE | SETS1 | USES1 | USES2 }, /* mov.l rm,@-rn */ - { 0x2007, SETSSP | USES1 | USES2 | USESSP }, /* div0s */ - { 0x2008, SETSSP | USES1 | USES2 }, /* tst rm,rn */ - { 0x2009, SETS1 | USES1 | USES2 }, /* and rm,rn */ - { 0x200a, SETS1 | USES1 | USES2 }, /* xor rm,rn */ - { 0x200b, SETS1 | USES1 | USES2 }, /* or rm,rn */ - { 0x200c, SETSSP | USES1 | USES2 }, /* cmp/str rm,rn */ - { 0x200d, SETS1 | USES1 | USES2 }, /* xtrct rm,rn */ - { 0x200e, SETSSP | USES1 | USES2 }, /* mulu.w rm,rn */ - { 0x200f, SETSSP | USES1 | USES2 } /* muls.w rm,rn */ -}; - -static const struct sh_minor_opcode sh_opcode2[] = -{ - { MAP (sh_opcode20), 0xf00f } -}; - -static const struct sh_opcode sh_opcode30[] = -{ - { 0x3000, SETSSP | USES1 | USES2 }, /* cmp/eq rm,rn */ - { 0x3002, SETSSP | USES1 | USES2 }, /* cmp/hs rm,rn */ - { 0x3003, SETSSP | USES1 | USES2 }, /* cmp/ge rm,rn */ - { 0x3004, SETSSP | USESSP | USES1 | USES2 }, /* div1 rm,rn */ - { 0x3005, SETSSP | USES1 | USES2 }, /* dmulu.l rm,rn */ - { 0x3006, SETSSP | USES1 | USES2 }, /* cmp/hi rm,rn */ - { 0x3007, SETSSP | USES1 | USES2 }, /* cmp/gt rm,rn */ - { 0x3008, SETS1 | USES1 | USES2 }, /* sub rm,rn */ - { 0x300a, SETS1 | SETSSP | USES1 | USES2 | USESSP }, /* subc rm,rn */ - { 0x300b, SETS1 | SETSSP | USES1 | USES2 }, /* subv rm,rn */ - { 0x300c, SETS1 | USES1 | USES2 }, /* add rm,rn */ - { 0x300d, SETSSP | USES1 | USES2 }, /* dmuls.l rm,rn */ - { 0x300e, SETS1 | SETSSP | USES1 | USES2 | USESSP }, /* addc rm,rn */ - { 0x300f, SETS1 | SETSSP | USES1 | USES2 } /* addv rm,rn */ -}; - -static const struct sh_minor_opcode sh_opcode3[] = -{ - { MAP (sh_opcode30), 0xf00f } -}; - -static const struct sh_opcode sh_opcode40[] = -{ - { 0x4000, SETS1 | SETSSP | USES1 }, /* shll rn */ - { 0x4001, SETS1 | SETSSP | USES1 }, /* shlr rn */ - { 0x4002, STORE | SETS1 | USES1 | USESSP }, /* sts.l mach,@-rn */ - { 0x4003, STORE | SETS1 | USES1 | USESSP }, /* stc.l sr,@-rn */ - { 0x4004, SETS1 | SETSSP | USES1 }, /* rotl rn */ - { 0x4005, SETS1 | SETSSP | USES1 }, /* rotr rn */ - { 0x4006, LOAD | SETS1 | SETSSP | USES1 }, /* lds.l @rm+,mach */ - { 0x4007, LOAD | SETS1 | SETSSP | USES1 }, /* ldc.l @rm+,sr */ - { 0x4008, SETS1 | USES1 }, /* shll2 rn */ - { 0x4009, SETS1 | USES1 }, /* shlr2 rn */ - { 0x400a, SETSSP | USES1 }, /* lds rm,mach */ - { 0x400b, BRANCH | DELAY | USES1 }, /* jsr @rn */ - { 0x400e, SETSSP | USES1 }, /* ldc rm,sr */ - { 0x4010, SETS1 | SETSSP | USES1 }, /* dt rn */ - { 0x4011, SETSSP | USES1 }, /* cmp/pz rn */ - { 0x4012, STORE | SETS1 | USES1 | USESSP }, /* sts.l macl,@-rn */ - { 0x4013, STORE | SETS1 | USES1 | USESSP }, /* stc.l gbr,@-rn */ - { 0x4015, SETSSP | USES1 }, /* cmp/pl rn */ - { 0x4016, LOAD | SETS1 | SETSSP | USES1 }, /* lds.l @rm+,macl */ - { 0x4017, LOAD | SETS1 | SETSSP | USES1 }, /* ldc.l @rm+,gbr */ - { 0x4018, SETS1 | USES1 }, /* shll8 rn */ - { 0x4019, SETS1 | USES1 }, /* shlr8 rn */ - { 0x401a, SETSSP | USES1 }, /* lds rm,macl */ - { 0x401b, LOAD | SETSSP | USES1 }, /* tas.b @rn */ - { 0x401e, SETSSP | USES1 }, /* ldc rm,gbr */ - { 0x4020, SETS1 | SETSSP | USES1 }, /* shal rn */ - { 0x4021, SETS1 | SETSSP | USES1 }, /* shar rn */ - { 0x4022, STORE | SETS1 | USES1 | USESSP }, /* sts.l pr,@-rn */ - { 0x4023, STORE | SETS1 | USES1 | USESSP }, /* stc.l vbr,@-rn */ - { 0x4024, SETS1 | SETSSP | USES1 | USESSP }, /* rotcl rn */ - { 0x4025, SETS1 | SETSSP | USES1 | USESSP }, /* rotcr rn */ - { 0x4026, LOAD | SETS1 | SETSSP | USES1 }, /* lds.l @rm+,pr */ - { 0x4027, LOAD | SETS1 | SETSSP | USES1 }, /* ldc.l @rm+,vbr */ - { 0x4028, SETS1 | USES1 }, /* shll16 rn */ - { 0x4029, SETS1 | USES1 }, /* shlr16 rn */ - { 0x402a, SETSSP | USES1 }, /* lds rm,pr */ - { 0x402b, BRANCH | DELAY | USES1 }, /* jmp @rn */ - { 0x402e, SETSSP | USES1 }, /* ldc rm,vbr */ - { 0x4033, STORE | SETS1 | USES1 | USESSP }, /* stc.l ssr,@-rn */ - { 0x4037, LOAD | SETS1 | SETSSP | USES1 }, /* ldc.l @rm+,ssr */ - { 0x403e, SETSSP | USES1 }, /* ldc rm,ssr */ - { 0x4043, STORE | SETS1 | USES1 | USESSP }, /* stc.l spc,@-rn */ - { 0x4047, LOAD | SETS1 | SETSSP | USES1 }, /* ldc.l @rm+,spc */ - { 0x404e, SETSSP | USES1 }, /* ldc rm,spc */ - { 0x4052, STORE | SETS1 | USES1 | USESSP }, /* sts.l fpul,@-rn */ - { 0x4056, LOAD | SETS1 | SETSSP | USES1 }, /* lds.l @rm+,fpul */ - { 0x405a, SETSSP | USES1 }, /* lds.l rm,fpul */ - { 0x4062, STORE | SETS1 | USES1 | USESSP }, /* sts.l fpscr,@-rn */ - { 0x4066, LOAD | SETS1 | SETSSP | USES1 }, /* lds.l @rm+,fpscr */ - { 0x406a, SETSSP | USES1 } /* lds rm,fpscr */ -}; - -static const struct sh_opcode sh_opcode41[] = -{ - { 0x4083, STORE | SETS1 | USES1 | USESSP }, /* stc.l rx_bank,@-rn */ - { 0x4087, LOAD | SETS1 | SETSSP | USES1 }, /* ldc.l @rm+,rx_bank */ - { 0x408e, SETSSP | USES1 } /* ldc rm,rx_bank */ -}; - -static const struct sh_opcode sh_opcode42[] = -{ - { 0x400c, SETS1 | USES1 | USES2 }, /* shad rm,rn */ - { 0x400d, SETS1 | USES1 | USES2 }, /* shld rm,rn */ - { 0x400f, LOAD|SETS1|SETS2|SETSSP|USES1|USES2|USESSP }, /* mac.w @rm+,@rn+ */ -}; - -static const struct sh_minor_opcode sh_opcode4[] = -{ - { MAP (sh_opcode40), 0xf0ff }, - { MAP (sh_opcode41), 0xf08f }, - { MAP (sh_opcode42), 0xf00f } -}; - -static const struct sh_opcode sh_opcode50[] = -{ - { 0x5000, LOAD | SETS1 | USES2 } /* mov.l @(disp,rm),rn */ -}; - -static const struct sh_minor_opcode sh_opcode5[] = -{ - { MAP (sh_opcode50), 0xf000 } -}; - -static const struct sh_opcode sh_opcode60[] = -{ - { 0x6000, LOAD | SETS1 | USES2 }, /* mov.b @rm,rn */ - { 0x6001, LOAD | SETS1 | USES2 }, /* mov.w @rm,rn */ - { 0x6002, LOAD | SETS1 | USES2 }, /* mov.l @rm,rn */ - { 0x6003, SETS1 | USES2 }, /* mov rm,rn */ - { 0x6004, LOAD | SETS1 | SETS2 | USES2 }, /* mov.b @rm+,rn */ - { 0x6005, LOAD | SETS1 | SETS2 | USES2 }, /* mov.w @rm+,rn */ - { 0x6006, LOAD | SETS1 | SETS2 | USES2 }, /* mov.l @rm+,rn */ - { 0x6007, SETS1 | USES2 }, /* not rm,rn */ - { 0x6008, SETS1 | USES2 }, /* swap.b rm,rn */ - { 0x6009, SETS1 | USES2 }, /* swap.w rm,rn */ - { 0x600a, SETS1 | SETSSP | USES2 | USESSP }, /* negc rm,rn */ - { 0x600b, SETS1 | USES2 }, /* neg rm,rn */ - { 0x600c, SETS1 | USES2 }, /* extu.b rm,rn */ - { 0x600d, SETS1 | USES2 }, /* extu.w rm,rn */ - { 0x600e, SETS1 | USES2 }, /* exts.b rm,rn */ - { 0x600f, SETS1 | USES2 } /* exts.w rm,rn */ -}; - -static const struct sh_minor_opcode sh_opcode6[] = -{ - { MAP (sh_opcode60), 0xf00f } -}; - -static const struct sh_opcode sh_opcode70[] = -{ - { 0x7000, SETS1 | USES1 } /* add #imm,rn */ -}; - -static const struct sh_minor_opcode sh_opcode7[] = -{ - { MAP (sh_opcode70), 0xf000 } -}; - -static const struct sh_opcode sh_opcode80[] = -{ - { 0x8000, STORE | USES2 | USESR0 }, /* mov.b r0,@(disp,rn) */ - { 0x8100, STORE | USES2 | USESR0 }, /* mov.w r0,@(disp,rn) */ - { 0x8400, LOAD | SETSR0 | USES2 }, /* mov.b @(disp,rm),r0 */ - { 0x8500, LOAD | SETSR0 | USES2 }, /* mov.w @(disp,rn),r0 */ - { 0x8800, SETSSP | USESR0 }, /* cmp/eq #imm,r0 */ - { 0x8900, BRANCH | USESSP }, /* bt label */ - { 0x8b00, BRANCH | USESSP }, /* bf label */ - { 0x8d00, BRANCH | DELAY | USESSP }, /* bt/s label */ - { 0x8f00, BRANCH | DELAY | USESSP } /* bf/s label */ -}; - -static const struct sh_minor_opcode sh_opcode8[] = -{ - { MAP (sh_opcode80), 0xff00 } -}; - -static const struct sh_opcode sh_opcode90[] = -{ - { 0x9000, LOAD | SETS1 } /* mov.w @(disp,pc),rn */ -}; - -static const struct sh_minor_opcode sh_opcode9[] = -{ - { MAP (sh_opcode90), 0xf000 } -}; - -static const struct sh_opcode sh_opcodea0[] = -{ - { 0xa000, BRANCH | DELAY } /* bra label */ -}; - -static const struct sh_minor_opcode sh_opcodea[] = -{ - { MAP (sh_opcodea0), 0xf000 } -}; - -static const struct sh_opcode sh_opcodeb0[] = -{ - { 0xb000, BRANCH | DELAY } /* bsr label */ -}; - -static const struct sh_minor_opcode sh_opcodeb[] = -{ - { MAP (sh_opcodeb0), 0xf000 } -}; - -static const struct sh_opcode sh_opcodec0[] = -{ - { 0xc000, STORE | USESR0 | USESSP }, /* mov.b r0,@(disp,gbr) */ - { 0xc100, STORE | USESR0 | USESSP }, /* mov.w r0,@(disp,gbr) */ - { 0xc200, STORE | USESR0 | USESSP }, /* mov.l r0,@(disp,gbr) */ - { 0xc300, BRANCH | USESSP }, /* trapa #imm */ - { 0xc400, LOAD | SETSR0 | USESSP }, /* mov.b @(disp,gbr),r0 */ - { 0xc500, LOAD | SETSR0 | USESSP }, /* mov.w @(disp,gbr),r0 */ - { 0xc600, LOAD | SETSR0 | USESSP }, /* mov.l @(disp,gbr),r0 */ - { 0xc700, SETSR0 }, /* mova @(disp,pc),r0 */ - { 0xc800, SETSSP | USESR0 }, /* tst #imm,r0 */ - { 0xc900, SETSR0 | USESR0 }, /* and #imm,r0 */ - { 0xca00, SETSR0 | USESR0 }, /* xor #imm,r0 */ - { 0xcb00, SETSR0 | USESR0 }, /* or #imm,r0 */ - { 0xcc00, LOAD | SETSSP | USESR0 | USESSP }, /* tst.b #imm,@(r0,gbr) */ - { 0xcd00, LOAD | STORE | USESR0 | USESSP }, /* and.b #imm,@(r0,gbr) */ - { 0xce00, LOAD | STORE | USESR0 | USESSP }, /* xor.b #imm,@(r0,gbr) */ - { 0xcf00, LOAD | STORE | USESR0 | USESSP } /* or.b #imm,@(r0,gbr) */ -}; - -static const struct sh_minor_opcode sh_opcodec[] = -{ - { MAP (sh_opcodec0), 0xff00 } -}; - -static const struct sh_opcode sh_opcoded0[] = -{ - { 0xd000, LOAD | SETS1 } /* mov.l @(disp,pc),rn */ -}; - -static const struct sh_minor_opcode sh_opcoded[] = -{ - { MAP (sh_opcoded0), 0xf000 } -}; - -static const struct sh_opcode sh_opcodee0[] = -{ - { 0xe000, SETS1 } /* mov #imm,rn */ -}; - -static const struct sh_minor_opcode sh_opcodee[] = -{ - { MAP (sh_opcodee0), 0xf000 } -}; - -static const struct sh_opcode sh_opcodef0[] = -{ - { 0xf000, SETSF1 | USESF1 | USESF2 }, /* fadd fm,fn */ - { 0xf001, SETSF1 | USESF1 | USESF2 }, /* fsub fm,fn */ - { 0xf002, SETSF1 | USESF1 | USESF2 }, /* fmul fm,fn */ - { 0xf003, SETSF1 | USESF1 | USESF2 }, /* fdiv fm,fn */ - { 0xf004, SETSSP | USESF1 | USESF2 }, /* fcmp/eq fm,fn */ - { 0xf005, SETSSP | USESF1 | USESF2 }, /* fcmp/gt fm,fn */ - { 0xf006, LOAD | SETSF1 | USES2 | USESR0 }, /* fmov.s @(r0,rm),fn */ - { 0xf007, STORE | USES1 | USESF2 | USESR0 }, /* fmov.s fm,@(r0,rn) */ - { 0xf008, LOAD | SETSF1 | USES2 }, /* fmov.s @rm,fn */ - { 0xf009, LOAD | SETS2 | SETSF1 | USES2 }, /* fmov.s @rm+,fn */ - { 0xf00a, STORE | USES1 | USESF2 }, /* fmov.s fm,@rn */ - { 0xf00b, STORE | SETS1 | USES1 | USESF2 }, /* fmov.s fm,@-rn */ - { 0xf00c, SETSF1 | USESF2 }, /* fmov fm,fn */ - { 0xf00e, SETSF1 | USESF1 | USESF2 | USESF0 } /* fmac f0,fm,fn */ -}; - -static const struct sh_opcode sh_opcodef1[] = -{ - { 0xf00d, SETSF1 | USESSP }, /* fsts fpul,fn */ - { 0xf01d, SETSSP | USESF1 }, /* flds fn,fpul */ - { 0xf02d, SETSF1 | USESSP }, /* float fpul,fn */ - { 0xf03d, SETSSP | USESF1 }, /* ftrc fn,fpul */ - { 0xf04d, SETSF1 | USESF1 }, /* fneg fn */ - { 0xf05d, SETSF1 | USESF1 }, /* fabs fn */ - { 0xf06d, SETSF1 | USESF1 }, /* fsqrt fn */ - { 0xf07d, SETSSP | USESF1 }, /* ftst/nan fn */ - { 0xf08d, SETSF1 }, /* fldi0 fn */ - { 0xf09d, SETSF1 } /* fldi1 fn */ -}; - -static const struct sh_minor_opcode sh_opcodef[] = -{ - { MAP (sh_opcodef0), 0xf00f }, - { MAP (sh_opcodef1), 0xf0ff } -}; - -static const struct sh_major_opcode sh_opcodes[] = -{ - { MAP (sh_opcode0) }, - { MAP (sh_opcode1) }, - { MAP (sh_opcode2) }, - { MAP (sh_opcode3) }, - { MAP (sh_opcode4) }, - { MAP (sh_opcode5) }, - { MAP (sh_opcode6) }, - { MAP (sh_opcode7) }, - { MAP (sh_opcode8) }, - { MAP (sh_opcode9) }, - { MAP (sh_opcodea) }, - { MAP (sh_opcodeb) }, - { MAP (sh_opcodec) }, - { MAP (sh_opcoded) }, - { MAP (sh_opcodee) }, - { MAP (sh_opcodef) } -}; - -/* Given an instruction, return a pointer to the corresponding - sh_opcode structure. Return NULL if the instruction is not - recognized. */ - -static const struct sh_opcode * -sh_insn_info (insn) - unsigned int insn; -{ - const struct sh_major_opcode *maj; - const struct sh_minor_opcode *min, *minend; - - maj = &sh_opcodes[(insn & 0xf000) >> 12]; - min = maj->minor_opcodes; - minend = min + maj->count; - for (; min < minend; min++) - { - unsigned int l; - const struct sh_opcode *op, *opend; - - l = insn & min->mask; - op = min->opcodes; - opend = op + min->count; - - /* Since the opcodes tables are sorted, we could use a binary - search here if the count were above some cutoff value. */ - for (; op < opend; op++) - if (op->opcode == l) - return op; - } - - return NULL; -} - -/* See whether an instruction uses a general purpose register. */ - -static boolean -sh_insn_uses_reg (insn, op, reg) - unsigned int insn; - const struct sh_opcode *op; - unsigned int reg; -{ - unsigned int f; - - f = op->flags; - - if ((f & USES1) != 0 - && ((insn & 0x0f00) >> 8) == reg) - return true; - if ((f & USES2) != 0 - && ((insn & 0x00f0) >> 4) == reg) - return true; - if ((f & USESR0) != 0 - && reg == 0) - return true; - - return false; -} - -/* See whether an instruction uses a floating point register. */ - -static boolean -sh_insn_uses_freg (insn, op, freg) - unsigned int insn; - const struct sh_opcode *op; - unsigned int freg; -{ - unsigned int f; - - f = op->flags; - - /* We can't tell if this is a double-precision insn, so just play safe - and assume that it might be. So not only have we test FREG against - itself, but also even FREG against FREG+1 - if the using insn uses - just the low part of a double precision value - but also an odd - FREG against FREG-1 - if the setting insn sets just the low part - of a double precision value. - So what this all boils down to is that we have to ignore the lowest - bit of the register number. */ - - if ((f & USESF1) != 0 - && ((insn & 0x0e00) >> 8) == (freg & 0xe)) - return true; - if ((f & USESF2) != 0 - && ((insn & 0x00e0) >> 4) == (freg & 0xe)) - return true; - if ((f & USESF0) != 0 - && freg == 0) - return true; - - return false; -} - -/* See whether instructions I1 and I2 conflict, assuming I1 comes - before I2. OP1 and OP2 are the corresponding sh_opcode structures. - This should return true if there is a conflict, or false if the - instructions can be swapped safely. */ - -static boolean -sh_insns_conflict (i1, op1, i2, op2) - unsigned int i1; - const struct sh_opcode *op1; - unsigned int i2; - const struct sh_opcode *op2; -{ - unsigned int f1, f2; - - f1 = op1->flags; - f2 = op2->flags; - - /* Load of fpscr conflicts with floating point operations. - FIXME: shouldn't test raw opcodes here. */ - if (((i1 & 0xf0ff) == 0x4066 && (i2 & 0xf000) == 0xf000) - || ((i2 & 0xf0ff) == 0x4066 && (i1 & 0xf000) == 0xf000)) - return true; - - if ((f1 & (BRANCH | DELAY)) != 0 - || (f2 & (BRANCH | DELAY)) != 0) - return true; - - if ((f1 & SETSSP) != 0 && (f2 & USESSP) != 0) - return true; - if ((f2 & SETSSP) != 0 && (f1 & USESSP) != 0) - return true; - - if ((f1 & SETS1) != 0 - && sh_insn_uses_reg (i2, op2, (i1 & 0x0f00) >> 8)) - return true; - if ((f1 & SETS2) != 0 - && sh_insn_uses_reg (i2, op2, (i1 & 0x00f0) >> 4)) - return true; - if ((f1 & SETSR0) != 0 - && sh_insn_uses_reg (i2, op2, 0)) - return true; - if ((f1 & SETSF1) != 0 - && sh_insn_uses_freg (i2, op2, (i1 & 0x0f00) >> 8)) - return true; - - if ((f2 & SETS1) != 0 - && sh_insn_uses_reg (i1, op1, (i2 & 0x0f00) >> 8)) - return true; - if ((f2 & SETS2) != 0 - && sh_insn_uses_reg (i1, op1, (i2 & 0x00f0) >> 4)) - return true; - if ((f2 & SETSR0) != 0 - && sh_insn_uses_reg (i1, op1, 0)) - return true; - if ((f2 & SETSF1) != 0 - && sh_insn_uses_freg (i1, op1, (i2 & 0x0f00) >> 8)) - return true; - - /* The instructions do not conflict. */ - return false; -} - -/* I1 is a load instruction, and I2 is some other instruction. Return - true if I1 loads a register which I2 uses. */ - -static boolean -sh_load_use (i1, op1, i2, op2) - unsigned int i1; - const struct sh_opcode *op1; - unsigned int i2; - const struct sh_opcode *op2; -{ - unsigned int f1; - - f1 = op1->flags; - - if ((f1 & LOAD) == 0) - return false; - - /* If both SETS1 and SETSSP are set, that means a load to a special - register using postincrement addressing mode, which we don't care - about here. */ - if ((f1 & SETS1) != 0 - && (f1 & SETSSP) == 0 - && sh_insn_uses_reg (i2, op2, (i1 & 0x0f00) >> 8)) - return true; - - if ((f1 & SETSR0) != 0 - && sh_insn_uses_reg (i2, op2, 0)) - return true; - - if ((f1 & SETSF1) != 0 - && sh_insn_uses_freg (i2, op2, (i1 & 0x0f00) >> 8)) - return true; - - return false; -} - -/* Try to align loads and stores within a span of memory. This is - called by both the ELF and the COFF sh targets. ABFD and SEC are - the BFD and section we are examining. CONTENTS is the contents of - the section. SWAP is the routine to call to swap two instructions. - RELOCS is a pointer to the internal relocation information, to be - passed to SWAP. PLABEL is a pointer to the current label in a - sorted list of labels; LABEL_END is the end of the list. START and - STOP are the range of memory to examine. If a swap is made, - *PSWAPPED is set to true. */ - -boolean -_bfd_sh_align_load_span (abfd, sec, contents, swap, relocs, - plabel, label_end, start, stop, pswapped) - bfd *abfd; - asection *sec; - bfd_byte *contents; - boolean (*swap) PARAMS ((bfd *, asection *, PTR, bfd_byte *, bfd_vma)); - PTR relocs; - bfd_vma **plabel; - bfd_vma *label_end; - bfd_vma start; - bfd_vma stop; - boolean *pswapped; -{ - bfd_vma i; - - /* Instructions should be aligned on 2 byte boundaries. */ - if ((start & 1) == 1) - ++start; - - /* Now look through the unaligned addresses. */ - i = start; - if ((i & 2) == 0) - i += 2; - for (; i < stop; i += 4) - { - unsigned int insn; - const struct sh_opcode *op; - unsigned int prev_insn = 0; - const struct sh_opcode *prev_op = NULL; - - insn = bfd_get_16 (abfd, contents + i); - op = sh_insn_info (insn); - if (op == NULL - || (op->flags & (LOAD | STORE)) == 0) - continue; - - /* This is a load or store which is not on a four byte boundary. */ - - while (*plabel < label_end && **plabel < i) - ++*plabel; - - if (i > start) - { - prev_insn = bfd_get_16 (abfd, contents + i - 2); - prev_op = sh_insn_info (prev_insn); - - /* If the load/store instruction is in a delay slot, we - can't swap. */ - if (prev_op == NULL - || (prev_op->flags & DELAY) != 0) - continue; - } - if (i > start - && (*plabel >= label_end || **plabel != i) - && prev_op != NULL - && (prev_op->flags & (LOAD | STORE)) == 0 - && ! sh_insns_conflict (prev_insn, prev_op, insn, op)) - { - boolean ok; - - /* The load/store instruction does not have a label, and - there is a previous instruction; PREV_INSN is not - itself a load/store instruction, and PREV_INSN and - INSN do not conflict. */ - - ok = true; - - if (i >= start + 4) - { - unsigned int prev2_insn; - const struct sh_opcode *prev2_op; - - prev2_insn = bfd_get_16 (abfd, contents + i - 4); - prev2_op = sh_insn_info (prev2_insn); - - /* If the instruction before PREV_INSN has a delay - slot--that is, PREV_INSN is in a delay slot--we - can not swap. */ - if (prev2_op == NULL - || (prev2_op->flags & DELAY) != 0) - ok = false; - - /* If the instruction before PREV_INSN is a load, - and it sets a register which INSN uses, then - putting INSN immediately after PREV_INSN will - cause a pipeline bubble, so there is no point to - making the swap. */ - if (ok - && (prev2_op->flags & LOAD) != 0 - && sh_load_use (prev2_insn, prev2_op, insn, op)) - ok = false; - } - - if (ok) - { - if (! (*swap) (abfd, sec, relocs, contents, i - 2)) - return false; - *pswapped = true; - continue; - } - } - - while (*plabel < label_end && **plabel < i + 2) - ++*plabel; - - if (i + 2 < stop - && (*plabel >= label_end || **plabel != i + 2)) - { - unsigned int next_insn; - const struct sh_opcode *next_op; - - /* There is an instruction after the load/store - instruction, and it does not have a label. */ - next_insn = bfd_get_16 (abfd, contents + i + 2); - next_op = sh_insn_info (next_insn); - if (next_op != NULL - && (next_op->flags & (LOAD | STORE)) == 0 - && ! sh_insns_conflict (insn, op, next_insn, next_op)) - { - boolean ok; - - /* NEXT_INSN is not itself a load/store instruction, - and it does not conflict with INSN. */ - - ok = true; - - /* If PREV_INSN is a load, and it sets a register - which NEXT_INSN uses, then putting NEXT_INSN - immediately after PREV_INSN will cause a pipeline - bubble, so there is no reason to make this swap. */ - if (prev_op != NULL - && (prev_op->flags & LOAD) != 0 - && sh_load_use (prev_insn, prev_op, next_insn, next_op)) - ok = false; - - /* If INSN is a load, and it sets a register which - the insn after NEXT_INSN uses, then doing the - swap will cause a pipeline bubble, so there is no - reason to make the swap. However, if the insn - after NEXT_INSN is itself a load or store - instruction, then it is misaligned, so - optimistically hope that it will be swapped - itself, and just live with the pipeline bubble if - it isn't. */ - if (ok - && i + 4 < stop - && (op->flags & LOAD) != 0) - { - unsigned int next2_insn; - const struct sh_opcode *next2_op; - - next2_insn = bfd_get_16 (abfd, contents + i + 4); - next2_op = sh_insn_info (next2_insn); - if ((next2_op->flags & (LOAD | STORE)) == 0 - && sh_load_use (insn, op, next2_insn, next2_op)) - ok = false; - } - - if (ok) - { - if (! (*swap) (abfd, sec, relocs, contents, i)) - return false; - *pswapped = true; - continue; - } - } - } - } - - return true; -} - -/* Look for loads and stores which we can align to four byte - boundaries. See the longer comment above sh_relax_section for why - this is desirable. This sets *PSWAPPED if some instruction was - swapped. */ - -static boolean -sh_align_loads (abfd, sec, internal_relocs, contents, pswapped) - bfd *abfd; - asection *sec; - struct internal_reloc *internal_relocs; - bfd_byte *contents; - boolean *pswapped; -{ - struct internal_reloc *irel, *irelend; - bfd_vma *labels = NULL; - bfd_vma *label, *label_end; - - *pswapped = false; - - irelend = internal_relocs + sec->reloc_count; - - /* Get all the addresses with labels on them. */ - labels = (bfd_vma *) bfd_malloc (sec->reloc_count * sizeof (bfd_vma)); - if (labels == NULL) - goto error_return; - label_end = labels; - for (irel = internal_relocs; irel < irelend; irel++) - { - if (irel->r_type == R_SH_LABEL) - { - *label_end = irel->r_vaddr - sec->vma; - ++label_end; - } - } - - /* Note that the assembler currently always outputs relocs in - address order. If that ever changes, this code will need to sort - the label values and the relocs. */ - - label = labels; - - for (irel = internal_relocs; irel < irelend; irel++) - { - bfd_vma start, stop; - - if (irel->r_type != R_SH_CODE) - continue; - - start = irel->r_vaddr - sec->vma; - - for (irel++; irel < irelend; irel++) - if (irel->r_type == R_SH_DATA) - break; - if (irel < irelend) - stop = irel->r_vaddr - sec->vma; - else - stop = sec->_cooked_size; - - if (! _bfd_sh_align_load_span (abfd, sec, contents, sh_swap_insns, - (PTR) internal_relocs, &label, - label_end, start, stop, pswapped)) - goto error_return; - } - - free (labels); - - return true; - - error_return: - if (labels != NULL) - free (labels); - return false; -} - -/* Swap two SH instructions. */ - -static boolean -sh_swap_insns (abfd, sec, relocs, contents, addr) - bfd *abfd; - asection *sec; - PTR relocs; - bfd_byte *contents; - bfd_vma addr; -{ - struct internal_reloc *internal_relocs = (struct internal_reloc *) relocs; - unsigned short i1, i2; - struct internal_reloc *irel, *irelend; - - /* Swap the instructions themselves. */ - i1 = bfd_get_16 (abfd, contents + addr); - i2 = bfd_get_16 (abfd, contents + addr + 2); - bfd_put_16 (abfd, i2, contents + addr); - bfd_put_16 (abfd, i1, contents + addr + 2); - - /* Adjust all reloc addresses. */ - irelend = internal_relocs + sec->reloc_count; - for (irel = internal_relocs; irel < irelend; irel++) - { - int type, add; - - /* There are a few special types of relocs that we don't want to - adjust. These relocs do not apply to the instruction itself, - but are only associated with the address. */ - type = irel->r_type; - if (type == R_SH_ALIGN - || type == R_SH_CODE - || type == R_SH_DATA - || type == R_SH_LABEL) - continue; - - /* If an R_SH_USES reloc points to one of the addresses being - swapped, we must adjust it. It would be incorrect to do this - for a jump, though, since we want to execute both - instructions after the jump. (We have avoided swapping - around a label, so the jump will not wind up executing an - instruction it shouldn't). */ - if (type == R_SH_USES) - { - bfd_vma off; - - off = irel->r_vaddr - sec->vma + 4 + irel->r_offset; - if (off == addr) - irel->r_offset += 2; - else if (off == addr + 2) - irel->r_offset -= 2; - } - - if (irel->r_vaddr - sec->vma == addr) - { - irel->r_vaddr += 2; - add = -2; - } - else if (irel->r_vaddr - sec->vma == addr + 2) - { - irel->r_vaddr -= 2; - add = 2; - } - else - add = 0; - - if (add != 0) - { - bfd_byte *loc; - unsigned short insn, oinsn; - boolean overflow; - - loc = contents + irel->r_vaddr - sec->vma; - overflow = false; - switch (type) - { - default: - break; - - case R_SH_PCDISP8BY2: - case R_SH_PCRELIMM8BY2: - insn = bfd_get_16 (abfd, loc); - oinsn = insn; - insn += add / 2; - if ((oinsn & 0xff00) != (insn & 0xff00)) - overflow = true; - bfd_put_16 (abfd, insn, loc); - break; - - case R_SH_PCDISP: - insn = bfd_get_16 (abfd, loc); - oinsn = insn; - insn += add / 2; - if ((oinsn & 0xf000) != (insn & 0xf000)) - overflow = true; - bfd_put_16 (abfd, insn, loc); - break; - - case R_SH_PCRELIMM8BY4: - /* This reloc ignores the least significant 3 bits of - the program counter before adding in the offset. - This means that if ADDR is at an even address, the - swap will not affect the offset. If ADDR is an at an - odd address, then the instruction will be crossing a - four byte boundary, and must be adjusted. */ - if ((addr & 3) != 0) - { - insn = bfd_get_16 (abfd, loc); - oinsn = insn; - insn += add / 2; - if ((oinsn & 0xff00) != (insn & 0xff00)) - overflow = true; - bfd_put_16 (abfd, insn, loc); - } - - break; - } - - if (overflow) - { - ((*_bfd_error_handler) - ("%s: 0x%lx: fatal: reloc overflow while relaxing", - bfd_get_filename (abfd), (unsigned long) irel->r_vaddr)); - bfd_set_error (bfd_error_bad_value); - return false; - } - } - } - - return true; -} - -/* This is a modification of _bfd_coff_generic_relocate_section, which - will handle SH relaxing. */ - -static boolean -sh_relocate_section (output_bfd, info, input_bfd, input_section, contents, - relocs, syms, sections) - bfd *output_bfd; - struct bfd_link_info *info; - bfd *input_bfd; - asection *input_section; - bfd_byte *contents; - struct internal_reloc *relocs; - struct internal_syment *syms; - asection **sections; -{ - struct internal_reloc *rel; - struct internal_reloc *relend; - - rel = relocs; - relend = rel + input_section->reloc_count; - for (; rel < relend; rel++) - { - long symndx; - struct coff_link_hash_entry *h; - struct internal_syment *sym; - bfd_vma addend; - bfd_vma val; - reloc_howto_type *howto; - bfd_reloc_status_type rstat; - - /* Almost all relocs have to do with relaxing. If any work must - be done for them, it has been done in sh_relax_section. */ - if (rel->r_type != R_SH_IMM32 - && rel->r_type != R_SH_PCDISP) - continue; - - symndx = rel->r_symndx; - - if (symndx == -1) - { - h = NULL; - sym = NULL; - } - else - { - if (symndx < 0 - || (unsigned long) symndx >= obj_raw_syment_count (input_bfd)) - { - (*_bfd_error_handler) - ("%s: illegal symbol index %ld in relocs", - bfd_get_filename (input_bfd), symndx); - bfd_set_error (bfd_error_bad_value); - return false; - } - h = obj_coff_sym_hashes (input_bfd)[symndx]; - sym = syms + symndx; - } - - if (sym != NULL && sym->n_scnum != 0) - addend = - sym->n_value; - else - addend = 0; - - if (rel->r_type == R_SH_PCDISP) - addend -= 4; - - if (rel->r_type >= SH_COFF_HOWTO_COUNT) - howto = NULL; - else - howto = &sh_coff_howtos[rel->r_type]; - - if (howto == NULL) - { - bfd_set_error (bfd_error_bad_value); - return false; - } - - val = 0; - - if (h == NULL) - { - asection *sec; - - /* There is nothing to do for an internal PCDISP reloc. */ - if (rel->r_type == R_SH_PCDISP) - continue; - - if (symndx == -1) - { - sec = bfd_abs_section_ptr; - val = 0; - } - else - { - sec = sections[symndx]; - val = (sec->output_section->vma - + sec->output_offset - + sym->n_value - - sec->vma); - } - } - else - { - if (h->root.type == bfd_link_hash_defined - || h->root.type == bfd_link_hash_defweak) - { - asection *sec; - - sec = h->root.u.def.section; - val = (h->root.u.def.value - + sec->output_section->vma - + sec->output_offset); - } - else if (! info->relocateable) - { - if (! ((*info->callbacks->undefined_symbol) - (info, h->root.root.string, input_bfd, input_section, - rel->r_vaddr - input_section->vma))) - return false; - } - } - - rstat = _bfd_final_link_relocate (howto, input_bfd, input_section, - contents, - rel->r_vaddr - input_section->vma, - val, addend); - - switch (rstat) - { - default: - abort (); - case bfd_reloc_ok: - break; - case bfd_reloc_overflow: - { - const char *name; - char buf[SYMNMLEN + 1]; - - if (symndx == -1) - name = "*ABS*"; - else if (h != NULL) - name = h->root.root.string; - else if (sym->_n._n_n._n_zeroes == 0 - && sym->_n._n_n._n_offset != 0) - name = obj_coff_strings (input_bfd) + sym->_n._n_n._n_offset; - else - { - strncpy (buf, sym->_n._n_name, SYMNMLEN); - buf[SYMNMLEN] = '\0'; - name = buf; - } - - if (! ((*info->callbacks->reloc_overflow) - (info, name, howto->name, (bfd_vma) 0, input_bfd, - input_section, rel->r_vaddr - input_section->vma))) - return false; - } - } - } - - return true; -} - -/* This is a version of bfd_generic_get_relocated_section_contents - which uses sh_relocate_section. */ - -static bfd_byte * -sh_coff_get_relocated_section_contents (output_bfd, link_info, link_order, - data, relocateable, symbols) - bfd *output_bfd; - struct bfd_link_info *link_info; - struct bfd_link_order *link_order; - bfd_byte *data; - boolean relocateable; - asymbol **symbols; -{ - asection *input_section = link_order->u.indirect.section; - bfd *input_bfd = input_section->owner; - asection **sections = NULL; - struct internal_reloc *internal_relocs = NULL; - struct internal_syment *internal_syms = NULL; - - /* We only need to handle the case of relaxing, or of having a - particular set of section contents, specially. */ - if (relocateable - || coff_section_data (input_bfd, input_section) == NULL - || coff_section_data (input_bfd, input_section)->contents == NULL) - return bfd_generic_get_relocated_section_contents (output_bfd, link_info, - link_order, data, - relocateable, - symbols); - - memcpy (data, coff_section_data (input_bfd, input_section)->contents, - input_section->_raw_size); - - if ((input_section->flags & SEC_RELOC) != 0 - && input_section->reloc_count > 0) - { - bfd_size_type symesz = bfd_coff_symesz (input_bfd); - bfd_byte *esym, *esymend; - struct internal_syment *isymp; - asection **secpp; - - if (! _bfd_coff_get_external_symbols (input_bfd)) - goto error_return; - - internal_relocs = (_bfd_coff_read_internal_relocs - (input_bfd, input_section, false, (bfd_byte *) NULL, - false, (struct internal_reloc *) NULL)); - if (internal_relocs == NULL) - goto error_return; - - internal_syms = ((struct internal_syment *) - bfd_malloc (obj_raw_syment_count (input_bfd) - * sizeof (struct internal_syment))); - if (internal_syms == NULL) - goto error_return; - - sections = (asection **) bfd_malloc (obj_raw_syment_count (input_bfd) - * sizeof (asection *)); - if (sections == NULL) - goto error_return; - - isymp = internal_syms; - secpp = sections; - esym = (bfd_byte *) obj_coff_external_syms (input_bfd); - esymend = esym + obj_raw_syment_count (input_bfd) * symesz; - while (esym < esymend) - { - bfd_coff_swap_sym_in (input_bfd, (PTR) esym, (PTR) isymp); - - if (isymp->n_scnum != 0) - *secpp = coff_section_from_bfd_index (input_bfd, isymp->n_scnum); - else - { - if (isymp->n_value == 0) - *secpp = bfd_und_section_ptr; - else - *secpp = bfd_com_section_ptr; - } - - esym += (isymp->n_numaux + 1) * symesz; - secpp += isymp->n_numaux + 1; - isymp += isymp->n_numaux + 1; - } - - if (! sh_relocate_section (output_bfd, link_info, input_bfd, - input_section, data, internal_relocs, - internal_syms, sections)) - goto error_return; - - free (sections); - sections = NULL; - free (internal_syms); - internal_syms = NULL; - free (internal_relocs); - internal_relocs = NULL; - } - - return data; - - error_return: - if (internal_relocs != NULL) - free (internal_relocs); - if (internal_syms != NULL) - free (internal_syms); - if (sections != NULL) - free (sections); - return NULL; -} - -/* The target vectors. */ - -const bfd_target shcoff_vec = -{ - "coff-sh", /* name */ - bfd_target_coff_flavour, - BFD_ENDIAN_BIG, /* data byte order is big */ - BFD_ENDIAN_BIG, /* header byte order is big */ - - (HAS_RELOC | EXEC_P | /* object flags */ - HAS_LINENO | HAS_DEBUG | - HAS_SYMS | HAS_LOCALS | WP_TEXT | BFD_IS_RELAXABLE), - - (SEC_HAS_CONTENTS | SEC_ALLOC | SEC_LOAD | SEC_RELOC), - '_', /* leading symbol underscore */ - '/', /* ar_pad_char */ - 15, /* ar_max_namelen */ - bfd_getb64, bfd_getb_signed_64, bfd_putb64, - bfd_getb32, bfd_getb_signed_32, bfd_putb32, - bfd_getb16, bfd_getb_signed_16, bfd_putb16, /* data */ - bfd_getb64, bfd_getb_signed_64, bfd_putb64, - bfd_getb32, bfd_getb_signed_32, bfd_putb32, - bfd_getb16, bfd_getb_signed_16, bfd_putb16, /* hdrs */ - - {_bfd_dummy_target, coff_object_p, /* bfd_check_format */ - bfd_generic_archive_p, _bfd_dummy_target}, - {bfd_false, coff_mkobject, _bfd_generic_mkarchive, /* bfd_set_format */ - bfd_false}, - {bfd_false, coff_write_object_contents, /* bfd_write_contents */ - _bfd_write_archive_contents, bfd_false}, - - BFD_JUMP_TABLE_GENERIC (coff), - BFD_JUMP_TABLE_COPY (coff), - BFD_JUMP_TABLE_CORE (_bfd_nocore), - BFD_JUMP_TABLE_ARCHIVE (_bfd_archive_coff), - BFD_JUMP_TABLE_SYMBOLS (coff), - BFD_JUMP_TABLE_RELOCS (coff), - BFD_JUMP_TABLE_WRITE (coff), - BFD_JUMP_TABLE_LINK (coff), - BFD_JUMP_TABLE_DYNAMIC (_bfd_nodynamic), - - COFF_SWAP_TABLE, -}; - -const bfd_target shlcoff_vec = -{ - "coff-shl", /* name */ - bfd_target_coff_flavour, - BFD_ENDIAN_LITTLE, /* data byte order is little */ - BFD_ENDIAN_LITTLE, /* header byte order is little endian too*/ - - (HAS_RELOC | EXEC_P | /* object flags */ - HAS_LINENO | HAS_DEBUG | - HAS_SYMS | HAS_LOCALS | WP_TEXT | BFD_IS_RELAXABLE), - - (SEC_HAS_CONTENTS | SEC_ALLOC | SEC_LOAD | SEC_RELOC), - '_', /* leading symbol underscore */ - '/', /* ar_pad_char */ - 15, /* ar_max_namelen */ - bfd_getl64, bfd_getl_signed_64, bfd_putl64, - bfd_getl32, bfd_getl_signed_32, bfd_putl32, - bfd_getl16, bfd_getl_signed_16, bfd_putl16, /* data */ - bfd_getl64, bfd_getl_signed_64, bfd_putl64, - bfd_getl32, bfd_getl_signed_32, bfd_putl32, - bfd_getl16, bfd_getl_signed_16, bfd_putl16, /* hdrs */ - - {_bfd_dummy_target, coff_object_p, /* bfd_check_format */ - bfd_generic_archive_p, _bfd_dummy_target}, - {bfd_false, coff_mkobject, _bfd_generic_mkarchive, /* bfd_set_format */ - bfd_false}, - {bfd_false, coff_write_object_contents, /* bfd_write_contents */ - _bfd_write_archive_contents, bfd_false}, - - BFD_JUMP_TABLE_GENERIC (coff), - BFD_JUMP_TABLE_COPY (coff), - BFD_JUMP_TABLE_CORE (_bfd_nocore), - BFD_JUMP_TABLE_ARCHIVE (_bfd_archive_coff), - BFD_JUMP_TABLE_SYMBOLS (coff), - BFD_JUMP_TABLE_RELOCS (coff), - BFD_JUMP_TABLE_WRITE (coff), - BFD_JUMP_TABLE_LINK (coff), - BFD_JUMP_TABLE_DYNAMIC (_bfd_nodynamic), - - COFF_SWAP_TABLE, -}; - -/* Some people want versions of the SH COFF target which do not align - to 16 byte boundaries. We implement that by adding a couple of new - target vectors. These are just like the ones above, but they - change the default section alignment. To generate them in the - assembler, use -small. To use them in the linker, use -b - coff-sh{l}-small and -oformat coff-sh{l}-small. - - Yes, this is a horrible hack. A general solution for setting - section alignment in COFF is rather complex. ELF handles this - correctly. */ - -/* Only recognize the small versions if the target was not defaulted. - Otherwise we won't recognize the non default endianness. */ - -static const bfd_target * -coff_small_object_p (abfd) - bfd *abfd; -{ - if (abfd->target_defaulted) - { - bfd_set_error (bfd_error_wrong_format); - return NULL; - } - return coff_object_p (abfd); -} - -/* Set the section alignment for the small versions. */ - -static boolean -coff_small_new_section_hook (abfd, section) - bfd *abfd; - asection *section; -{ - if (! coff_new_section_hook (abfd, section)) - return false; - - /* We must align to at least a four byte boundary, because longword - accesses must be on a four byte boundary. */ - if (section->alignment_power == COFF_DEFAULT_SECTION_ALIGNMENT_POWER) - section->alignment_power = 2; - - return true; -} - -/* This is copied from bfd_coff_std_swap_table so that we can change - the default section alignment power. */ - -static const bfd_coff_backend_data bfd_coff_small_swap_table = -{ - coff_swap_aux_in, coff_swap_sym_in, coff_swap_lineno_in, - coff_swap_aux_out, coff_swap_sym_out, - coff_swap_lineno_out, coff_swap_reloc_out, - coff_swap_filehdr_out, coff_swap_aouthdr_out, - coff_swap_scnhdr_out, - FILHSZ, AOUTSZ, SCNHSZ, SYMESZ, AUXESZ, RELSZ, LINESZ, -#ifdef COFF_LONG_FILENAMES - true, -#else - false, -#endif -#ifdef COFF_LONG_SECTION_NAMES - true, -#else - false, -#endif - 2, - coff_swap_filehdr_in, coff_swap_aouthdr_in, coff_swap_scnhdr_in, - coff_swap_reloc_in, coff_bad_format_hook, coff_set_arch_mach_hook, - coff_mkobject_hook, styp_to_sec_flags, coff_set_alignment_hook, - coff_slurp_symbol_table, symname_in_debug_hook, coff_pointerize_aux_hook, - coff_print_aux, coff_reloc16_extra_cases, coff_reloc16_estimate, - coff_sym_is_global, coff_compute_section_file_positions, - coff_start_final_link, coff_relocate_section, coff_rtype_to_howto, - coff_adjust_symndx, coff_link_add_one_symbol, - coff_link_output_has_begun, coff_final_link_postscript -}; - -#define coff_small_close_and_cleanup \ - coff_close_and_cleanup -#define coff_small_bfd_free_cached_info \ - coff_bfd_free_cached_info -#define coff_small_get_section_contents \ - coff_get_section_contents -#define coff_small_get_section_contents_in_window \ - coff_get_section_contents_in_window - -const bfd_target shcoff_small_vec = -{ - "coff-sh-small", /* name */ - bfd_target_coff_flavour, - BFD_ENDIAN_BIG, /* data byte order is big */ - BFD_ENDIAN_BIG, /* header byte order is big */ - - (HAS_RELOC | EXEC_P | /* object flags */ - HAS_LINENO | HAS_DEBUG | - HAS_SYMS | HAS_LOCALS | WP_TEXT | BFD_IS_RELAXABLE), - - (SEC_HAS_CONTENTS | SEC_ALLOC | SEC_LOAD | SEC_RELOC), - '_', /* leading symbol underscore */ - '/', /* ar_pad_char */ - 15, /* ar_max_namelen */ - bfd_getb64, bfd_getb_signed_64, bfd_putb64, - bfd_getb32, bfd_getb_signed_32, bfd_putb32, - bfd_getb16, bfd_getb_signed_16, bfd_putb16, /* data */ - bfd_getb64, bfd_getb_signed_64, bfd_putb64, - bfd_getb32, bfd_getb_signed_32, bfd_putb32, - bfd_getb16, bfd_getb_signed_16, bfd_putb16, /* hdrs */ - - {_bfd_dummy_target, coff_small_object_p, /* bfd_check_format */ - bfd_generic_archive_p, _bfd_dummy_target}, - {bfd_false, coff_mkobject, _bfd_generic_mkarchive, /* bfd_set_format */ - bfd_false}, - {bfd_false, coff_write_object_contents, /* bfd_write_contents */ - _bfd_write_archive_contents, bfd_false}, - - BFD_JUMP_TABLE_GENERIC (coff_small), - BFD_JUMP_TABLE_COPY (coff), - BFD_JUMP_TABLE_CORE (_bfd_nocore), - BFD_JUMP_TABLE_ARCHIVE (_bfd_archive_coff), - BFD_JUMP_TABLE_SYMBOLS (coff), - BFD_JUMP_TABLE_RELOCS (coff), - BFD_JUMP_TABLE_WRITE (coff), - BFD_JUMP_TABLE_LINK (coff), - BFD_JUMP_TABLE_DYNAMIC (_bfd_nodynamic), - - (PTR) &bfd_coff_small_swap_table -}; - -const bfd_target shlcoff_small_vec = -{ - "coff-shl-small", /* name */ - bfd_target_coff_flavour, - BFD_ENDIAN_LITTLE, /* data byte order is little */ - BFD_ENDIAN_LITTLE, /* header byte order is little endian too*/ - - (HAS_RELOC | EXEC_P | /* object flags */ - HAS_LINENO | HAS_DEBUG | - HAS_SYMS | HAS_LOCALS | WP_TEXT | BFD_IS_RELAXABLE), - - (SEC_HAS_CONTENTS | SEC_ALLOC | SEC_LOAD | SEC_RELOC), - '_', /* leading symbol underscore */ - '/', /* ar_pad_char */ - 15, /* ar_max_namelen */ - bfd_getl64, bfd_getl_signed_64, bfd_putl64, - bfd_getl32, bfd_getl_signed_32, bfd_putl32, - bfd_getl16, bfd_getl_signed_16, bfd_putl16, /* data */ - bfd_getl64, bfd_getl_signed_64, bfd_putl64, - bfd_getl32, bfd_getl_signed_32, bfd_putl32, - bfd_getl16, bfd_getl_signed_16, bfd_putl16, /* hdrs */ - - {_bfd_dummy_target, coff_small_object_p, /* bfd_check_format */ - bfd_generic_archive_p, _bfd_dummy_target}, - {bfd_false, coff_mkobject, _bfd_generic_mkarchive, /* bfd_set_format */ - bfd_false}, - {bfd_false, coff_write_object_contents, /* bfd_write_contents */ - _bfd_write_archive_contents, bfd_false}, - - BFD_JUMP_TABLE_GENERIC (coff_small), - BFD_JUMP_TABLE_COPY (coff), - BFD_JUMP_TABLE_CORE (_bfd_nocore), - BFD_JUMP_TABLE_ARCHIVE (_bfd_archive_coff), - BFD_JUMP_TABLE_SYMBOLS (coff), - BFD_JUMP_TABLE_RELOCS (coff), - BFD_JUMP_TABLE_WRITE (coff), - BFD_JUMP_TABLE_LINK (coff), - BFD_JUMP_TABLE_DYNAMIC (_bfd_nodynamic), - - (PTR) &bfd_coff_small_swap_table -}; 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