diff options
| author | Chao-ying Fu <fu@mips.com> | 2006-05-15 20:34:56 +0000 |
|---|---|---|
| committer | Chao-ying Fu <fu@mips.com> | 2006-05-15 20:34:56 +0000 |
| commit | dc6641a55848bb8dfcb4d6dee66f63ca3d7977f4 (patch) | |
| tree | 78796919baff613951e58773b2e85486a2b5bcfd | |
| parent | 69088b17068a002cfdad9aaa12a3e486b9f47f61 (diff) | |
| download | binutils-dc6641a55848bb8dfcb4d6dee66f63ca3d7977f4.tar.gz binutils-dc6641a55848bb8dfcb4d6dee66f63ca3d7977f4.tar.bz2 binutils-dc6641a55848bb8dfcb4d6dee66f63ca3d7977f4.zip | |
* mips32-dsp.s: Add some tests for shra_r.ph, shrav_r.ph, shra_r.w,
shrav_r.w.
| -rw-r--r-- | sim/testsuite/sim/mips/ChangeLog | 5 | ||||
| -rw-r--r-- | sim/testsuite/sim/mips/mips32-dsp.s | 11 |
2 files changed, 16 insertions, 0 deletions
diff --git a/sim/testsuite/sim/mips/ChangeLog b/sim/testsuite/sim/mips/ChangeLog index eb351524820..9c7b78903d9 100644 --- a/sim/testsuite/sim/mips/ChangeLog +++ b/sim/testsuite/sim/mips/ChangeLog @@ -1,3 +1,8 @@ +2006-05-15 Chao-ying Fu <fu@mips.com> + + * mips32-dsp.s: Add some tests for shra_r.ph, shrav_r.ph, shra_r.w, + shrav_r.w. + 2005-12-14 Chao-ying Fu <fu@mips.com> * basic.exp: Run the dsp test. diff --git a/sim/testsuite/sim/mips/mips32-dsp.s b/sim/testsuite/sim/mips/mips32-dsp.s index 6e7a7c8f0fd..f3497b3ea37 100644 --- a/sim/testsuite/sim/mips/mips32-dsp.s +++ b/sim/testsuite/sim/mips/mips32-dsp.s @@ -332,12 +332,17 @@ DIAG: dspck_dtsaio shra_r.ph, 0x10001, 0x20001, 1, 0x0, 0x0 dspck_dtsaio shra_r.ph, 0x10001, 0x10001, 1, 0x0, 0x0 dspck_dtsaio shra_r.ph, 0x0, 0x10001, 2, 0x0, 0x0 + dspck_dtsaio shra_r.ph, 0x7fff8000, 0x7fff8000, 0, 0x0, 0x0 + dspck_dtsaio shra_r.ph, 0x4000c000, 0x7fff8000, 1, 0x0, 0x0 + dspck_dtsaio shra_r.ph, 0x2000e000, 0x7ffe8000, 2, 0x0, 0x0 writemsg "[44] Test shrav_r.ph" dspck_dstio shrav_r.ph, 0x20001, 0x30002, 0x1, 0x0, 0x0 dspck_dstio shrav_r.ph, 0x10001, 0x20001, 0x1, 0x0, 0x0 dspck_dstio shrav_r.ph, 0x10001, 0x10001, 0x1, 0x0, 0x0 dspck_dstio shrav_r.ph, 0x0, 0x10001, 0x2, 0x0, 0x0 + dspck_dstio shrav_r.ph, 0x7fff8000, 0x7fff8000, 0, 0x0, 0x0 + dspck_dstio shrav_r.ph, 0x2000e000, 0x7fff8000, 2, 0x0, 0x0 writemsg "[45] Test shra_r.w" dspck_dtsaio shra_r.w, 0x1, 0x2, 1, 0x0, 0x0 @@ -345,6 +350,9 @@ DIAG: dspck_dtsaio shra_r.w, 0x8001, 0x10001, 1, 0x0, 0x0 dspck_dtsaio shra_r.w, 0x1, 0x10001, 17, 0x0, 0x0 dspck_dtsaio shra_r.w, 0xffffc001, 0x80010001, 17, 0x0, 0x0 + dspck_dtsaio shra_r.w, 0x7fffffff, 0x7fffffff, 0, 0x0, 0x0 + dspck_dtsaio shra_r.w, 0x40000000, 0x7fffffff, 1, 0x0, 0x0 + dspck_dtsaio shra_r.w, 0x20000000, 0x7ffffffe, 2, 0x0, 0x0 writemsg "[46] Test shrav_r.w" dspck_dstio shrav_r.w, 0x1, 0x2, 0x1, 0x0, 0x0 @@ -352,6 +360,9 @@ DIAG: dspck_dstio shrav_r.w, 0x8001, 0x10001, 0x1, 0x0, 0x0 dspck_dstio shrav_r.w, 0x8001, 0x10001, 0x21, 0x0, 0x0 dspck_dstio shrav_r.w, 0x4000, 0x10001, 0x2, 0x0, 0x0 + dspck_dstio shrav_r.w, 0x7fffffff, 0x7fffffff, 0x0, 0x0, 0x0 + dspck_dstio shrav_r.w, 0x10000000, 0x7ffffffc, 0x3, 0x0, 0x0 + dspck_dstio shrav_r.w, 0x08000000, 0x7ffffff8, 0x4, 0x0, 0x0 writemsg "[47] Test muleu_s.ph.qbl" dspck_dstio muleu_s.ph.qbl, 0x0, 0x0, 0x0, 0x0, 0x0 |